clk-max77686.c 6.0 KB

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  1. /*
  2. * clk-max77686.c - Clock driver for Maxim 77686
  3. *
  4. * Copyright (C) 2012 Samsung Electornics
  5. * Jonghwa Lee <jonghwa3.lee@samsung.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License as published by the
  9. * Free Software Foundation; either version 2 of the License, or (at your
  10. * option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  20. *
  21. */
  22. #include <linux/kernel.h>
  23. #include <linux/slab.h>
  24. #include <linux/err.h>
  25. #include <linux/platform_device.h>
  26. #include <linux/mfd/max77686.h>
  27. #include <linux/mfd/max77686-private.h>
  28. #include <linux/clk-provider.h>
  29. #include <linux/mutex.h>
  30. #include <linux/clkdev.h>
  31. enum {
  32. MAX77686_CLK_AP = 0,
  33. MAX77686_CLK_CP,
  34. MAX77686_CLK_PMIC,
  35. MAX77686_CLKS_NUM,
  36. };
  37. struct max77686_clk {
  38. struct max77686_dev *iodev;
  39. u32 mask;
  40. struct clk_hw hw;
  41. struct clk_lookup *lookup;
  42. };
  43. static struct max77686_clk *to_max77686_clk(struct clk_hw *hw)
  44. {
  45. return container_of(hw, struct max77686_clk, hw);
  46. }
  47. static int max77686_clk_prepare(struct clk_hw *hw)
  48. {
  49. struct max77686_clk *max77686 = to_max77686_clk(hw);
  50. return regmap_update_bits(max77686->iodev->regmap,
  51. MAX77686_REG_32KHZ, max77686->mask,
  52. max77686->mask);
  53. }
  54. static void max77686_clk_unprepare(struct clk_hw *hw)
  55. {
  56. struct max77686_clk *max77686 = to_max77686_clk(hw);
  57. regmap_update_bits(max77686->iodev->regmap,
  58. MAX77686_REG_32KHZ, max77686->mask, ~max77686->mask);
  59. }
  60. static int max77686_clk_is_prepared(struct clk_hw *hw)
  61. {
  62. struct max77686_clk *max77686 = to_max77686_clk(hw);
  63. int ret;
  64. u32 val;
  65. ret = regmap_read(max77686->iodev->regmap,
  66. MAX77686_REG_32KHZ, &val);
  67. if (ret < 0)
  68. return -EINVAL;
  69. return val & max77686->mask;
  70. }
  71. static unsigned long max77686_recalc_rate(struct clk_hw *hw,
  72. unsigned long parent_rate)
  73. {
  74. return 32768;
  75. }
  76. static struct clk_ops max77686_clk_ops = {
  77. .prepare = max77686_clk_prepare,
  78. .unprepare = max77686_clk_unprepare,
  79. .is_prepared = max77686_clk_is_prepared,
  80. .recalc_rate = max77686_recalc_rate,
  81. };
  82. static struct clk_init_data max77686_clks_init[MAX77686_CLKS_NUM] = {
  83. [MAX77686_CLK_AP] = {
  84. .name = "32khz_ap",
  85. .ops = &max77686_clk_ops,
  86. .flags = CLK_IS_ROOT,
  87. },
  88. [MAX77686_CLK_CP] = {
  89. .name = "32khz_cp",
  90. .ops = &max77686_clk_ops,
  91. .flags = CLK_IS_ROOT,
  92. },
  93. [MAX77686_CLK_PMIC] = {
  94. .name = "32khz_pmic",
  95. .ops = &max77686_clk_ops,
  96. .flags = CLK_IS_ROOT,
  97. },
  98. };
  99. static struct clk *max77686_clk_register(struct device *dev,
  100. struct max77686_clk *max77686)
  101. {
  102. struct clk *clk;
  103. struct clk_hw *hw = &max77686->hw;
  104. clk = clk_register(dev, hw);
  105. if (IS_ERR(clk))
  106. return clk;
  107. max77686->lookup = kzalloc(sizeof(struct clk_lookup), GFP_KERNEL);
  108. if (!max77686->lookup)
  109. return ERR_PTR(-ENOMEM);
  110. max77686->lookup->con_id = hw->init->name;
  111. max77686->lookup->clk = clk;
  112. clkdev_add(max77686->lookup);
  113. return clk;
  114. }
  115. static int max77686_clk_probe(struct platform_device *pdev)
  116. {
  117. struct max77686_dev *iodev = dev_get_drvdata(pdev->dev.parent);
  118. struct max77686_clk *max77686_clks[MAX77686_CLKS_NUM];
  119. struct clk **clocks;
  120. int i, ret;
  121. clocks = devm_kzalloc(&pdev->dev, sizeof(struct clk *)
  122. * MAX77686_CLKS_NUM, GFP_KERNEL);
  123. if (!clocks)
  124. return -ENOMEM;
  125. for (i = 0; i < MAX77686_CLKS_NUM; i++) {
  126. max77686_clks[i] = devm_kzalloc(&pdev->dev,
  127. sizeof(struct max77686_clk), GFP_KERNEL);
  128. if (!max77686_clks[i])
  129. return -ENOMEM;
  130. }
  131. for (i = 0; i < MAX77686_CLKS_NUM; i++) {
  132. max77686_clks[i]->iodev = iodev;
  133. max77686_clks[i]->mask = 1 << i;
  134. max77686_clks[i]->hw.init = &max77686_clks_init[i];
  135. clocks[i] = max77686_clk_register(&pdev->dev, max77686_clks[i]);
  136. if (IS_ERR(clocks[i])) {
  137. ret = PTR_ERR(clocks[i]);
  138. dev_err(&pdev->dev, "failed to register %s\n",
  139. max77686_clks[i]->hw.init->name);
  140. goto err_clocks;
  141. }
  142. }
  143. platform_set_drvdata(pdev, clocks);
  144. if (iodev->dev->of_node) {
  145. struct clk_onecell_data *of_data;
  146. of_data = devm_kzalloc(&pdev->dev,
  147. sizeof(*of_data), GFP_KERNEL);
  148. if (!of_data) {
  149. ret = -ENOMEM;
  150. goto err_clocks;
  151. }
  152. of_data->clks = clocks;
  153. of_data->clk_num = MAX77686_CLKS_NUM;
  154. ret = of_clk_add_provider(iodev->dev->of_node,
  155. of_clk_src_onecell_get, of_data);
  156. if (ret) {
  157. dev_err(&pdev->dev, "failed to register OF clock provider\n");
  158. goto err_clocks;
  159. }
  160. }
  161. return 0;
  162. err_clocks:
  163. for (--i; i >= 0; --i) {
  164. clkdev_drop(max77686_clks[i]->lookup);
  165. clk_unregister(max77686_clks[i]->hw.clk);
  166. }
  167. return ret;
  168. }
  169. static int max77686_clk_remove(struct platform_device *pdev)
  170. {
  171. struct max77686_dev *iodev = dev_get_drvdata(pdev->dev.parent);
  172. struct clk **clocks = platform_get_drvdata(pdev);
  173. int i;
  174. if (iodev->dev->of_node)
  175. of_clk_del_provider(iodev->dev->of_node);
  176. for (i = 0; i < MAX77686_CLKS_NUM; i++) {
  177. struct clk_hw *hw = __clk_get_hw(clocks[i]);
  178. struct max77686_clk *max77686 = to_max77686_clk(hw);
  179. clkdev_drop(max77686->lookup);
  180. clk_unregister(clocks[i]);
  181. }
  182. return 0;
  183. }
  184. static const struct platform_device_id max77686_clk_id[] = {
  185. { "max77686-clk", 0},
  186. { },
  187. };
  188. MODULE_DEVICE_TABLE(platform, max77686_clk_id);
  189. static struct platform_driver max77686_clk_driver = {
  190. .driver = {
  191. .name = "max77686-clk",
  192. .owner = THIS_MODULE,
  193. },
  194. .probe = max77686_clk_probe,
  195. .remove = max77686_clk_remove,
  196. .id_table = max77686_clk_id,
  197. };
  198. static int __init max77686_clk_init(void)
  199. {
  200. return platform_driver_register(&max77686_clk_driver);
  201. }
  202. subsys_initcall(max77686_clk_init);
  203. static void __init max77686_clk_cleanup(void)
  204. {
  205. platform_driver_unregister(&max77686_clk_driver);
  206. }
  207. module_exit(max77686_clk_cleanup);
  208. MODULE_DESCRIPTION("MAXIM 77686 Clock Driver");
  209. MODULE_AUTHOR("Jonghwa Lee <jonghwa3.lee@samsung.com>");
  210. MODULE_LICENSE("GPL");