pata_at91.c 12 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457
  1. /*
  2. * PATA driver for AT91SAM9260 Static Memory Controller
  3. * with CompactFlash interface in True IDE mode
  4. *
  5. * Copyright (C) 2009 Matyukevich Sergey
  6. * 2011 Igor Plyatov
  7. *
  8. * Based on:
  9. * * generic platform driver by Paul Mundt: drivers/ata/pata_platform.c
  10. * * pata_at32 driver by Kristoffer Nyborg Gregertsen
  11. * * at91_ide driver by Stanislaw Gruszka
  12. *
  13. * This program is free software; you can redistribute it and/or modify it
  14. * under the terms of the GNU General Public License version 2
  15. * as published by the Free Software Foundation.
  16. *
  17. */
  18. #include <linux/kernel.h>
  19. #include <linux/module.h>
  20. #include <linux/blkdev.h>
  21. #include <linux/gfp.h>
  22. #include <scsi/scsi_host.h>
  23. #include <linux/ata.h>
  24. #include <linux/clk.h>
  25. #include <linux/libata.h>
  26. #include <linux/platform_device.h>
  27. #include <linux/ata_platform.h>
  28. #include <linux/platform_data/atmel.h>
  29. #include <mach/at91sam9_smc.h>
  30. #include <asm/gpio.h>
  31. #define DRV_NAME "pata_at91"
  32. #define DRV_VERSION "0.3"
  33. #define CF_IDE_OFFSET 0x00c00000
  34. #define CF_ALT_IDE_OFFSET 0x00e00000
  35. #define CF_IDE_RES_SIZE 0x08
  36. #define CS_PULSE_MAXIMUM 319
  37. #define ER_SMC_CALC 1
  38. #define ER_SMC_RECALC 2
  39. struct at91_ide_info {
  40. unsigned long mode;
  41. unsigned int cs;
  42. struct clk *mck;
  43. void __iomem *ide_addr;
  44. void __iomem *alt_addr;
  45. };
  46. /**
  47. * struct smc_range - range of valid values for SMC register.
  48. */
  49. struct smc_range {
  50. int min;
  51. int max;
  52. };
  53. /**
  54. * adjust_smc_value - adjust value for one of SMC registers.
  55. * @value: adjusted value
  56. * @range: array of SMC ranges with valid values
  57. * @size: SMC ranges array size
  58. *
  59. * This returns the difference between input and output value or negative
  60. * in case of invalid input value.
  61. * If negative returned, then output value = maximal possible from ranges.
  62. */
  63. static int adjust_smc_value(int *value, struct smc_range *range, int size)
  64. {
  65. int maximum = (range + size - 1)->max;
  66. int remainder;
  67. do {
  68. if (*value < range->min) {
  69. remainder = range->min - *value;
  70. *value = range->min; /* nearest valid value */
  71. return remainder;
  72. } else if ((range->min <= *value) && (*value <= range->max))
  73. return 0;
  74. range++;
  75. } while (--size);
  76. *value = maximum;
  77. return -1; /* invalid value */
  78. }
  79. /**
  80. * calc_smc_vals - calculate SMC register values
  81. * @dev: ATA device
  82. * @setup: SMC_SETUP register value
  83. * @pulse: SMC_PULSE register value
  84. * @cycle: SMC_CYCLE register value
  85. *
  86. * This returns negative in case of invalid values for SMC registers:
  87. * -ER_SMC_RECALC - recalculation required for SMC values,
  88. * -ER_SMC_CALC - calculation failed (invalid input values).
  89. *
  90. * SMC use special coding scheme, see "Coding and Range of Timing
  91. * Parameters" table from AT91SAM9 datasheets.
  92. *
  93. * SMC_SETUP = 128*setup[5] + setup[4:0]
  94. * SMC_PULSE = 256*pulse[6] + pulse[5:0]
  95. * SMC_CYCLE = 256*cycle[8:7] + cycle[6:0]
  96. */
  97. static int calc_smc_vals(struct device *dev,
  98. int *setup, int *pulse, int *cycle, int *cs_pulse)
  99. {
  100. int ret_val;
  101. int err = 0;
  102. struct smc_range range_setup[] = { /* SMC_SETUP valid values */
  103. {.min = 0, .max = 31}, /* first range */
  104. {.min = 128, .max = 159} /* second range */
  105. };
  106. struct smc_range range_pulse[] = { /* SMC_PULSE valid values */
  107. {.min = 0, .max = 63}, /* first range */
  108. {.min = 256, .max = 319} /* second range */
  109. };
  110. struct smc_range range_cycle[] = { /* SMC_CYCLE valid values */
  111. {.min = 0, .max = 127}, /* first range */
  112. {.min = 256, .max = 383}, /* second range */
  113. {.min = 512, .max = 639}, /* third range */
  114. {.min = 768, .max = 895} /* fourth range */
  115. };
  116. ret_val = adjust_smc_value(setup, range_setup, ARRAY_SIZE(range_setup));
  117. if (ret_val < 0)
  118. dev_warn(dev, "maximal SMC Setup value\n");
  119. else
  120. *cycle += ret_val;
  121. ret_val = adjust_smc_value(pulse, range_pulse, ARRAY_SIZE(range_pulse));
  122. if (ret_val < 0)
  123. dev_warn(dev, "maximal SMC Pulse value\n");
  124. else
  125. *cycle += ret_val;
  126. ret_val = adjust_smc_value(cycle, range_cycle, ARRAY_SIZE(range_cycle));
  127. if (ret_val < 0)
  128. dev_warn(dev, "maximal SMC Cycle value\n");
  129. *cs_pulse = *cycle;
  130. if (*cs_pulse > CS_PULSE_MAXIMUM) {
  131. dev_err(dev, "unable to calculate valid SMC settings\n");
  132. return -ER_SMC_CALC;
  133. }
  134. ret_val = adjust_smc_value(cs_pulse, range_pulse,
  135. ARRAY_SIZE(range_pulse));
  136. if (ret_val < 0) {
  137. dev_warn(dev, "maximal SMC CS Pulse value\n");
  138. } else if (ret_val != 0) {
  139. *cycle = *cs_pulse;
  140. dev_warn(dev, "SMC Cycle extended\n");
  141. err = -ER_SMC_RECALC;
  142. }
  143. return err;
  144. }
  145. /**
  146. * to_smc_format - convert values into SMC format
  147. * @setup: SETUP value of SMC Setup Register
  148. * @pulse: PULSE value of SMC Pulse Register
  149. * @cycle: CYCLE value of SMC Cycle Register
  150. * @cs_pulse: NCS_PULSE value of SMC Pulse Register
  151. */
  152. static void to_smc_format(int *setup, int *pulse, int *cycle, int *cs_pulse)
  153. {
  154. *setup = (*setup & 0x1f) | ((*setup & 0x80) >> 2);
  155. *pulse = (*pulse & 0x3f) | ((*pulse & 0x100) >> 2);
  156. *cycle = (*cycle & 0x7f) | ((*cycle & 0x300) >> 1);
  157. *cs_pulse = (*cs_pulse & 0x3f) | ((*cs_pulse & 0x100) >> 2);
  158. }
  159. static unsigned long calc_mck_cycles(unsigned long ns, unsigned long mck_hz)
  160. {
  161. unsigned long mul;
  162. /*
  163. * cycles = x [nsec] * f [Hz] / 10^9 [ns in sec] =
  164. * x * (f / 1_000_000_000) =
  165. * x * ((f * 65536) / 1_000_000_000) / 65536 =
  166. * x * (((f / 10_000) * 65536) / 100_000) / 65536 =
  167. */
  168. mul = (mck_hz / 10000) << 16;
  169. mul /= 100000;
  170. return (ns * mul + 65536) >> 16; /* rounding */
  171. }
  172. /**
  173. * set_smc_timing - SMC timings setup.
  174. * @dev: device
  175. * @info: AT91 IDE info
  176. * @ata: ATA timings
  177. *
  178. * Its assumed that write timings are same as read timings,
  179. * cs_setup = 0 and cs_pulse = cycle.
  180. */
  181. static void set_smc_timing(struct device *dev, struct ata_device *adev,
  182. struct at91_ide_info *info, const struct ata_timing *ata)
  183. {
  184. int ret = 0;
  185. int use_iordy;
  186. struct sam9_smc_config smc;
  187. unsigned int t6z; /* data tristate time in ns */
  188. unsigned int cycle; /* SMC Cycle width in MCK ticks */
  189. unsigned int setup; /* SMC Setup width in MCK ticks */
  190. unsigned int pulse; /* CFIOR and CFIOW pulse width in MCK ticks */
  191. unsigned int cs_pulse; /* CS4 or CS5 pulse width in MCK ticks*/
  192. unsigned int tdf_cycles; /* SMC TDF MCK ticks */
  193. unsigned long mck_hz; /* MCK frequency in Hz */
  194. t6z = (ata->mode < XFER_PIO_5) ? 30 : 20;
  195. mck_hz = clk_get_rate(info->mck);
  196. cycle = calc_mck_cycles(ata->cyc8b, mck_hz);
  197. setup = calc_mck_cycles(ata->setup, mck_hz);
  198. pulse = calc_mck_cycles(ata->act8b, mck_hz);
  199. tdf_cycles = calc_mck_cycles(t6z, mck_hz);
  200. do {
  201. ret = calc_smc_vals(dev, &setup, &pulse, &cycle, &cs_pulse);
  202. } while (ret == -ER_SMC_RECALC);
  203. if (ret == -ER_SMC_CALC)
  204. dev_err(dev, "Interface may not operate correctly\n");
  205. dev_dbg(dev, "SMC Setup=%u, Pulse=%u, Cycle=%u, CS Pulse=%u\n",
  206. setup, pulse, cycle, cs_pulse);
  207. to_smc_format(&setup, &pulse, &cycle, &cs_pulse);
  208. /* disable or enable waiting for IORDY signal */
  209. use_iordy = ata_pio_need_iordy(adev);
  210. if (use_iordy)
  211. info->mode |= AT91_SMC_EXNWMODE_READY;
  212. if (tdf_cycles > 15) {
  213. tdf_cycles = 15;
  214. dev_warn(dev, "maximal SMC TDF Cycles value\n");
  215. }
  216. dev_dbg(dev, "Use IORDY=%u, TDF Cycles=%u\n", use_iordy, tdf_cycles);
  217. /* SMC Setup Register */
  218. smc.nwe_setup = smc.nrd_setup = setup;
  219. smc.ncs_write_setup = smc.ncs_read_setup = 0;
  220. /* SMC Pulse Register */
  221. smc.nwe_pulse = smc.nrd_pulse = pulse;
  222. smc.ncs_write_pulse = smc.ncs_read_pulse = cs_pulse;
  223. /* SMC Cycle Register */
  224. smc.write_cycle = smc.read_cycle = cycle;
  225. /* SMC Mode Register*/
  226. smc.tdf_cycles = tdf_cycles;
  227. smc.mode = info->mode;
  228. sam9_smc_configure(0, info->cs, &smc);
  229. }
  230. static void pata_at91_set_piomode(struct ata_port *ap, struct ata_device *adev)
  231. {
  232. struct at91_ide_info *info = ap->host->private_data;
  233. struct ata_timing timing;
  234. int ret;
  235. /* Compute ATA timing and set it to SMC */
  236. ret = ata_timing_compute(adev, adev->pio_mode, &timing, 1000, 0);
  237. if (ret) {
  238. dev_warn(ap->dev, "Failed to compute ATA timing %d, "
  239. "set PIO_0 timing\n", ret);
  240. timing = *ata_timing_find_mode(XFER_PIO_0);
  241. }
  242. set_smc_timing(ap->dev, adev, info, &timing);
  243. }
  244. static unsigned int pata_at91_data_xfer_noirq(struct ata_device *dev,
  245. unsigned char *buf, unsigned int buflen, int rw)
  246. {
  247. struct at91_ide_info *info = dev->link->ap->host->private_data;
  248. unsigned int consumed;
  249. unsigned long flags;
  250. struct sam9_smc_config smc;
  251. local_irq_save(flags);
  252. sam9_smc_read_mode(0, info->cs, &smc);
  253. /* set 16bit mode before writing data */
  254. smc.mode = (smc.mode & ~AT91_SMC_DBW) | AT91_SMC_DBW_16;
  255. sam9_smc_write_mode(0, info->cs, &smc);
  256. consumed = ata_sff_data_xfer(dev, buf, buflen, rw);
  257. /* restore 8bit mode after data is written */
  258. smc.mode = (smc.mode & ~AT91_SMC_DBW) | AT91_SMC_DBW_8;
  259. sam9_smc_write_mode(0, info->cs, &smc);
  260. local_irq_restore(flags);
  261. return consumed;
  262. }
  263. static struct scsi_host_template pata_at91_sht = {
  264. ATA_PIO_SHT(DRV_NAME),
  265. };
  266. static struct ata_port_operations pata_at91_port_ops = {
  267. .inherits = &ata_sff_port_ops,
  268. .sff_data_xfer = pata_at91_data_xfer_noirq,
  269. .set_piomode = pata_at91_set_piomode,
  270. .cable_detect = ata_cable_40wire,
  271. };
  272. static int pata_at91_probe(struct platform_device *pdev)
  273. {
  274. struct at91_cf_data *board = dev_get_platdata(&pdev->dev);
  275. struct device *dev = &pdev->dev;
  276. struct at91_ide_info *info;
  277. struct resource *mem_res;
  278. struct ata_host *host;
  279. struct ata_port *ap;
  280. int irq_flags = 0;
  281. int irq = 0;
  282. int ret;
  283. /* get platform resources: IO/CTL memories and irq/rst pins */
  284. if (pdev->num_resources != 1) {
  285. dev_err(&pdev->dev, "invalid number of resources\n");
  286. return -EINVAL;
  287. }
  288. mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  289. if (!mem_res) {
  290. dev_err(dev, "failed to get mem resource\n");
  291. return -EINVAL;
  292. }
  293. irq = board->irq_pin;
  294. /* init ata host */
  295. host = ata_host_alloc(dev, 1);
  296. if (!host)
  297. return -ENOMEM;
  298. ap = host->ports[0];
  299. ap->ops = &pata_at91_port_ops;
  300. ap->flags |= ATA_FLAG_SLAVE_POSS;
  301. ap->pio_mask = ATA_PIO4;
  302. if (!gpio_is_valid(irq)) {
  303. ap->flags |= ATA_FLAG_PIO_POLLING;
  304. ata_port_desc(ap, "no IRQ, using PIO polling");
  305. }
  306. info = devm_kzalloc(dev, sizeof(*info), GFP_KERNEL);
  307. if (!info) {
  308. dev_err(dev, "failed to allocate memory for private data\n");
  309. return -ENOMEM;
  310. }
  311. info->mck = clk_get(NULL, "mck");
  312. if (IS_ERR(info->mck)) {
  313. dev_err(dev, "failed to get access to mck clock\n");
  314. return -ENODEV;
  315. }
  316. info->cs = board->chipselect;
  317. info->mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
  318. AT91_SMC_EXNWMODE_READY | AT91_SMC_BAT_SELECT |
  319. AT91_SMC_DBW_8 | AT91_SMC_TDF_(0);
  320. info->ide_addr = devm_ioremap(dev,
  321. mem_res->start + CF_IDE_OFFSET, CF_IDE_RES_SIZE);
  322. if (!info->ide_addr) {
  323. dev_err(dev, "failed to map IO base\n");
  324. ret = -ENOMEM;
  325. goto err_put;
  326. }
  327. info->alt_addr = devm_ioremap(dev,
  328. mem_res->start + CF_ALT_IDE_OFFSET, CF_IDE_RES_SIZE);
  329. if (!info->alt_addr) {
  330. dev_err(dev, "failed to map CTL base\n");
  331. ret = -ENOMEM;
  332. goto err_put;
  333. }
  334. ap->ioaddr.cmd_addr = info->ide_addr;
  335. ap->ioaddr.ctl_addr = info->alt_addr + 0x06;
  336. ap->ioaddr.altstatus_addr = ap->ioaddr.ctl_addr;
  337. ata_sff_std_ports(&ap->ioaddr);
  338. ata_port_desc(ap, "mmio cmd 0x%llx ctl 0x%llx",
  339. (unsigned long long)mem_res->start + CF_IDE_OFFSET,
  340. (unsigned long long)mem_res->start + CF_ALT_IDE_OFFSET);
  341. host->private_data = info;
  342. ret = ata_host_activate(host, gpio_is_valid(irq) ? gpio_to_irq(irq) : 0,
  343. gpio_is_valid(irq) ? ata_sff_interrupt : NULL,
  344. irq_flags, &pata_at91_sht);
  345. if (ret)
  346. goto err_put;
  347. return 0;
  348. err_put:
  349. clk_put(info->mck);
  350. return ret;
  351. }
  352. static int pata_at91_remove(struct platform_device *pdev)
  353. {
  354. struct ata_host *host = platform_get_drvdata(pdev);
  355. struct at91_ide_info *info;
  356. if (!host)
  357. return 0;
  358. info = host->private_data;
  359. ata_host_detach(host);
  360. if (!info)
  361. return 0;
  362. clk_put(info->mck);
  363. return 0;
  364. }
  365. static struct platform_driver pata_at91_driver = {
  366. .probe = pata_at91_probe,
  367. .remove = pata_at91_remove,
  368. .driver = {
  369. .name = DRV_NAME,
  370. .owner = THIS_MODULE,
  371. },
  372. };
  373. module_platform_driver(pata_at91_driver);
  374. MODULE_LICENSE("GPL");
  375. MODULE_DESCRIPTION("Driver for CF in True IDE mode on AT91SAM9260 SoC");
  376. MODULE_AUTHOR("Matyukevich Sergey");
  377. MODULE_VERSION(DRV_VERSION);