tlb_uv.c 56 KB

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  1. /*
  2. * SGI UltraViolet TLB flush routines.
  3. *
  4. * (c) 2008-2012 Cliff Wickman <cpw@sgi.com>, SGI.
  5. *
  6. * This code is released under the GNU General Public License version 2 or
  7. * later.
  8. */
  9. #include <linux/seq_file.h>
  10. #include <linux/proc_fs.h>
  11. #include <linux/debugfs.h>
  12. #include <linux/kernel.h>
  13. #include <linux/slab.h>
  14. #include <linux/delay.h>
  15. #include <asm/mmu_context.h>
  16. #include <asm/uv/uv.h>
  17. #include <asm/uv/uv_mmrs.h>
  18. #include <asm/uv/uv_hub.h>
  19. #include <asm/uv/uv_bau.h>
  20. #include <asm/apic.h>
  21. #include <asm/idle.h>
  22. #include <asm/tsc.h>
  23. #include <asm/irq_vectors.h>
  24. #include <asm/timer.h>
  25. /* timeouts in nanoseconds (indexed by UVH_AGING_PRESCALE_SEL urgency7 30:28) */
  26. static int timeout_base_ns[] = {
  27. 20,
  28. 160,
  29. 1280,
  30. 10240,
  31. 81920,
  32. 655360,
  33. 5242880,
  34. 167772160
  35. };
  36. static int timeout_us;
  37. static int nobau;
  38. static int nobau_perm;
  39. static cycles_t congested_cycles;
  40. /* tunables: */
  41. static int max_concurr = MAX_BAU_CONCURRENT;
  42. static int max_concurr_const = MAX_BAU_CONCURRENT;
  43. static int plugged_delay = PLUGGED_DELAY;
  44. static int plugsb4reset = PLUGSB4RESET;
  45. static int giveup_limit = GIVEUP_LIMIT;
  46. static int timeoutsb4reset = TIMEOUTSB4RESET;
  47. static int ipi_reset_limit = IPI_RESET_LIMIT;
  48. static int complete_threshold = COMPLETE_THRESHOLD;
  49. static int congested_respns_us = CONGESTED_RESPONSE_US;
  50. static int congested_reps = CONGESTED_REPS;
  51. static int disabled_period = DISABLED_PERIOD;
  52. static struct tunables tunables[] = {
  53. {&max_concurr, MAX_BAU_CONCURRENT}, /* must be [0] */
  54. {&plugged_delay, PLUGGED_DELAY},
  55. {&plugsb4reset, PLUGSB4RESET},
  56. {&timeoutsb4reset, TIMEOUTSB4RESET},
  57. {&ipi_reset_limit, IPI_RESET_LIMIT},
  58. {&complete_threshold, COMPLETE_THRESHOLD},
  59. {&congested_respns_us, CONGESTED_RESPONSE_US},
  60. {&congested_reps, CONGESTED_REPS},
  61. {&disabled_period, DISABLED_PERIOD},
  62. {&giveup_limit, GIVEUP_LIMIT}
  63. };
  64. static struct dentry *tunables_dir;
  65. static struct dentry *tunables_file;
  66. /* these correspond to the statistics printed by ptc_seq_show() */
  67. static char *stat_description[] = {
  68. "sent: number of shootdown messages sent",
  69. "stime: time spent sending messages",
  70. "numuvhubs: number of hubs targeted with shootdown",
  71. "numuvhubs16: number times 16 or more hubs targeted",
  72. "numuvhubs8: number times 8 or more hubs targeted",
  73. "numuvhubs4: number times 4 or more hubs targeted",
  74. "numuvhubs2: number times 2 or more hubs targeted",
  75. "numuvhubs1: number times 1 hub targeted",
  76. "numcpus: number of cpus targeted with shootdown",
  77. "dto: number of destination timeouts",
  78. "retries: destination timeout retries sent",
  79. "rok: : destination timeouts successfully retried",
  80. "resetp: ipi-style resource resets for plugs",
  81. "resett: ipi-style resource resets for timeouts",
  82. "giveup: fall-backs to ipi-style shootdowns",
  83. "sto: number of source timeouts",
  84. "bz: number of stay-busy's",
  85. "throt: number times spun in throttle",
  86. "swack: image of UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE",
  87. "recv: shootdown messages received",
  88. "rtime: time spent processing messages",
  89. "all: shootdown all-tlb messages",
  90. "one: shootdown one-tlb messages",
  91. "mult: interrupts that found multiple messages",
  92. "none: interrupts that found no messages",
  93. "retry: number of retry messages processed",
  94. "canc: number messages canceled by retries",
  95. "nocan: number retries that found nothing to cancel",
  96. "reset: number of ipi-style reset requests processed",
  97. "rcan: number messages canceled by reset requests",
  98. "disable: number times use of the BAU was disabled",
  99. "enable: number times use of the BAU was re-enabled"
  100. };
  101. static int __init
  102. setup_nobau(char *arg)
  103. {
  104. nobau = 1;
  105. return 0;
  106. }
  107. early_param("nobau", setup_nobau);
  108. /* base pnode in this partition */
  109. static int uv_base_pnode __read_mostly;
  110. static DEFINE_PER_CPU(struct ptc_stats, ptcstats);
  111. static DEFINE_PER_CPU(struct bau_control, bau_control);
  112. static DEFINE_PER_CPU(cpumask_var_t, uv_flush_tlb_mask);
  113. static void
  114. set_bau_on(void)
  115. {
  116. int cpu;
  117. struct bau_control *bcp;
  118. if (nobau_perm) {
  119. pr_info("BAU not initialized; cannot be turned on\n");
  120. return;
  121. }
  122. nobau = 0;
  123. for_each_present_cpu(cpu) {
  124. bcp = &per_cpu(bau_control, cpu);
  125. bcp->nobau = 0;
  126. }
  127. pr_info("BAU turned on\n");
  128. return;
  129. }
  130. static void
  131. set_bau_off(void)
  132. {
  133. int cpu;
  134. struct bau_control *bcp;
  135. nobau = 1;
  136. for_each_present_cpu(cpu) {
  137. bcp = &per_cpu(bau_control, cpu);
  138. bcp->nobau = 1;
  139. }
  140. pr_info("BAU turned off\n");
  141. return;
  142. }
  143. /*
  144. * Determine the first node on a uvhub. 'Nodes' are used for kernel
  145. * memory allocation.
  146. */
  147. static int __init uvhub_to_first_node(int uvhub)
  148. {
  149. int node, b;
  150. for_each_online_node(node) {
  151. b = uv_node_to_blade_id(node);
  152. if (uvhub == b)
  153. return node;
  154. }
  155. return -1;
  156. }
  157. /*
  158. * Determine the apicid of the first cpu on a uvhub.
  159. */
  160. static int __init uvhub_to_first_apicid(int uvhub)
  161. {
  162. int cpu;
  163. for_each_present_cpu(cpu)
  164. if (uvhub == uv_cpu_to_blade_id(cpu))
  165. return per_cpu(x86_cpu_to_apicid, cpu);
  166. return -1;
  167. }
  168. /*
  169. * Free a software acknowledge hardware resource by clearing its Pending
  170. * bit. This will return a reply to the sender.
  171. * If the message has timed out, a reply has already been sent by the
  172. * hardware but the resource has not been released. In that case our
  173. * clear of the Timeout bit (as well) will free the resource. No reply will
  174. * be sent (the hardware will only do one reply per message).
  175. */
  176. static void reply_to_message(struct msg_desc *mdp, struct bau_control *bcp,
  177. int do_acknowledge)
  178. {
  179. unsigned long dw;
  180. struct bau_pq_entry *msg;
  181. msg = mdp->msg;
  182. if (!msg->canceled && do_acknowledge) {
  183. dw = (msg->swack_vec << UV_SW_ACK_NPENDING) | msg->swack_vec;
  184. write_mmr_sw_ack(dw);
  185. }
  186. msg->replied_to = 1;
  187. msg->swack_vec = 0;
  188. }
  189. /*
  190. * Process the receipt of a RETRY message
  191. */
  192. static void bau_process_retry_msg(struct msg_desc *mdp,
  193. struct bau_control *bcp)
  194. {
  195. int i;
  196. int cancel_count = 0;
  197. unsigned long msg_res;
  198. unsigned long mmr = 0;
  199. struct bau_pq_entry *msg = mdp->msg;
  200. struct bau_pq_entry *msg2;
  201. struct ptc_stats *stat = bcp->statp;
  202. stat->d_retries++;
  203. /*
  204. * cancel any message from msg+1 to the retry itself
  205. */
  206. for (msg2 = msg+1, i = 0; i < DEST_Q_SIZE; msg2++, i++) {
  207. if (msg2 > mdp->queue_last)
  208. msg2 = mdp->queue_first;
  209. if (msg2 == msg)
  210. break;
  211. /* same conditions for cancellation as do_reset */
  212. if ((msg2->replied_to == 0) && (msg2->canceled == 0) &&
  213. (msg2->swack_vec) && ((msg2->swack_vec &
  214. msg->swack_vec) == 0) &&
  215. (msg2->sending_cpu == msg->sending_cpu) &&
  216. (msg2->msg_type != MSG_NOOP)) {
  217. mmr = read_mmr_sw_ack();
  218. msg_res = msg2->swack_vec;
  219. /*
  220. * This is a message retry; clear the resources held
  221. * by the previous message only if they timed out.
  222. * If it has not timed out we have an unexpected
  223. * situation to report.
  224. */
  225. if (mmr & (msg_res << UV_SW_ACK_NPENDING)) {
  226. unsigned long mr;
  227. /*
  228. * Is the resource timed out?
  229. * Make everyone ignore the cancelled message.
  230. */
  231. msg2->canceled = 1;
  232. stat->d_canceled++;
  233. cancel_count++;
  234. mr = (msg_res << UV_SW_ACK_NPENDING) | msg_res;
  235. write_mmr_sw_ack(mr);
  236. }
  237. }
  238. }
  239. if (!cancel_count)
  240. stat->d_nocanceled++;
  241. }
  242. /*
  243. * Do all the things a cpu should do for a TLB shootdown message.
  244. * Other cpu's may come here at the same time for this message.
  245. */
  246. static void bau_process_message(struct msg_desc *mdp, struct bau_control *bcp,
  247. int do_acknowledge)
  248. {
  249. short socket_ack_count = 0;
  250. short *sp;
  251. struct atomic_short *asp;
  252. struct ptc_stats *stat = bcp->statp;
  253. struct bau_pq_entry *msg = mdp->msg;
  254. struct bau_control *smaster = bcp->socket_master;
  255. /*
  256. * This must be a normal message, or retry of a normal message
  257. */
  258. if (msg->address == TLB_FLUSH_ALL) {
  259. local_flush_tlb();
  260. stat->d_alltlb++;
  261. } else {
  262. __flush_tlb_one(msg->address);
  263. stat->d_onetlb++;
  264. }
  265. stat->d_requestee++;
  266. /*
  267. * One cpu on each uvhub has the additional job on a RETRY
  268. * of releasing the resource held by the message that is
  269. * being retried. That message is identified by sending
  270. * cpu number.
  271. */
  272. if (msg->msg_type == MSG_RETRY && bcp == bcp->uvhub_master)
  273. bau_process_retry_msg(mdp, bcp);
  274. /*
  275. * This is a swack message, so we have to reply to it.
  276. * Count each responding cpu on the socket. This avoids
  277. * pinging the count's cache line back and forth between
  278. * the sockets.
  279. */
  280. sp = &smaster->socket_acknowledge_count[mdp->msg_slot];
  281. asp = (struct atomic_short *)sp;
  282. socket_ack_count = atom_asr(1, asp);
  283. if (socket_ack_count == bcp->cpus_in_socket) {
  284. int msg_ack_count;
  285. /*
  286. * Both sockets dump their completed count total into
  287. * the message's count.
  288. */
  289. *sp = 0;
  290. asp = (struct atomic_short *)&msg->acknowledge_count;
  291. msg_ack_count = atom_asr(socket_ack_count, asp);
  292. if (msg_ack_count == bcp->cpus_in_uvhub) {
  293. /*
  294. * All cpus in uvhub saw it; reply
  295. * (unless we are in the UV2 workaround)
  296. */
  297. reply_to_message(mdp, bcp, do_acknowledge);
  298. }
  299. }
  300. return;
  301. }
  302. /*
  303. * Determine the first cpu on a pnode.
  304. */
  305. static int pnode_to_first_cpu(int pnode, struct bau_control *smaster)
  306. {
  307. int cpu;
  308. struct hub_and_pnode *hpp;
  309. for_each_present_cpu(cpu) {
  310. hpp = &smaster->thp[cpu];
  311. if (pnode == hpp->pnode)
  312. return cpu;
  313. }
  314. return -1;
  315. }
  316. /*
  317. * Last resort when we get a large number of destination timeouts is
  318. * to clear resources held by a given cpu.
  319. * Do this with IPI so that all messages in the BAU message queue
  320. * can be identified by their nonzero swack_vec field.
  321. *
  322. * This is entered for a single cpu on the uvhub.
  323. * The sender want's this uvhub to free a specific message's
  324. * swack resources.
  325. */
  326. static void do_reset(void *ptr)
  327. {
  328. int i;
  329. struct bau_control *bcp = &per_cpu(bau_control, smp_processor_id());
  330. struct reset_args *rap = (struct reset_args *)ptr;
  331. struct bau_pq_entry *msg;
  332. struct ptc_stats *stat = bcp->statp;
  333. stat->d_resets++;
  334. /*
  335. * We're looking for the given sender, and
  336. * will free its swack resource.
  337. * If all cpu's finally responded after the timeout, its
  338. * message 'replied_to' was set.
  339. */
  340. for (msg = bcp->queue_first, i = 0; i < DEST_Q_SIZE; msg++, i++) {
  341. unsigned long msg_res;
  342. /* do_reset: same conditions for cancellation as
  343. bau_process_retry_msg() */
  344. if ((msg->replied_to == 0) &&
  345. (msg->canceled == 0) &&
  346. (msg->sending_cpu == rap->sender) &&
  347. (msg->swack_vec) &&
  348. (msg->msg_type != MSG_NOOP)) {
  349. unsigned long mmr;
  350. unsigned long mr;
  351. /*
  352. * make everyone else ignore this message
  353. */
  354. msg->canceled = 1;
  355. /*
  356. * only reset the resource if it is still pending
  357. */
  358. mmr = read_mmr_sw_ack();
  359. msg_res = msg->swack_vec;
  360. mr = (msg_res << UV_SW_ACK_NPENDING) | msg_res;
  361. if (mmr & msg_res) {
  362. stat->d_rcanceled++;
  363. write_mmr_sw_ack(mr);
  364. }
  365. }
  366. }
  367. return;
  368. }
  369. /*
  370. * Use IPI to get all target uvhubs to release resources held by
  371. * a given sending cpu number.
  372. */
  373. static void reset_with_ipi(struct pnmask *distribution, struct bau_control *bcp)
  374. {
  375. int pnode;
  376. int apnode;
  377. int maskbits;
  378. int sender = bcp->cpu;
  379. cpumask_t *mask = bcp->uvhub_master->cpumask;
  380. struct bau_control *smaster = bcp->socket_master;
  381. struct reset_args reset_args;
  382. reset_args.sender = sender;
  383. cpus_clear(*mask);
  384. /* find a single cpu for each uvhub in this distribution mask */
  385. maskbits = sizeof(struct pnmask) * BITSPERBYTE;
  386. /* each bit is a pnode relative to the partition base pnode */
  387. for (pnode = 0; pnode < maskbits; pnode++) {
  388. int cpu;
  389. if (!bau_uvhub_isset(pnode, distribution))
  390. continue;
  391. apnode = pnode + bcp->partition_base_pnode;
  392. cpu = pnode_to_first_cpu(apnode, smaster);
  393. cpu_set(cpu, *mask);
  394. }
  395. /* IPI all cpus; preemption is already disabled */
  396. smp_call_function_many(mask, do_reset, (void *)&reset_args, 1);
  397. return;
  398. }
  399. /*
  400. * Not to be confused with cycles_2_ns() from tsc.c; this gives a relative
  401. * number, not an absolute. It converts a duration in cycles to a duration in
  402. * ns.
  403. */
  404. static inline unsigned long long cycles_2_ns(unsigned long long cyc)
  405. {
  406. struct cyc2ns_data *data = cyc2ns_read_begin();
  407. unsigned long long ns;
  408. ns = mul_u64_u32_shr(cyc, data->cyc2ns_mul, data->cyc2ns_shift);
  409. cyc2ns_read_end(data);
  410. return ns;
  411. }
  412. /*
  413. * The reverse of the above; converts a duration in ns to a duration in cycles.
  414. */
  415. static inline unsigned long long ns_2_cycles(unsigned long long ns)
  416. {
  417. struct cyc2ns_data *data = cyc2ns_read_begin();
  418. unsigned long long cyc;
  419. cyc = (ns << data->cyc2ns_shift) / data->cyc2ns_mul;
  420. cyc2ns_read_end(data);
  421. return cyc;
  422. }
  423. static inline unsigned long cycles_2_us(unsigned long long cyc)
  424. {
  425. return cycles_2_ns(cyc) / NSEC_PER_USEC;
  426. }
  427. static inline cycles_t sec_2_cycles(unsigned long sec)
  428. {
  429. return ns_2_cycles(sec * NSEC_PER_SEC);
  430. }
  431. static inline unsigned long long usec_2_cycles(unsigned long usec)
  432. {
  433. return ns_2_cycles(usec * NSEC_PER_USEC);
  434. }
  435. /*
  436. * wait for all cpus on this hub to finish their sends and go quiet
  437. * leaves uvhub_quiesce set so that no new broadcasts are started by
  438. * bau_flush_send_and_wait()
  439. */
  440. static inline void quiesce_local_uvhub(struct bau_control *hmaster)
  441. {
  442. atom_asr(1, (struct atomic_short *)&hmaster->uvhub_quiesce);
  443. }
  444. /*
  445. * mark this quiet-requestor as done
  446. */
  447. static inline void end_uvhub_quiesce(struct bau_control *hmaster)
  448. {
  449. atom_asr(-1, (struct atomic_short *)&hmaster->uvhub_quiesce);
  450. }
  451. static unsigned long uv1_read_status(unsigned long mmr_offset, int right_shift)
  452. {
  453. unsigned long descriptor_status;
  454. descriptor_status = uv_read_local_mmr(mmr_offset);
  455. descriptor_status >>= right_shift;
  456. descriptor_status &= UV_ACT_STATUS_MASK;
  457. return descriptor_status;
  458. }
  459. /*
  460. * Wait for completion of a broadcast software ack message
  461. * return COMPLETE, RETRY(PLUGGED or TIMEOUT) or GIVEUP
  462. */
  463. static int uv1_wait_completion(struct bau_desc *bau_desc,
  464. unsigned long mmr_offset, int right_shift,
  465. struct bau_control *bcp, long try)
  466. {
  467. unsigned long descriptor_status;
  468. cycles_t ttm;
  469. struct ptc_stats *stat = bcp->statp;
  470. descriptor_status = uv1_read_status(mmr_offset, right_shift);
  471. /* spin on the status MMR, waiting for it to go idle */
  472. while ((descriptor_status != DS_IDLE)) {
  473. /*
  474. * Our software ack messages may be blocked because
  475. * there are no swack resources available. As long
  476. * as none of them has timed out hardware will NACK
  477. * our message and its state will stay IDLE.
  478. */
  479. if (descriptor_status == DS_SOURCE_TIMEOUT) {
  480. stat->s_stimeout++;
  481. return FLUSH_GIVEUP;
  482. } else if (descriptor_status == DS_DESTINATION_TIMEOUT) {
  483. stat->s_dtimeout++;
  484. ttm = get_cycles();
  485. /*
  486. * Our retries may be blocked by all destination
  487. * swack resources being consumed, and a timeout
  488. * pending. In that case hardware returns the
  489. * ERROR that looks like a destination timeout.
  490. */
  491. if (cycles_2_us(ttm - bcp->send_message) < timeout_us) {
  492. bcp->conseccompletes = 0;
  493. return FLUSH_RETRY_PLUGGED;
  494. }
  495. bcp->conseccompletes = 0;
  496. return FLUSH_RETRY_TIMEOUT;
  497. } else {
  498. /*
  499. * descriptor_status is still BUSY
  500. */
  501. cpu_relax();
  502. }
  503. descriptor_status = uv1_read_status(mmr_offset, right_shift);
  504. }
  505. bcp->conseccompletes++;
  506. return FLUSH_COMPLETE;
  507. }
  508. /*
  509. * UV2 could have an extra bit of status in the ACTIVATION_STATUS_2 register.
  510. * But not currently used.
  511. */
  512. static unsigned long uv2_read_status(unsigned long offset, int rshft, int desc)
  513. {
  514. unsigned long descriptor_status;
  515. descriptor_status =
  516. ((read_lmmr(offset) >> rshft) & UV_ACT_STATUS_MASK) << 1;
  517. return descriptor_status;
  518. }
  519. /*
  520. * Return whether the status of the descriptor that is normally used for this
  521. * cpu (the one indexed by its hub-relative cpu number) is busy.
  522. * The status of the original 32 descriptors is always reflected in the 64
  523. * bits of UVH_LB_BAU_SB_ACTIVATION_STATUS_0.
  524. * The bit provided by the activation_status_2 register is irrelevant to
  525. * the status if it is only being tested for busy or not busy.
  526. */
  527. int normal_busy(struct bau_control *bcp)
  528. {
  529. int cpu = bcp->uvhub_cpu;
  530. int mmr_offset;
  531. int right_shift;
  532. mmr_offset = UVH_LB_BAU_SB_ACTIVATION_STATUS_0;
  533. right_shift = cpu * UV_ACT_STATUS_SIZE;
  534. return (((((read_lmmr(mmr_offset) >> right_shift) &
  535. UV_ACT_STATUS_MASK)) << 1) == UV2H_DESC_BUSY);
  536. }
  537. /*
  538. * Entered when a bau descriptor has gone into a permanent busy wait because
  539. * of a hardware bug.
  540. * Workaround the bug.
  541. */
  542. int handle_uv2_busy(struct bau_control *bcp)
  543. {
  544. struct ptc_stats *stat = bcp->statp;
  545. stat->s_uv2_wars++;
  546. bcp->busy = 1;
  547. return FLUSH_GIVEUP;
  548. }
  549. static int uv2_wait_completion(struct bau_desc *bau_desc,
  550. unsigned long mmr_offset, int right_shift,
  551. struct bau_control *bcp, long try)
  552. {
  553. unsigned long descriptor_stat;
  554. cycles_t ttm;
  555. int desc = bcp->uvhub_cpu;
  556. long busy_reps = 0;
  557. struct ptc_stats *stat = bcp->statp;
  558. descriptor_stat = uv2_read_status(mmr_offset, right_shift, desc);
  559. /* spin on the status MMR, waiting for it to go idle */
  560. while (descriptor_stat != UV2H_DESC_IDLE) {
  561. if ((descriptor_stat == UV2H_DESC_SOURCE_TIMEOUT)) {
  562. /*
  563. * A h/w bug on the destination side may
  564. * have prevented the message being marked
  565. * pending, thus it doesn't get replied to
  566. * and gets continually nacked until it times
  567. * out with a SOURCE_TIMEOUT.
  568. */
  569. stat->s_stimeout++;
  570. return FLUSH_GIVEUP;
  571. } else if (descriptor_stat == UV2H_DESC_DEST_TIMEOUT) {
  572. ttm = get_cycles();
  573. /*
  574. * Our retries may be blocked by all destination
  575. * swack resources being consumed, and a timeout
  576. * pending. In that case hardware returns the
  577. * ERROR that looks like a destination timeout.
  578. * Without using the extended status we have to
  579. * deduce from the short time that this was a
  580. * strong nack.
  581. */
  582. if (cycles_2_us(ttm - bcp->send_message) < timeout_us) {
  583. bcp->conseccompletes = 0;
  584. stat->s_plugged++;
  585. /* FLUSH_RETRY_PLUGGED causes hang on boot */
  586. return FLUSH_GIVEUP;
  587. }
  588. stat->s_dtimeout++;
  589. bcp->conseccompletes = 0;
  590. /* FLUSH_RETRY_TIMEOUT causes hang on boot */
  591. return FLUSH_GIVEUP;
  592. } else {
  593. busy_reps++;
  594. if (busy_reps > 1000000) {
  595. /* not to hammer on the clock */
  596. busy_reps = 0;
  597. ttm = get_cycles();
  598. if ((ttm - bcp->send_message) >
  599. bcp->timeout_interval)
  600. return handle_uv2_busy(bcp);
  601. }
  602. /*
  603. * descriptor_stat is still BUSY
  604. */
  605. cpu_relax();
  606. }
  607. descriptor_stat = uv2_read_status(mmr_offset, right_shift,
  608. desc);
  609. }
  610. bcp->conseccompletes++;
  611. return FLUSH_COMPLETE;
  612. }
  613. /*
  614. * There are 2 status registers; each and array[32] of 2 bits. Set up for
  615. * which register to read and position in that register based on cpu in
  616. * current hub.
  617. */
  618. static int wait_completion(struct bau_desc *bau_desc,
  619. struct bau_control *bcp, long try)
  620. {
  621. int right_shift;
  622. unsigned long mmr_offset;
  623. int desc = bcp->uvhub_cpu;
  624. if (desc < UV_CPUS_PER_AS) {
  625. mmr_offset = UVH_LB_BAU_SB_ACTIVATION_STATUS_0;
  626. right_shift = desc * UV_ACT_STATUS_SIZE;
  627. } else {
  628. mmr_offset = UVH_LB_BAU_SB_ACTIVATION_STATUS_1;
  629. right_shift = ((desc - UV_CPUS_PER_AS) * UV_ACT_STATUS_SIZE);
  630. }
  631. if (bcp->uvhub_version == 1)
  632. return uv1_wait_completion(bau_desc, mmr_offset, right_shift,
  633. bcp, try);
  634. else
  635. return uv2_wait_completion(bau_desc, mmr_offset, right_shift,
  636. bcp, try);
  637. }
  638. /*
  639. * Our retries are blocked by all destination sw ack resources being
  640. * in use, and a timeout is pending. In that case hardware immediately
  641. * returns the ERROR that looks like a destination timeout.
  642. */
  643. static void destination_plugged(struct bau_desc *bau_desc,
  644. struct bau_control *bcp,
  645. struct bau_control *hmaster, struct ptc_stats *stat)
  646. {
  647. udelay(bcp->plugged_delay);
  648. bcp->plugged_tries++;
  649. if (bcp->plugged_tries >= bcp->plugsb4reset) {
  650. bcp->plugged_tries = 0;
  651. quiesce_local_uvhub(hmaster);
  652. spin_lock(&hmaster->queue_lock);
  653. reset_with_ipi(&bau_desc->distribution, bcp);
  654. spin_unlock(&hmaster->queue_lock);
  655. end_uvhub_quiesce(hmaster);
  656. bcp->ipi_attempts++;
  657. stat->s_resets_plug++;
  658. }
  659. }
  660. static void destination_timeout(struct bau_desc *bau_desc,
  661. struct bau_control *bcp, struct bau_control *hmaster,
  662. struct ptc_stats *stat)
  663. {
  664. hmaster->max_concurr = 1;
  665. bcp->timeout_tries++;
  666. if (bcp->timeout_tries >= bcp->timeoutsb4reset) {
  667. bcp->timeout_tries = 0;
  668. quiesce_local_uvhub(hmaster);
  669. spin_lock(&hmaster->queue_lock);
  670. reset_with_ipi(&bau_desc->distribution, bcp);
  671. spin_unlock(&hmaster->queue_lock);
  672. end_uvhub_quiesce(hmaster);
  673. bcp->ipi_attempts++;
  674. stat->s_resets_timeout++;
  675. }
  676. }
  677. /*
  678. * Stop all cpus on a uvhub from using the BAU for a period of time.
  679. * This is reversed by check_enable.
  680. */
  681. static void disable_for_period(struct bau_control *bcp, struct ptc_stats *stat)
  682. {
  683. int tcpu;
  684. struct bau_control *tbcp;
  685. struct bau_control *hmaster;
  686. cycles_t tm1;
  687. hmaster = bcp->uvhub_master;
  688. spin_lock(&hmaster->disable_lock);
  689. if (!bcp->baudisabled) {
  690. stat->s_bau_disabled++;
  691. tm1 = get_cycles();
  692. for_each_present_cpu(tcpu) {
  693. tbcp = &per_cpu(bau_control, tcpu);
  694. if (tbcp->uvhub_master == hmaster) {
  695. tbcp->baudisabled = 1;
  696. tbcp->set_bau_on_time =
  697. tm1 + bcp->disabled_period;
  698. }
  699. }
  700. }
  701. spin_unlock(&hmaster->disable_lock);
  702. }
  703. static void count_max_concurr(int stat, struct bau_control *bcp,
  704. struct bau_control *hmaster)
  705. {
  706. bcp->plugged_tries = 0;
  707. bcp->timeout_tries = 0;
  708. if (stat != FLUSH_COMPLETE)
  709. return;
  710. if (bcp->conseccompletes <= bcp->complete_threshold)
  711. return;
  712. if (hmaster->max_concurr >= hmaster->max_concurr_const)
  713. return;
  714. hmaster->max_concurr++;
  715. }
  716. static void record_send_stats(cycles_t time1, cycles_t time2,
  717. struct bau_control *bcp, struct ptc_stats *stat,
  718. int completion_status, int try)
  719. {
  720. cycles_t elapsed;
  721. if (time2 > time1) {
  722. elapsed = time2 - time1;
  723. stat->s_time += elapsed;
  724. if ((completion_status == FLUSH_COMPLETE) && (try == 1)) {
  725. bcp->period_requests++;
  726. bcp->period_time += elapsed;
  727. if ((elapsed > congested_cycles) &&
  728. (bcp->period_requests > bcp->cong_reps) &&
  729. ((bcp->period_time / bcp->period_requests) >
  730. congested_cycles)) {
  731. stat->s_congested++;
  732. disable_for_period(bcp, stat);
  733. }
  734. }
  735. } else
  736. stat->s_requestor--;
  737. if (completion_status == FLUSH_COMPLETE && try > 1)
  738. stat->s_retriesok++;
  739. else if (completion_status == FLUSH_GIVEUP) {
  740. stat->s_giveup++;
  741. if (get_cycles() > bcp->period_end)
  742. bcp->period_giveups = 0;
  743. bcp->period_giveups++;
  744. if (bcp->period_giveups == 1)
  745. bcp->period_end = get_cycles() + bcp->disabled_period;
  746. if (bcp->period_giveups > bcp->giveup_limit) {
  747. disable_for_period(bcp, stat);
  748. stat->s_giveuplimit++;
  749. }
  750. }
  751. }
  752. /*
  753. * Because of a uv1 hardware bug only a limited number of concurrent
  754. * requests can be made.
  755. */
  756. static void uv1_throttle(struct bau_control *hmaster, struct ptc_stats *stat)
  757. {
  758. spinlock_t *lock = &hmaster->uvhub_lock;
  759. atomic_t *v;
  760. v = &hmaster->active_descriptor_count;
  761. if (!atomic_inc_unless_ge(lock, v, hmaster->max_concurr)) {
  762. stat->s_throttles++;
  763. do {
  764. cpu_relax();
  765. } while (!atomic_inc_unless_ge(lock, v, hmaster->max_concurr));
  766. }
  767. }
  768. /*
  769. * Handle the completion status of a message send.
  770. */
  771. static void handle_cmplt(int completion_status, struct bau_desc *bau_desc,
  772. struct bau_control *bcp, struct bau_control *hmaster,
  773. struct ptc_stats *stat)
  774. {
  775. if (completion_status == FLUSH_RETRY_PLUGGED)
  776. destination_plugged(bau_desc, bcp, hmaster, stat);
  777. else if (completion_status == FLUSH_RETRY_TIMEOUT)
  778. destination_timeout(bau_desc, bcp, hmaster, stat);
  779. }
  780. /*
  781. * Send a broadcast and wait for it to complete.
  782. *
  783. * The flush_mask contains the cpus the broadcast is to be sent to including
  784. * cpus that are on the local uvhub.
  785. *
  786. * Returns 0 if all flushing represented in the mask was done.
  787. * Returns 1 if it gives up entirely and the original cpu mask is to be
  788. * returned to the kernel.
  789. */
  790. int uv_flush_send_and_wait(struct cpumask *flush_mask, struct bau_control *bcp,
  791. struct bau_desc *bau_desc)
  792. {
  793. int seq_number = 0;
  794. int completion_stat = 0;
  795. int uv1 = 0;
  796. long try = 0;
  797. unsigned long index;
  798. cycles_t time1;
  799. cycles_t time2;
  800. struct ptc_stats *stat = bcp->statp;
  801. struct bau_control *hmaster = bcp->uvhub_master;
  802. struct uv1_bau_msg_header *uv1_hdr = NULL;
  803. struct uv2_bau_msg_header *uv2_hdr = NULL;
  804. if (bcp->uvhub_version == 1) {
  805. uv1 = 1;
  806. uv1_throttle(hmaster, stat);
  807. }
  808. while (hmaster->uvhub_quiesce)
  809. cpu_relax();
  810. time1 = get_cycles();
  811. if (uv1)
  812. uv1_hdr = &bau_desc->header.uv1_hdr;
  813. else
  814. uv2_hdr = &bau_desc->header.uv2_hdr;
  815. do {
  816. if (try == 0) {
  817. if (uv1)
  818. uv1_hdr->msg_type = MSG_REGULAR;
  819. else
  820. uv2_hdr->msg_type = MSG_REGULAR;
  821. seq_number = bcp->message_number++;
  822. } else {
  823. if (uv1)
  824. uv1_hdr->msg_type = MSG_RETRY;
  825. else
  826. uv2_hdr->msg_type = MSG_RETRY;
  827. stat->s_retry_messages++;
  828. }
  829. if (uv1)
  830. uv1_hdr->sequence = seq_number;
  831. else
  832. uv2_hdr->sequence = seq_number;
  833. index = (1UL << AS_PUSH_SHIFT) | bcp->uvhub_cpu;
  834. bcp->send_message = get_cycles();
  835. write_mmr_activation(index);
  836. try++;
  837. completion_stat = wait_completion(bau_desc, bcp, try);
  838. handle_cmplt(completion_stat, bau_desc, bcp, hmaster, stat);
  839. if (bcp->ipi_attempts >= bcp->ipi_reset_limit) {
  840. bcp->ipi_attempts = 0;
  841. stat->s_overipilimit++;
  842. completion_stat = FLUSH_GIVEUP;
  843. break;
  844. }
  845. cpu_relax();
  846. } while ((completion_stat == FLUSH_RETRY_PLUGGED) ||
  847. (completion_stat == FLUSH_RETRY_TIMEOUT));
  848. time2 = get_cycles();
  849. count_max_concurr(completion_stat, bcp, hmaster);
  850. while (hmaster->uvhub_quiesce)
  851. cpu_relax();
  852. atomic_dec(&hmaster->active_descriptor_count);
  853. record_send_stats(time1, time2, bcp, stat, completion_stat, try);
  854. if (completion_stat == FLUSH_GIVEUP)
  855. /* FLUSH_GIVEUP will fall back to using IPI's for tlb flush */
  856. return 1;
  857. return 0;
  858. }
  859. /*
  860. * The BAU is disabled for this uvhub. When the disabled time period has
  861. * expired re-enable it.
  862. * Return 0 if it is re-enabled for all cpus on this uvhub.
  863. */
  864. static int check_enable(struct bau_control *bcp, struct ptc_stats *stat)
  865. {
  866. int tcpu;
  867. struct bau_control *tbcp;
  868. struct bau_control *hmaster;
  869. hmaster = bcp->uvhub_master;
  870. spin_lock(&hmaster->disable_lock);
  871. if (bcp->baudisabled && (get_cycles() >= bcp->set_bau_on_time)) {
  872. stat->s_bau_reenabled++;
  873. for_each_present_cpu(tcpu) {
  874. tbcp = &per_cpu(bau_control, tcpu);
  875. if (tbcp->uvhub_master == hmaster) {
  876. tbcp->baudisabled = 0;
  877. tbcp->period_requests = 0;
  878. tbcp->period_time = 0;
  879. tbcp->period_giveups = 0;
  880. }
  881. }
  882. spin_unlock(&hmaster->disable_lock);
  883. return 0;
  884. }
  885. spin_unlock(&hmaster->disable_lock);
  886. return -1;
  887. }
  888. static void record_send_statistics(struct ptc_stats *stat, int locals, int hubs,
  889. int remotes, struct bau_desc *bau_desc)
  890. {
  891. stat->s_requestor++;
  892. stat->s_ntargcpu += remotes + locals;
  893. stat->s_ntargremotes += remotes;
  894. stat->s_ntarglocals += locals;
  895. /* uvhub statistics */
  896. hubs = bau_uvhub_weight(&bau_desc->distribution);
  897. if (locals) {
  898. stat->s_ntarglocaluvhub++;
  899. stat->s_ntargremoteuvhub += (hubs - 1);
  900. } else
  901. stat->s_ntargremoteuvhub += hubs;
  902. stat->s_ntarguvhub += hubs;
  903. if (hubs >= 16)
  904. stat->s_ntarguvhub16++;
  905. else if (hubs >= 8)
  906. stat->s_ntarguvhub8++;
  907. else if (hubs >= 4)
  908. stat->s_ntarguvhub4++;
  909. else if (hubs >= 2)
  910. stat->s_ntarguvhub2++;
  911. else
  912. stat->s_ntarguvhub1++;
  913. }
  914. /*
  915. * Translate a cpu mask to the uvhub distribution mask in the BAU
  916. * activation descriptor.
  917. */
  918. static int set_distrib_bits(struct cpumask *flush_mask, struct bau_control *bcp,
  919. struct bau_desc *bau_desc, int *localsp, int *remotesp)
  920. {
  921. int cpu;
  922. int pnode;
  923. int cnt = 0;
  924. struct hub_and_pnode *hpp;
  925. for_each_cpu(cpu, flush_mask) {
  926. /*
  927. * The distribution vector is a bit map of pnodes, relative
  928. * to the partition base pnode (and the partition base nasid
  929. * in the header).
  930. * Translate cpu to pnode and hub using a local memory array.
  931. */
  932. hpp = &bcp->socket_master->thp[cpu];
  933. pnode = hpp->pnode - bcp->partition_base_pnode;
  934. bau_uvhub_set(pnode, &bau_desc->distribution);
  935. cnt++;
  936. if (hpp->uvhub == bcp->uvhub)
  937. (*localsp)++;
  938. else
  939. (*remotesp)++;
  940. }
  941. if (!cnt)
  942. return 1;
  943. return 0;
  944. }
  945. /*
  946. * globally purge translation cache of a virtual address or all TLB's
  947. * @cpumask: mask of all cpu's in which the address is to be removed
  948. * @mm: mm_struct containing virtual address range
  949. * @start: start virtual address to be removed from TLB
  950. * @end: end virtual address to be remove from TLB
  951. * @cpu: the current cpu
  952. *
  953. * This is the entry point for initiating any UV global TLB shootdown.
  954. *
  955. * Purges the translation caches of all specified processors of the given
  956. * virtual address, or purges all TLB's on specified processors.
  957. *
  958. * The caller has derived the cpumask from the mm_struct. This function
  959. * is called only if there are bits set in the mask. (e.g. flush_tlb_page())
  960. *
  961. * The cpumask is converted into a uvhubmask of the uvhubs containing
  962. * those cpus.
  963. *
  964. * Note that this function should be called with preemption disabled.
  965. *
  966. * Returns NULL if all remote flushing was done.
  967. * Returns pointer to cpumask if some remote flushing remains to be
  968. * done. The returned pointer is valid till preemption is re-enabled.
  969. */
  970. const struct cpumask *uv_flush_tlb_others(const struct cpumask *cpumask,
  971. struct mm_struct *mm, unsigned long start,
  972. unsigned long end, unsigned int cpu)
  973. {
  974. int locals = 0;
  975. int remotes = 0;
  976. int hubs = 0;
  977. struct bau_desc *bau_desc;
  978. struct cpumask *flush_mask;
  979. struct ptc_stats *stat;
  980. struct bau_control *bcp;
  981. unsigned long descriptor_status;
  982. unsigned long status;
  983. bcp = &per_cpu(bau_control, cpu);
  984. if (bcp->nobau)
  985. return cpumask;
  986. stat = bcp->statp;
  987. stat->s_enters++;
  988. if (bcp->busy) {
  989. descriptor_status =
  990. read_lmmr(UVH_LB_BAU_SB_ACTIVATION_STATUS_0);
  991. status = ((descriptor_status >> (bcp->uvhub_cpu *
  992. UV_ACT_STATUS_SIZE)) & UV_ACT_STATUS_MASK) << 1;
  993. if (status == UV2H_DESC_BUSY)
  994. return cpumask;
  995. bcp->busy = 0;
  996. }
  997. /* bau was disabled due to slow response */
  998. if (bcp->baudisabled) {
  999. if (check_enable(bcp, stat)) {
  1000. stat->s_ipifordisabled++;
  1001. return cpumask;
  1002. }
  1003. }
  1004. /*
  1005. * Each sending cpu has a per-cpu mask which it fills from the caller's
  1006. * cpu mask. All cpus are converted to uvhubs and copied to the
  1007. * activation descriptor.
  1008. */
  1009. flush_mask = (struct cpumask *)per_cpu(uv_flush_tlb_mask, cpu);
  1010. /* don't actually do a shootdown of the local cpu */
  1011. cpumask_andnot(flush_mask, cpumask, cpumask_of(cpu));
  1012. if (cpu_isset(cpu, *cpumask))
  1013. stat->s_ntargself++;
  1014. bau_desc = bcp->descriptor_base;
  1015. bau_desc += (ITEMS_PER_DESC * bcp->uvhub_cpu);
  1016. bau_uvhubs_clear(&bau_desc->distribution, UV_DISTRIBUTION_SIZE);
  1017. if (set_distrib_bits(flush_mask, bcp, bau_desc, &locals, &remotes))
  1018. return NULL;
  1019. record_send_statistics(stat, locals, hubs, remotes, bau_desc);
  1020. if (!end || (end - start) <= PAGE_SIZE)
  1021. bau_desc->payload.address = start;
  1022. else
  1023. bau_desc->payload.address = TLB_FLUSH_ALL;
  1024. bau_desc->payload.sending_cpu = cpu;
  1025. /*
  1026. * uv_flush_send_and_wait returns 0 if all cpu's were messaged,
  1027. * or 1 if it gave up and the original cpumask should be returned.
  1028. */
  1029. if (!uv_flush_send_and_wait(flush_mask, bcp, bau_desc))
  1030. return NULL;
  1031. else
  1032. return cpumask;
  1033. }
  1034. /*
  1035. * Search the message queue for any 'other' unprocessed message with the
  1036. * same software acknowledge resource bit vector as the 'msg' message.
  1037. */
  1038. struct bau_pq_entry *find_another_by_swack(struct bau_pq_entry *msg,
  1039. struct bau_control *bcp)
  1040. {
  1041. struct bau_pq_entry *msg_next = msg + 1;
  1042. unsigned char swack_vec = msg->swack_vec;
  1043. if (msg_next > bcp->queue_last)
  1044. msg_next = bcp->queue_first;
  1045. while (msg_next != msg) {
  1046. if ((msg_next->canceled == 0) && (msg_next->replied_to == 0) &&
  1047. (msg_next->swack_vec == swack_vec))
  1048. return msg_next;
  1049. msg_next++;
  1050. if (msg_next > bcp->queue_last)
  1051. msg_next = bcp->queue_first;
  1052. }
  1053. return NULL;
  1054. }
  1055. /*
  1056. * UV2 needs to work around a bug in which an arriving message has not
  1057. * set a bit in the UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE register.
  1058. * Such a message must be ignored.
  1059. */
  1060. void process_uv2_message(struct msg_desc *mdp, struct bau_control *bcp)
  1061. {
  1062. unsigned long mmr_image;
  1063. unsigned char swack_vec;
  1064. struct bau_pq_entry *msg = mdp->msg;
  1065. struct bau_pq_entry *other_msg;
  1066. mmr_image = read_mmr_sw_ack();
  1067. swack_vec = msg->swack_vec;
  1068. if ((swack_vec & mmr_image) == 0) {
  1069. /*
  1070. * This message was assigned a swack resource, but no
  1071. * reserved acknowlegment is pending.
  1072. * The bug has prevented this message from setting the MMR.
  1073. */
  1074. /*
  1075. * Some message has set the MMR 'pending' bit; it might have
  1076. * been another message. Look for that message.
  1077. */
  1078. other_msg = find_another_by_swack(msg, bcp);
  1079. if (other_msg) {
  1080. /*
  1081. * There is another. Process this one but do not
  1082. * ack it.
  1083. */
  1084. bau_process_message(mdp, bcp, 0);
  1085. /*
  1086. * Let the natural processing of that other message
  1087. * acknowledge it. Don't get the processing of sw_ack's
  1088. * out of order.
  1089. */
  1090. return;
  1091. }
  1092. }
  1093. /*
  1094. * Either the MMR shows this one pending a reply or there is no
  1095. * other message using this sw_ack, so it is safe to acknowledge it.
  1096. */
  1097. bau_process_message(mdp, bcp, 1);
  1098. return;
  1099. }
  1100. /*
  1101. * The BAU message interrupt comes here. (registered by set_intr_gate)
  1102. * See entry_64.S
  1103. *
  1104. * We received a broadcast assist message.
  1105. *
  1106. * Interrupts are disabled; this interrupt could represent
  1107. * the receipt of several messages.
  1108. *
  1109. * All cores/threads on this hub get this interrupt.
  1110. * The last one to see it does the software ack.
  1111. * (the resource will not be freed until noninterruptable cpus see this
  1112. * interrupt; hardware may timeout the s/w ack and reply ERROR)
  1113. */
  1114. void uv_bau_message_interrupt(struct pt_regs *regs)
  1115. {
  1116. int count = 0;
  1117. cycles_t time_start;
  1118. struct bau_pq_entry *msg;
  1119. struct bau_control *bcp;
  1120. struct ptc_stats *stat;
  1121. struct msg_desc msgdesc;
  1122. ack_APIC_irq();
  1123. time_start = get_cycles();
  1124. bcp = &per_cpu(bau_control, smp_processor_id());
  1125. stat = bcp->statp;
  1126. msgdesc.queue_first = bcp->queue_first;
  1127. msgdesc.queue_last = bcp->queue_last;
  1128. msg = bcp->bau_msg_head;
  1129. while (msg->swack_vec) {
  1130. count++;
  1131. msgdesc.msg_slot = msg - msgdesc.queue_first;
  1132. msgdesc.msg = msg;
  1133. if (bcp->uvhub_version == 2)
  1134. process_uv2_message(&msgdesc, bcp);
  1135. else
  1136. bau_process_message(&msgdesc, bcp, 1);
  1137. msg++;
  1138. if (msg > msgdesc.queue_last)
  1139. msg = msgdesc.queue_first;
  1140. bcp->bau_msg_head = msg;
  1141. }
  1142. stat->d_time += (get_cycles() - time_start);
  1143. if (!count)
  1144. stat->d_nomsg++;
  1145. else if (count > 1)
  1146. stat->d_multmsg++;
  1147. }
  1148. /*
  1149. * Each target uvhub (i.e. a uvhub that has cpu's) needs to have
  1150. * shootdown message timeouts enabled. The timeout does not cause
  1151. * an interrupt, but causes an error message to be returned to
  1152. * the sender.
  1153. */
  1154. static void __init enable_timeouts(void)
  1155. {
  1156. int uvhub;
  1157. int nuvhubs;
  1158. int pnode;
  1159. unsigned long mmr_image;
  1160. nuvhubs = uv_num_possible_blades();
  1161. for (uvhub = 0; uvhub < nuvhubs; uvhub++) {
  1162. if (!uv_blade_nr_possible_cpus(uvhub))
  1163. continue;
  1164. pnode = uv_blade_to_pnode(uvhub);
  1165. mmr_image = read_mmr_misc_control(pnode);
  1166. /*
  1167. * Set the timeout period and then lock it in, in three
  1168. * steps; captures and locks in the period.
  1169. *
  1170. * To program the period, the SOFT_ACK_MODE must be off.
  1171. */
  1172. mmr_image &= ~(1L << SOFTACK_MSHIFT);
  1173. write_mmr_misc_control(pnode, mmr_image);
  1174. /*
  1175. * Set the 4-bit period.
  1176. */
  1177. mmr_image &= ~((unsigned long)0xf << SOFTACK_PSHIFT);
  1178. mmr_image |= (SOFTACK_TIMEOUT_PERIOD << SOFTACK_PSHIFT);
  1179. write_mmr_misc_control(pnode, mmr_image);
  1180. /*
  1181. * UV1:
  1182. * Subsequent reversals of the timebase bit (3) cause an
  1183. * immediate timeout of one or all INTD resources as
  1184. * indicated in bits 2:0 (7 causes all of them to timeout).
  1185. */
  1186. mmr_image |= (1L << SOFTACK_MSHIFT);
  1187. if (is_uv2_hub()) {
  1188. /* hw bug workaround; do not use extended status */
  1189. mmr_image &= ~(1L << UV2_EXT_SHFT);
  1190. }
  1191. write_mmr_misc_control(pnode, mmr_image);
  1192. }
  1193. }
  1194. static void *ptc_seq_start(struct seq_file *file, loff_t *offset)
  1195. {
  1196. if (*offset < num_possible_cpus())
  1197. return offset;
  1198. return NULL;
  1199. }
  1200. static void *ptc_seq_next(struct seq_file *file, void *data, loff_t *offset)
  1201. {
  1202. (*offset)++;
  1203. if (*offset < num_possible_cpus())
  1204. return offset;
  1205. return NULL;
  1206. }
  1207. static void ptc_seq_stop(struct seq_file *file, void *data)
  1208. {
  1209. }
  1210. /*
  1211. * Display the statistics thru /proc/sgi_uv/ptc_statistics
  1212. * 'data' points to the cpu number
  1213. * Note: see the descriptions in stat_description[].
  1214. */
  1215. static int ptc_seq_show(struct seq_file *file, void *data)
  1216. {
  1217. struct ptc_stats *stat;
  1218. struct bau_control *bcp;
  1219. int cpu;
  1220. cpu = *(loff_t *)data;
  1221. if (!cpu) {
  1222. seq_printf(file,
  1223. "# cpu bauoff sent stime self locals remotes ncpus localhub ");
  1224. seq_printf(file,
  1225. "remotehub numuvhubs numuvhubs16 numuvhubs8 ");
  1226. seq_printf(file,
  1227. "numuvhubs4 numuvhubs2 numuvhubs1 dto snacks retries ");
  1228. seq_printf(file,
  1229. "rok resetp resett giveup sto bz throt disable ");
  1230. seq_printf(file,
  1231. "enable wars warshw warwaits enters ipidis plugged ");
  1232. seq_printf(file,
  1233. "ipiover glim cong swack recv rtime all one mult ");
  1234. seq_printf(file,
  1235. "none retry canc nocan reset rcan\n");
  1236. }
  1237. if (cpu < num_possible_cpus() && cpu_online(cpu)) {
  1238. bcp = &per_cpu(bau_control, cpu);
  1239. stat = bcp->statp;
  1240. /* source side statistics */
  1241. seq_printf(file,
  1242. "cpu %d %d %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld ",
  1243. cpu, bcp->nobau, stat->s_requestor,
  1244. cycles_2_us(stat->s_time),
  1245. stat->s_ntargself, stat->s_ntarglocals,
  1246. stat->s_ntargremotes, stat->s_ntargcpu,
  1247. stat->s_ntarglocaluvhub, stat->s_ntargremoteuvhub,
  1248. stat->s_ntarguvhub, stat->s_ntarguvhub16);
  1249. seq_printf(file, "%ld %ld %ld %ld %ld %ld ",
  1250. stat->s_ntarguvhub8, stat->s_ntarguvhub4,
  1251. stat->s_ntarguvhub2, stat->s_ntarguvhub1,
  1252. stat->s_dtimeout, stat->s_strongnacks);
  1253. seq_printf(file, "%ld %ld %ld %ld %ld %ld %ld %ld ",
  1254. stat->s_retry_messages, stat->s_retriesok,
  1255. stat->s_resets_plug, stat->s_resets_timeout,
  1256. stat->s_giveup, stat->s_stimeout,
  1257. stat->s_busy, stat->s_throttles);
  1258. seq_printf(file, "%ld %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld ",
  1259. stat->s_bau_disabled, stat->s_bau_reenabled,
  1260. stat->s_uv2_wars, stat->s_uv2_wars_hw,
  1261. stat->s_uv2_war_waits, stat->s_enters,
  1262. stat->s_ipifordisabled, stat->s_plugged,
  1263. stat->s_overipilimit, stat->s_giveuplimit,
  1264. stat->s_congested);
  1265. /* destination side statistics */
  1266. seq_printf(file,
  1267. "%lx %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld\n",
  1268. read_gmmr_sw_ack(uv_cpu_to_pnode(cpu)),
  1269. stat->d_requestee, cycles_2_us(stat->d_time),
  1270. stat->d_alltlb, stat->d_onetlb, stat->d_multmsg,
  1271. stat->d_nomsg, stat->d_retries, stat->d_canceled,
  1272. stat->d_nocanceled, stat->d_resets,
  1273. stat->d_rcanceled);
  1274. }
  1275. return 0;
  1276. }
  1277. /*
  1278. * Display the tunables thru debugfs
  1279. */
  1280. static ssize_t tunables_read(struct file *file, char __user *userbuf,
  1281. size_t count, loff_t *ppos)
  1282. {
  1283. char *buf;
  1284. int ret;
  1285. buf = kasprintf(GFP_KERNEL, "%s %s %s\n%d %d %d %d %d %d %d %d %d %d\n",
  1286. "max_concur plugged_delay plugsb4reset timeoutsb4reset",
  1287. "ipi_reset_limit complete_threshold congested_response_us",
  1288. "congested_reps disabled_period giveup_limit",
  1289. max_concurr, plugged_delay, plugsb4reset,
  1290. timeoutsb4reset, ipi_reset_limit, complete_threshold,
  1291. congested_respns_us, congested_reps, disabled_period,
  1292. giveup_limit);
  1293. if (!buf)
  1294. return -ENOMEM;
  1295. ret = simple_read_from_buffer(userbuf, count, ppos, buf, strlen(buf));
  1296. kfree(buf);
  1297. return ret;
  1298. }
  1299. /*
  1300. * handle a write to /proc/sgi_uv/ptc_statistics
  1301. * -1: reset the statistics
  1302. * 0: display meaning of the statistics
  1303. */
  1304. static ssize_t ptc_proc_write(struct file *file, const char __user *user,
  1305. size_t count, loff_t *data)
  1306. {
  1307. int cpu;
  1308. int i;
  1309. int elements;
  1310. long input_arg;
  1311. char optstr[64];
  1312. struct ptc_stats *stat;
  1313. if (count == 0 || count > sizeof(optstr))
  1314. return -EINVAL;
  1315. if (copy_from_user(optstr, user, count))
  1316. return -EFAULT;
  1317. optstr[count - 1] = '\0';
  1318. if (!strcmp(optstr, "on")) {
  1319. set_bau_on();
  1320. return count;
  1321. } else if (!strcmp(optstr, "off")) {
  1322. set_bau_off();
  1323. return count;
  1324. }
  1325. if (strict_strtol(optstr, 10, &input_arg) < 0) {
  1326. printk(KERN_DEBUG "%s is invalid\n", optstr);
  1327. return -EINVAL;
  1328. }
  1329. if (input_arg == 0) {
  1330. elements = ARRAY_SIZE(stat_description);
  1331. printk(KERN_DEBUG "# cpu: cpu number\n");
  1332. printk(KERN_DEBUG "Sender statistics:\n");
  1333. for (i = 0; i < elements; i++)
  1334. printk(KERN_DEBUG "%s\n", stat_description[i]);
  1335. } else if (input_arg == -1) {
  1336. for_each_present_cpu(cpu) {
  1337. stat = &per_cpu(ptcstats, cpu);
  1338. memset(stat, 0, sizeof(struct ptc_stats));
  1339. }
  1340. }
  1341. return count;
  1342. }
  1343. static int local_atoi(const char *name)
  1344. {
  1345. int val = 0;
  1346. for (;; name++) {
  1347. switch (*name) {
  1348. case '0' ... '9':
  1349. val = 10*val+(*name-'0');
  1350. break;
  1351. default:
  1352. return val;
  1353. }
  1354. }
  1355. }
  1356. /*
  1357. * Parse the values written to /sys/kernel/debug/sgi_uv/bau_tunables.
  1358. * Zero values reset them to defaults.
  1359. */
  1360. static int parse_tunables_write(struct bau_control *bcp, char *instr,
  1361. int count)
  1362. {
  1363. char *p;
  1364. char *q;
  1365. int cnt = 0;
  1366. int val;
  1367. int e = ARRAY_SIZE(tunables);
  1368. p = instr + strspn(instr, WHITESPACE);
  1369. q = p;
  1370. for (; *p; p = q + strspn(q, WHITESPACE)) {
  1371. q = p + strcspn(p, WHITESPACE);
  1372. cnt++;
  1373. if (q == p)
  1374. break;
  1375. }
  1376. if (cnt != e) {
  1377. printk(KERN_INFO "bau tunable error: should be %d values\n", e);
  1378. return -EINVAL;
  1379. }
  1380. p = instr + strspn(instr, WHITESPACE);
  1381. q = p;
  1382. for (cnt = 0; *p; p = q + strspn(q, WHITESPACE), cnt++) {
  1383. q = p + strcspn(p, WHITESPACE);
  1384. val = local_atoi(p);
  1385. switch (cnt) {
  1386. case 0:
  1387. if (val == 0) {
  1388. max_concurr = MAX_BAU_CONCURRENT;
  1389. max_concurr_const = MAX_BAU_CONCURRENT;
  1390. continue;
  1391. }
  1392. if (val < 1 || val > bcp->cpus_in_uvhub) {
  1393. printk(KERN_DEBUG
  1394. "Error: BAU max concurrent %d is invalid\n",
  1395. val);
  1396. return -EINVAL;
  1397. }
  1398. max_concurr = val;
  1399. max_concurr_const = val;
  1400. continue;
  1401. default:
  1402. if (val == 0)
  1403. *tunables[cnt].tunp = tunables[cnt].deflt;
  1404. else
  1405. *tunables[cnt].tunp = val;
  1406. continue;
  1407. }
  1408. if (q == p)
  1409. break;
  1410. }
  1411. return 0;
  1412. }
  1413. /*
  1414. * Handle a write to debugfs. (/sys/kernel/debug/sgi_uv/bau_tunables)
  1415. */
  1416. static ssize_t tunables_write(struct file *file, const char __user *user,
  1417. size_t count, loff_t *data)
  1418. {
  1419. int cpu;
  1420. int ret;
  1421. char instr[100];
  1422. struct bau_control *bcp;
  1423. if (count == 0 || count > sizeof(instr)-1)
  1424. return -EINVAL;
  1425. if (copy_from_user(instr, user, count))
  1426. return -EFAULT;
  1427. instr[count] = '\0';
  1428. cpu = get_cpu();
  1429. bcp = &per_cpu(bau_control, cpu);
  1430. ret = parse_tunables_write(bcp, instr, count);
  1431. put_cpu();
  1432. if (ret)
  1433. return ret;
  1434. for_each_present_cpu(cpu) {
  1435. bcp = &per_cpu(bau_control, cpu);
  1436. bcp->max_concurr = max_concurr;
  1437. bcp->max_concurr_const = max_concurr;
  1438. bcp->plugged_delay = plugged_delay;
  1439. bcp->plugsb4reset = plugsb4reset;
  1440. bcp->timeoutsb4reset = timeoutsb4reset;
  1441. bcp->ipi_reset_limit = ipi_reset_limit;
  1442. bcp->complete_threshold = complete_threshold;
  1443. bcp->cong_response_us = congested_respns_us;
  1444. bcp->cong_reps = congested_reps;
  1445. bcp->disabled_period = sec_2_cycles(disabled_period);
  1446. bcp->giveup_limit = giveup_limit;
  1447. }
  1448. return count;
  1449. }
  1450. static const struct seq_operations uv_ptc_seq_ops = {
  1451. .start = ptc_seq_start,
  1452. .next = ptc_seq_next,
  1453. .stop = ptc_seq_stop,
  1454. .show = ptc_seq_show
  1455. };
  1456. static int ptc_proc_open(struct inode *inode, struct file *file)
  1457. {
  1458. return seq_open(file, &uv_ptc_seq_ops);
  1459. }
  1460. static int tunables_open(struct inode *inode, struct file *file)
  1461. {
  1462. return 0;
  1463. }
  1464. static const struct file_operations proc_uv_ptc_operations = {
  1465. .open = ptc_proc_open,
  1466. .read = seq_read,
  1467. .write = ptc_proc_write,
  1468. .llseek = seq_lseek,
  1469. .release = seq_release,
  1470. };
  1471. static const struct file_operations tunables_fops = {
  1472. .open = tunables_open,
  1473. .read = tunables_read,
  1474. .write = tunables_write,
  1475. .llseek = default_llseek,
  1476. };
  1477. static int __init uv_ptc_init(void)
  1478. {
  1479. struct proc_dir_entry *proc_uv_ptc;
  1480. if (!is_uv_system())
  1481. return 0;
  1482. proc_uv_ptc = proc_create(UV_PTC_BASENAME, 0444, NULL,
  1483. &proc_uv_ptc_operations);
  1484. if (!proc_uv_ptc) {
  1485. printk(KERN_ERR "unable to create %s proc entry\n",
  1486. UV_PTC_BASENAME);
  1487. return -EINVAL;
  1488. }
  1489. tunables_dir = debugfs_create_dir(UV_BAU_TUNABLES_DIR, NULL);
  1490. if (!tunables_dir) {
  1491. printk(KERN_ERR "unable to create debugfs directory %s\n",
  1492. UV_BAU_TUNABLES_DIR);
  1493. return -EINVAL;
  1494. }
  1495. tunables_file = debugfs_create_file(UV_BAU_TUNABLES_FILE, 0600,
  1496. tunables_dir, NULL, &tunables_fops);
  1497. if (!tunables_file) {
  1498. printk(KERN_ERR "unable to create debugfs file %s\n",
  1499. UV_BAU_TUNABLES_FILE);
  1500. return -EINVAL;
  1501. }
  1502. return 0;
  1503. }
  1504. /*
  1505. * Initialize the sending side's sending buffers.
  1506. */
  1507. static void activation_descriptor_init(int node, int pnode, int base_pnode)
  1508. {
  1509. int i;
  1510. int cpu;
  1511. int uv1 = 0;
  1512. unsigned long gpa;
  1513. unsigned long m;
  1514. unsigned long n;
  1515. size_t dsize;
  1516. struct bau_desc *bau_desc;
  1517. struct bau_desc *bd2;
  1518. struct uv1_bau_msg_header *uv1_hdr;
  1519. struct uv2_bau_msg_header *uv2_hdr;
  1520. struct bau_control *bcp;
  1521. /*
  1522. * each bau_desc is 64 bytes; there are 8 (ITEMS_PER_DESC)
  1523. * per cpu; and one per cpu on the uvhub (ADP_SZ)
  1524. */
  1525. dsize = sizeof(struct bau_desc) * ADP_SZ * ITEMS_PER_DESC;
  1526. bau_desc = kmalloc_node(dsize, GFP_KERNEL, node);
  1527. BUG_ON(!bau_desc);
  1528. gpa = uv_gpa(bau_desc);
  1529. n = uv_gpa_to_gnode(gpa);
  1530. m = uv_gpa_to_offset(gpa);
  1531. if (is_uv1_hub())
  1532. uv1 = 1;
  1533. /* the 14-bit pnode */
  1534. write_mmr_descriptor_base(pnode, (n << UV_DESC_PSHIFT | m));
  1535. /*
  1536. * Initializing all 8 (ITEMS_PER_DESC) descriptors for each
  1537. * cpu even though we only use the first one; one descriptor can
  1538. * describe a broadcast to 256 uv hubs.
  1539. */
  1540. for (i = 0, bd2 = bau_desc; i < (ADP_SZ * ITEMS_PER_DESC); i++, bd2++) {
  1541. memset(bd2, 0, sizeof(struct bau_desc));
  1542. if (uv1) {
  1543. uv1_hdr = &bd2->header.uv1_hdr;
  1544. uv1_hdr->swack_flag = 1;
  1545. /*
  1546. * The base_dest_nasid set in the message header
  1547. * is the nasid of the first uvhub in the partition.
  1548. * The bit map will indicate destination pnode numbers
  1549. * relative to that base. They may not be consecutive
  1550. * if nasid striding is being used.
  1551. */
  1552. uv1_hdr->base_dest_nasid =
  1553. UV_PNODE_TO_NASID(base_pnode);
  1554. uv1_hdr->dest_subnodeid = UV_LB_SUBNODEID;
  1555. uv1_hdr->command = UV_NET_ENDPOINT_INTD;
  1556. uv1_hdr->int_both = 1;
  1557. /*
  1558. * all others need to be set to zero:
  1559. * fairness chaining multilevel count replied_to
  1560. */
  1561. } else {
  1562. /*
  1563. * BIOS uses legacy mode, but UV2 hardware always
  1564. * uses native mode for selective broadcasts.
  1565. */
  1566. uv2_hdr = &bd2->header.uv2_hdr;
  1567. uv2_hdr->swack_flag = 1;
  1568. uv2_hdr->base_dest_nasid =
  1569. UV_PNODE_TO_NASID(base_pnode);
  1570. uv2_hdr->dest_subnodeid = UV_LB_SUBNODEID;
  1571. uv2_hdr->command = UV_NET_ENDPOINT_INTD;
  1572. }
  1573. }
  1574. for_each_present_cpu(cpu) {
  1575. if (pnode != uv_blade_to_pnode(uv_cpu_to_blade_id(cpu)))
  1576. continue;
  1577. bcp = &per_cpu(bau_control, cpu);
  1578. bcp->descriptor_base = bau_desc;
  1579. }
  1580. }
  1581. /*
  1582. * initialize the destination side's receiving buffers
  1583. * entered for each uvhub in the partition
  1584. * - node is first node (kernel memory notion) on the uvhub
  1585. * - pnode is the uvhub's physical identifier
  1586. */
  1587. static void pq_init(int node, int pnode)
  1588. {
  1589. int cpu;
  1590. size_t plsize;
  1591. char *cp;
  1592. void *vp;
  1593. unsigned long pn;
  1594. unsigned long first;
  1595. unsigned long pn_first;
  1596. unsigned long last;
  1597. struct bau_pq_entry *pqp;
  1598. struct bau_control *bcp;
  1599. plsize = (DEST_Q_SIZE + 1) * sizeof(struct bau_pq_entry);
  1600. vp = kmalloc_node(plsize, GFP_KERNEL, node);
  1601. pqp = (struct bau_pq_entry *)vp;
  1602. BUG_ON(!pqp);
  1603. cp = (char *)pqp + 31;
  1604. pqp = (struct bau_pq_entry *)(((unsigned long)cp >> 5) << 5);
  1605. for_each_present_cpu(cpu) {
  1606. if (pnode != uv_cpu_to_pnode(cpu))
  1607. continue;
  1608. /* for every cpu on this pnode: */
  1609. bcp = &per_cpu(bau_control, cpu);
  1610. bcp->queue_first = pqp;
  1611. bcp->bau_msg_head = pqp;
  1612. bcp->queue_last = pqp + (DEST_Q_SIZE - 1);
  1613. }
  1614. /*
  1615. * need the gnode of where the memory was really allocated
  1616. */
  1617. pn = uv_gpa_to_gnode(uv_gpa(pqp));
  1618. first = uv_physnodeaddr(pqp);
  1619. pn_first = ((unsigned long)pn << UV_PAYLOADQ_PNODE_SHIFT) | first;
  1620. last = uv_physnodeaddr(pqp + (DEST_Q_SIZE - 1));
  1621. write_mmr_payload_first(pnode, pn_first);
  1622. write_mmr_payload_tail(pnode, first);
  1623. write_mmr_payload_last(pnode, last);
  1624. write_gmmr_sw_ack(pnode, 0xffffUL);
  1625. /* in effect, all msg_type's are set to MSG_NOOP */
  1626. memset(pqp, 0, sizeof(struct bau_pq_entry) * DEST_Q_SIZE);
  1627. }
  1628. /*
  1629. * Initialization of each UV hub's structures
  1630. */
  1631. static void __init init_uvhub(int uvhub, int vector, int base_pnode)
  1632. {
  1633. int node;
  1634. int pnode;
  1635. unsigned long apicid;
  1636. node = uvhub_to_first_node(uvhub);
  1637. pnode = uv_blade_to_pnode(uvhub);
  1638. activation_descriptor_init(node, pnode, base_pnode);
  1639. pq_init(node, pnode);
  1640. /*
  1641. * The below initialization can't be in firmware because the
  1642. * messaging IRQ will be determined by the OS.
  1643. */
  1644. apicid = uvhub_to_first_apicid(uvhub) | uv_apicid_hibits;
  1645. write_mmr_data_config(pnode, ((apicid << 32) | vector));
  1646. }
  1647. /*
  1648. * We will set BAU_MISC_CONTROL with a timeout period.
  1649. * But the BIOS has set UVH_AGING_PRESCALE_SEL and UVH_TRANSACTION_TIMEOUT.
  1650. * So the destination timeout period has to be calculated from them.
  1651. */
  1652. static int calculate_destination_timeout(void)
  1653. {
  1654. unsigned long mmr_image;
  1655. int mult1;
  1656. int mult2;
  1657. int index;
  1658. int base;
  1659. int ret;
  1660. unsigned long ts_ns;
  1661. if (is_uv1_hub()) {
  1662. mult1 = SOFTACK_TIMEOUT_PERIOD & BAU_MISC_CONTROL_MULT_MASK;
  1663. mmr_image = uv_read_local_mmr(UVH_AGING_PRESCALE_SEL);
  1664. index = (mmr_image >> BAU_URGENCY_7_SHIFT) & BAU_URGENCY_7_MASK;
  1665. mmr_image = uv_read_local_mmr(UVH_TRANSACTION_TIMEOUT);
  1666. mult2 = (mmr_image >> BAU_TRANS_SHIFT) & BAU_TRANS_MASK;
  1667. ts_ns = timeout_base_ns[index];
  1668. ts_ns *= (mult1 * mult2);
  1669. ret = ts_ns / 1000;
  1670. } else {
  1671. /* 4 bits 0/1 for 10/80us base, 3 bits of multiplier */
  1672. mmr_image = uv_read_local_mmr(UVH_LB_BAU_MISC_CONTROL);
  1673. mmr_image = (mmr_image & UV_SA_MASK) >> UV_SA_SHFT;
  1674. if (mmr_image & (1L << UV2_ACK_UNITS_SHFT))
  1675. base = 80;
  1676. else
  1677. base = 10;
  1678. mult1 = mmr_image & UV2_ACK_MASK;
  1679. ret = mult1 * base;
  1680. }
  1681. return ret;
  1682. }
  1683. static void __init init_per_cpu_tunables(void)
  1684. {
  1685. int cpu;
  1686. struct bau_control *bcp;
  1687. for_each_present_cpu(cpu) {
  1688. bcp = &per_cpu(bau_control, cpu);
  1689. bcp->baudisabled = 0;
  1690. if (nobau)
  1691. bcp->nobau = 1;
  1692. bcp->statp = &per_cpu(ptcstats, cpu);
  1693. /* time interval to catch a hardware stay-busy bug */
  1694. bcp->timeout_interval = usec_2_cycles(2*timeout_us);
  1695. bcp->max_concurr = max_concurr;
  1696. bcp->max_concurr_const = max_concurr;
  1697. bcp->plugged_delay = plugged_delay;
  1698. bcp->plugsb4reset = plugsb4reset;
  1699. bcp->timeoutsb4reset = timeoutsb4reset;
  1700. bcp->ipi_reset_limit = ipi_reset_limit;
  1701. bcp->complete_threshold = complete_threshold;
  1702. bcp->cong_response_us = congested_respns_us;
  1703. bcp->cong_reps = congested_reps;
  1704. bcp->disabled_period = sec_2_cycles(disabled_period);
  1705. bcp->giveup_limit = giveup_limit;
  1706. spin_lock_init(&bcp->queue_lock);
  1707. spin_lock_init(&bcp->uvhub_lock);
  1708. spin_lock_init(&bcp->disable_lock);
  1709. }
  1710. }
  1711. /*
  1712. * Scan all cpus to collect blade and socket summaries.
  1713. */
  1714. static int __init get_cpu_topology(int base_pnode,
  1715. struct uvhub_desc *uvhub_descs,
  1716. unsigned char *uvhub_mask)
  1717. {
  1718. int cpu;
  1719. int pnode;
  1720. int uvhub;
  1721. int socket;
  1722. struct bau_control *bcp;
  1723. struct uvhub_desc *bdp;
  1724. struct socket_desc *sdp;
  1725. for_each_present_cpu(cpu) {
  1726. bcp = &per_cpu(bau_control, cpu);
  1727. memset(bcp, 0, sizeof(struct bau_control));
  1728. pnode = uv_cpu_hub_info(cpu)->pnode;
  1729. if ((pnode - base_pnode) >= UV_DISTRIBUTION_SIZE) {
  1730. printk(KERN_EMERG
  1731. "cpu %d pnode %d-%d beyond %d; BAU disabled\n",
  1732. cpu, pnode, base_pnode, UV_DISTRIBUTION_SIZE);
  1733. return 1;
  1734. }
  1735. bcp->osnode = cpu_to_node(cpu);
  1736. bcp->partition_base_pnode = base_pnode;
  1737. uvhub = uv_cpu_hub_info(cpu)->numa_blade_id;
  1738. *(uvhub_mask + (uvhub/8)) |= (1 << (uvhub%8));
  1739. bdp = &uvhub_descs[uvhub];
  1740. bdp->num_cpus++;
  1741. bdp->uvhub = uvhub;
  1742. bdp->pnode = pnode;
  1743. /* kludge: 'assuming' one node per socket, and assuming that
  1744. disabling a socket just leaves a gap in node numbers */
  1745. socket = bcp->osnode & 1;
  1746. bdp->socket_mask |= (1 << socket);
  1747. sdp = &bdp->socket[socket];
  1748. sdp->cpu_number[sdp->num_cpus] = cpu;
  1749. sdp->num_cpus++;
  1750. if (sdp->num_cpus > MAX_CPUS_PER_SOCKET) {
  1751. printk(KERN_EMERG "%d cpus per socket invalid\n",
  1752. sdp->num_cpus);
  1753. return 1;
  1754. }
  1755. }
  1756. return 0;
  1757. }
  1758. /*
  1759. * Each socket is to get a local array of pnodes/hubs.
  1760. */
  1761. static void make_per_cpu_thp(struct bau_control *smaster)
  1762. {
  1763. int cpu;
  1764. size_t hpsz = sizeof(struct hub_and_pnode) * num_possible_cpus();
  1765. smaster->thp = kmalloc_node(hpsz, GFP_KERNEL, smaster->osnode);
  1766. memset(smaster->thp, 0, hpsz);
  1767. for_each_present_cpu(cpu) {
  1768. smaster->thp[cpu].pnode = uv_cpu_hub_info(cpu)->pnode;
  1769. smaster->thp[cpu].uvhub = uv_cpu_hub_info(cpu)->numa_blade_id;
  1770. }
  1771. }
  1772. /*
  1773. * Each uvhub is to get a local cpumask.
  1774. */
  1775. static void make_per_hub_cpumask(struct bau_control *hmaster)
  1776. {
  1777. int sz = sizeof(cpumask_t);
  1778. hmaster->cpumask = kzalloc_node(sz, GFP_KERNEL, hmaster->osnode);
  1779. }
  1780. /*
  1781. * Initialize all the per_cpu information for the cpu's on a given socket,
  1782. * given what has been gathered into the socket_desc struct.
  1783. * And reports the chosen hub and socket masters back to the caller.
  1784. */
  1785. static int scan_sock(struct socket_desc *sdp, struct uvhub_desc *bdp,
  1786. struct bau_control **smasterp,
  1787. struct bau_control **hmasterp)
  1788. {
  1789. int i;
  1790. int cpu;
  1791. struct bau_control *bcp;
  1792. for (i = 0; i < sdp->num_cpus; i++) {
  1793. cpu = sdp->cpu_number[i];
  1794. bcp = &per_cpu(bau_control, cpu);
  1795. bcp->cpu = cpu;
  1796. if (i == 0) {
  1797. *smasterp = bcp;
  1798. if (!(*hmasterp))
  1799. *hmasterp = bcp;
  1800. }
  1801. bcp->cpus_in_uvhub = bdp->num_cpus;
  1802. bcp->cpus_in_socket = sdp->num_cpus;
  1803. bcp->socket_master = *smasterp;
  1804. bcp->uvhub = bdp->uvhub;
  1805. if (is_uv1_hub())
  1806. bcp->uvhub_version = 1;
  1807. else if (is_uv2_hub())
  1808. bcp->uvhub_version = 2;
  1809. else {
  1810. printk(KERN_EMERG "uvhub version not 1 or 2\n");
  1811. return 1;
  1812. }
  1813. bcp->uvhub_master = *hmasterp;
  1814. bcp->uvhub_cpu = uv_cpu_hub_info(cpu)->blade_processor_id;
  1815. if (bcp->uvhub_cpu >= MAX_CPUS_PER_UVHUB) {
  1816. printk(KERN_EMERG "%d cpus per uvhub invalid\n",
  1817. bcp->uvhub_cpu);
  1818. return 1;
  1819. }
  1820. }
  1821. return 0;
  1822. }
  1823. /*
  1824. * Summarize the blade and socket topology into the per_cpu structures.
  1825. */
  1826. static int __init summarize_uvhub_sockets(int nuvhubs,
  1827. struct uvhub_desc *uvhub_descs,
  1828. unsigned char *uvhub_mask)
  1829. {
  1830. int socket;
  1831. int uvhub;
  1832. unsigned short socket_mask;
  1833. for (uvhub = 0; uvhub < nuvhubs; uvhub++) {
  1834. struct uvhub_desc *bdp;
  1835. struct bau_control *smaster = NULL;
  1836. struct bau_control *hmaster = NULL;
  1837. if (!(*(uvhub_mask + (uvhub/8)) & (1 << (uvhub%8))))
  1838. continue;
  1839. bdp = &uvhub_descs[uvhub];
  1840. socket_mask = bdp->socket_mask;
  1841. socket = 0;
  1842. while (socket_mask) {
  1843. struct socket_desc *sdp;
  1844. if ((socket_mask & 1)) {
  1845. sdp = &bdp->socket[socket];
  1846. if (scan_sock(sdp, bdp, &smaster, &hmaster))
  1847. return 1;
  1848. make_per_cpu_thp(smaster);
  1849. }
  1850. socket++;
  1851. socket_mask = (socket_mask >> 1);
  1852. }
  1853. make_per_hub_cpumask(hmaster);
  1854. }
  1855. return 0;
  1856. }
  1857. /*
  1858. * initialize the bau_control structure for each cpu
  1859. */
  1860. static int __init init_per_cpu(int nuvhubs, int base_part_pnode)
  1861. {
  1862. unsigned char *uvhub_mask;
  1863. void *vp;
  1864. struct uvhub_desc *uvhub_descs;
  1865. timeout_us = calculate_destination_timeout();
  1866. vp = kmalloc(nuvhubs * sizeof(struct uvhub_desc), GFP_KERNEL);
  1867. uvhub_descs = (struct uvhub_desc *)vp;
  1868. memset(uvhub_descs, 0, nuvhubs * sizeof(struct uvhub_desc));
  1869. uvhub_mask = kzalloc((nuvhubs+7)/8, GFP_KERNEL);
  1870. if (get_cpu_topology(base_part_pnode, uvhub_descs, uvhub_mask))
  1871. goto fail;
  1872. if (summarize_uvhub_sockets(nuvhubs, uvhub_descs, uvhub_mask))
  1873. goto fail;
  1874. kfree(uvhub_descs);
  1875. kfree(uvhub_mask);
  1876. init_per_cpu_tunables();
  1877. return 0;
  1878. fail:
  1879. kfree(uvhub_descs);
  1880. kfree(uvhub_mask);
  1881. return 1;
  1882. }
  1883. /*
  1884. * Initialization of BAU-related structures
  1885. */
  1886. static int __init uv_bau_init(void)
  1887. {
  1888. int uvhub;
  1889. int pnode;
  1890. int nuvhubs;
  1891. int cur_cpu;
  1892. int cpus;
  1893. int vector;
  1894. cpumask_var_t *mask;
  1895. if (!is_uv_system())
  1896. return 0;
  1897. for_each_possible_cpu(cur_cpu) {
  1898. mask = &per_cpu(uv_flush_tlb_mask, cur_cpu);
  1899. zalloc_cpumask_var_node(mask, GFP_KERNEL, cpu_to_node(cur_cpu));
  1900. }
  1901. nuvhubs = uv_num_possible_blades();
  1902. congested_cycles = usec_2_cycles(congested_respns_us);
  1903. uv_base_pnode = 0x7fffffff;
  1904. for (uvhub = 0; uvhub < nuvhubs; uvhub++) {
  1905. cpus = uv_blade_nr_possible_cpus(uvhub);
  1906. if (cpus && (uv_blade_to_pnode(uvhub) < uv_base_pnode))
  1907. uv_base_pnode = uv_blade_to_pnode(uvhub);
  1908. }
  1909. enable_timeouts();
  1910. if (init_per_cpu(nuvhubs, uv_base_pnode)) {
  1911. set_bau_off();
  1912. nobau_perm = 1;
  1913. return 0;
  1914. }
  1915. vector = UV_BAU_MESSAGE;
  1916. for_each_possible_blade(uvhub)
  1917. if (uv_blade_nr_possible_cpus(uvhub))
  1918. init_uvhub(uvhub, vector, uv_base_pnode);
  1919. alloc_intr_gate(vector, uv_bau_message_intr1);
  1920. for_each_possible_blade(uvhub) {
  1921. if (uv_blade_nr_possible_cpus(uvhub)) {
  1922. unsigned long val;
  1923. unsigned long mmr;
  1924. pnode = uv_blade_to_pnode(uvhub);
  1925. /* INIT the bau */
  1926. val = 1L << 63;
  1927. write_gmmr_activation(pnode, val);
  1928. mmr = 1; /* should be 1 to broadcast to both sockets */
  1929. if (!is_uv1_hub())
  1930. write_mmr_data_broadcast(pnode, mmr);
  1931. }
  1932. }
  1933. return 0;
  1934. }
  1935. core_initcall(uv_bau_init);
  1936. fs_initcall(uv_ptc_init);