acpi.c 15 KB

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  1. #include <linux/pci.h>
  2. #include <linux/acpi.h>
  3. #include <linux/init.h>
  4. #include <linux/irq.h>
  5. #include <linux/dmi.h>
  6. #include <linux/slab.h>
  7. #include <asm/numa.h>
  8. #include <asm/pci_x86.h>
  9. struct pci_root_info {
  10. struct acpi_device *bridge;
  11. char name[16];
  12. unsigned int res_num;
  13. struct resource *res;
  14. resource_size_t *res_offset;
  15. struct pci_sysdata sd;
  16. #ifdef CONFIG_PCI_MMCONFIG
  17. bool mcfg_added;
  18. u16 segment;
  19. u8 start_bus;
  20. u8 end_bus;
  21. #endif
  22. };
  23. static bool pci_use_crs = true;
  24. static bool pci_ignore_seg = false;
  25. static int __init set_use_crs(const struct dmi_system_id *id)
  26. {
  27. pci_use_crs = true;
  28. return 0;
  29. }
  30. static int __init set_nouse_crs(const struct dmi_system_id *id)
  31. {
  32. pci_use_crs = false;
  33. return 0;
  34. }
  35. static int __init set_ignore_seg(const struct dmi_system_id *id)
  36. {
  37. printk(KERN_INFO "PCI: %s detected: ignoring ACPI _SEG\n", id->ident);
  38. pci_ignore_seg = true;
  39. return 0;
  40. }
  41. static const struct dmi_system_id pci_crs_quirks[] __initconst = {
  42. /* http://bugzilla.kernel.org/show_bug.cgi?id=14183 */
  43. {
  44. .callback = set_use_crs,
  45. .ident = "IBM System x3800",
  46. .matches = {
  47. DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
  48. DMI_MATCH(DMI_PRODUCT_NAME, "x3800"),
  49. },
  50. },
  51. /* https://bugzilla.kernel.org/show_bug.cgi?id=16007 */
  52. /* 2006 AMD HT/VIA system with two host bridges */
  53. {
  54. .callback = set_use_crs,
  55. .ident = "ASRock ALiveSATA2-GLAN",
  56. .matches = {
  57. DMI_MATCH(DMI_PRODUCT_NAME, "ALiveSATA2-GLAN"),
  58. },
  59. },
  60. /* https://bugzilla.kernel.org/show_bug.cgi?id=30552 */
  61. /* 2006 AMD HT/VIA system with two host bridges */
  62. {
  63. .callback = set_use_crs,
  64. .ident = "ASUS M2V-MX SE",
  65. .matches = {
  66. DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
  67. DMI_MATCH(DMI_BOARD_NAME, "M2V-MX SE"),
  68. DMI_MATCH(DMI_BIOS_VENDOR, "American Megatrends Inc."),
  69. },
  70. },
  71. /* https://bugzilla.kernel.org/show_bug.cgi?id=42619 */
  72. {
  73. .callback = set_use_crs,
  74. .ident = "MSI MS-7253",
  75. .matches = {
  76. DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
  77. DMI_MATCH(DMI_BOARD_NAME, "MS-7253"),
  78. DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies, LTD"),
  79. },
  80. },
  81. /* Now for the blacklist.. */
  82. /* https://bugzilla.redhat.com/show_bug.cgi?id=769657 */
  83. {
  84. .callback = set_nouse_crs,
  85. .ident = "Dell Studio 1557",
  86. .matches = {
  87. DMI_MATCH(DMI_BOARD_VENDOR, "Dell Inc."),
  88. DMI_MATCH(DMI_PRODUCT_NAME, "Studio 1557"),
  89. DMI_MATCH(DMI_BIOS_VERSION, "A09"),
  90. },
  91. },
  92. /* https://bugzilla.redhat.com/show_bug.cgi?id=769657 */
  93. {
  94. .callback = set_nouse_crs,
  95. .ident = "Thinkpad SL510",
  96. .matches = {
  97. DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"),
  98. DMI_MATCH(DMI_BOARD_NAME, "2847DFG"),
  99. DMI_MATCH(DMI_BIOS_VERSION, "6JET85WW (1.43 )"),
  100. },
  101. },
  102. /* https://bugzilla.kernel.org/show_bug.cgi?id=15362 */
  103. {
  104. .callback = set_ignore_seg,
  105. .ident = "HP xw9300",
  106. .matches = {
  107. DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
  108. DMI_MATCH(DMI_PRODUCT_NAME, "HP xw9300 Workstation"),
  109. },
  110. },
  111. {}
  112. };
  113. void __init pci_acpi_crs_quirks(void)
  114. {
  115. int year;
  116. if (dmi_get_date(DMI_BIOS_DATE, &year, NULL, NULL) && year < 2008)
  117. pci_use_crs = false;
  118. dmi_check_system(pci_crs_quirks);
  119. /*
  120. * If the user specifies "pci=use_crs" or "pci=nocrs" explicitly, that
  121. * takes precedence over anything we figured out above.
  122. */
  123. if (pci_probe & PCI_ROOT_NO_CRS)
  124. pci_use_crs = false;
  125. else if (pci_probe & PCI_USE__CRS)
  126. pci_use_crs = true;
  127. printk(KERN_INFO "PCI: %s host bridge windows from ACPI; "
  128. "if necessary, use \"pci=%s\" and report a bug\n",
  129. pci_use_crs ? "Using" : "Ignoring",
  130. pci_use_crs ? "nocrs" : "use_crs");
  131. }
  132. #ifdef CONFIG_PCI_MMCONFIG
  133. static int check_segment(u16 seg, struct device *dev, char *estr)
  134. {
  135. if (seg) {
  136. dev_err(dev,
  137. "%s can't access PCI configuration "
  138. "space under this host bridge.\n",
  139. estr);
  140. return -EIO;
  141. }
  142. /*
  143. * Failure in adding MMCFG information is not fatal,
  144. * just can't access extended configuration space of
  145. * devices under this host bridge.
  146. */
  147. dev_warn(dev,
  148. "%s can't access extended PCI configuration "
  149. "space under this bridge.\n",
  150. estr);
  151. return 0;
  152. }
  153. static int setup_mcfg_map(struct pci_root_info *info, u16 seg, u8 start,
  154. u8 end, phys_addr_t addr)
  155. {
  156. int result;
  157. struct device *dev = &info->bridge->dev;
  158. info->start_bus = start;
  159. info->end_bus = end;
  160. info->mcfg_added = false;
  161. /* return success if MMCFG is not in use */
  162. if (raw_pci_ext_ops && raw_pci_ext_ops != &pci_mmcfg)
  163. return 0;
  164. if (!(pci_probe & PCI_PROBE_MMCONF))
  165. return check_segment(seg, dev, "MMCONFIG is disabled,");
  166. result = pci_mmconfig_insert(dev, seg, start, end, addr);
  167. if (result == 0) {
  168. /* enable MMCFG if it hasn't been enabled yet */
  169. if (raw_pci_ext_ops == NULL)
  170. raw_pci_ext_ops = &pci_mmcfg;
  171. info->mcfg_added = true;
  172. } else if (result != -EEXIST)
  173. return check_segment(seg, dev,
  174. "fail to add MMCONFIG information,");
  175. return 0;
  176. }
  177. static void teardown_mcfg_map(struct pci_root_info *info)
  178. {
  179. if (info->mcfg_added) {
  180. pci_mmconfig_delete(info->segment, info->start_bus,
  181. info->end_bus);
  182. info->mcfg_added = false;
  183. }
  184. }
  185. #else
  186. static int setup_mcfg_map(struct pci_root_info *info,
  187. u16 seg, u8 start, u8 end,
  188. phys_addr_t addr)
  189. {
  190. return 0;
  191. }
  192. static void teardown_mcfg_map(struct pci_root_info *info)
  193. {
  194. }
  195. #endif
  196. static acpi_status resource_to_addr(struct acpi_resource *resource,
  197. struct acpi_resource_address64 *addr)
  198. {
  199. acpi_status status;
  200. struct acpi_resource_memory24 *memory24;
  201. struct acpi_resource_memory32 *memory32;
  202. struct acpi_resource_fixed_memory32 *fixed_memory32;
  203. memset(addr, 0, sizeof(*addr));
  204. switch (resource->type) {
  205. case ACPI_RESOURCE_TYPE_MEMORY24:
  206. memory24 = &resource->data.memory24;
  207. addr->resource_type = ACPI_MEMORY_RANGE;
  208. addr->minimum = memory24->minimum;
  209. addr->address_length = memory24->address_length;
  210. addr->maximum = addr->minimum + addr->address_length - 1;
  211. return AE_OK;
  212. case ACPI_RESOURCE_TYPE_MEMORY32:
  213. memory32 = &resource->data.memory32;
  214. addr->resource_type = ACPI_MEMORY_RANGE;
  215. addr->minimum = memory32->minimum;
  216. addr->address_length = memory32->address_length;
  217. addr->maximum = addr->minimum + addr->address_length - 1;
  218. return AE_OK;
  219. case ACPI_RESOURCE_TYPE_FIXED_MEMORY32:
  220. fixed_memory32 = &resource->data.fixed_memory32;
  221. addr->resource_type = ACPI_MEMORY_RANGE;
  222. addr->minimum = fixed_memory32->address;
  223. addr->address_length = fixed_memory32->address_length;
  224. addr->maximum = addr->minimum + addr->address_length - 1;
  225. return AE_OK;
  226. case ACPI_RESOURCE_TYPE_ADDRESS16:
  227. case ACPI_RESOURCE_TYPE_ADDRESS32:
  228. case ACPI_RESOURCE_TYPE_ADDRESS64:
  229. status = acpi_resource_to_address64(resource, addr);
  230. if (ACPI_SUCCESS(status) &&
  231. (addr->resource_type == ACPI_MEMORY_RANGE ||
  232. addr->resource_type == ACPI_IO_RANGE) &&
  233. addr->address_length > 0) {
  234. return AE_OK;
  235. }
  236. break;
  237. }
  238. return AE_ERROR;
  239. }
  240. static acpi_status count_resource(struct acpi_resource *acpi_res, void *data)
  241. {
  242. struct pci_root_info *info = data;
  243. struct acpi_resource_address64 addr;
  244. acpi_status status;
  245. status = resource_to_addr(acpi_res, &addr);
  246. if (ACPI_SUCCESS(status))
  247. info->res_num++;
  248. return AE_OK;
  249. }
  250. static acpi_status setup_resource(struct acpi_resource *acpi_res, void *data)
  251. {
  252. struct pci_root_info *info = data;
  253. struct resource *res;
  254. struct acpi_resource_address64 addr;
  255. acpi_status status;
  256. unsigned long flags;
  257. u64 start, orig_end, end;
  258. status = resource_to_addr(acpi_res, &addr);
  259. if (!ACPI_SUCCESS(status))
  260. return AE_OK;
  261. if (addr.resource_type == ACPI_MEMORY_RANGE) {
  262. flags = IORESOURCE_MEM;
  263. if (addr.info.mem.caching == ACPI_PREFETCHABLE_MEMORY)
  264. flags |= IORESOURCE_PREFETCH;
  265. } else if (addr.resource_type == ACPI_IO_RANGE) {
  266. flags = IORESOURCE_IO;
  267. } else
  268. return AE_OK;
  269. start = addr.minimum + addr.translation_offset;
  270. orig_end = end = addr.maximum + addr.translation_offset;
  271. /* Exclude non-addressable range or non-addressable portion of range */
  272. end = min(end, (u64)iomem_resource.end);
  273. if (end <= start) {
  274. dev_info(&info->bridge->dev,
  275. "host bridge window [%#llx-%#llx] "
  276. "(ignored, not CPU addressable)\n", start, orig_end);
  277. return AE_OK;
  278. } else if (orig_end != end) {
  279. dev_info(&info->bridge->dev,
  280. "host bridge window [%#llx-%#llx] "
  281. "([%#llx-%#llx] ignored, not CPU addressable)\n",
  282. start, orig_end, end + 1, orig_end);
  283. }
  284. res = &info->res[info->res_num];
  285. res->name = info->name;
  286. res->flags = flags;
  287. res->start = start;
  288. res->end = end;
  289. info->res_offset[info->res_num] = addr.translation_offset;
  290. info->res_num++;
  291. if (!pci_use_crs)
  292. dev_printk(KERN_DEBUG, &info->bridge->dev,
  293. "host bridge window %pR (ignored)\n", res);
  294. return AE_OK;
  295. }
  296. static void coalesce_windows(struct pci_root_info *info, unsigned long type)
  297. {
  298. int i, j;
  299. struct resource *res1, *res2;
  300. for (i = 0; i < info->res_num; i++) {
  301. res1 = &info->res[i];
  302. if (!(res1->flags & type))
  303. continue;
  304. for (j = i + 1; j < info->res_num; j++) {
  305. res2 = &info->res[j];
  306. if (!(res2->flags & type))
  307. continue;
  308. /*
  309. * I don't like throwing away windows because then
  310. * our resources no longer match the ACPI _CRS, but
  311. * the kernel resource tree doesn't allow overlaps.
  312. */
  313. if (resource_overlaps(res1, res2)) {
  314. res2->start = min(res1->start, res2->start);
  315. res2->end = max(res1->end, res2->end);
  316. dev_info(&info->bridge->dev,
  317. "host bridge window expanded to %pR; %pR ignored\n",
  318. res2, res1);
  319. res1->flags = 0;
  320. }
  321. }
  322. }
  323. }
  324. static void add_resources(struct pci_root_info *info,
  325. struct list_head *resources)
  326. {
  327. int i;
  328. struct resource *res, *root, *conflict;
  329. coalesce_windows(info, IORESOURCE_MEM);
  330. coalesce_windows(info, IORESOURCE_IO);
  331. for (i = 0; i < info->res_num; i++) {
  332. res = &info->res[i];
  333. if (res->flags & IORESOURCE_MEM)
  334. root = &iomem_resource;
  335. else if (res->flags & IORESOURCE_IO)
  336. root = &ioport_resource;
  337. else
  338. continue;
  339. conflict = insert_resource_conflict(root, res);
  340. if (conflict)
  341. dev_info(&info->bridge->dev,
  342. "ignoring host bridge window %pR (conflicts with %s %pR)\n",
  343. res, conflict->name, conflict);
  344. else
  345. pci_add_resource_offset(resources, res,
  346. info->res_offset[i]);
  347. }
  348. }
  349. static void free_pci_root_info_res(struct pci_root_info *info)
  350. {
  351. kfree(info->res);
  352. info->res = NULL;
  353. kfree(info->res_offset);
  354. info->res_offset = NULL;
  355. info->res_num = 0;
  356. }
  357. static void __release_pci_root_info(struct pci_root_info *info)
  358. {
  359. int i;
  360. struct resource *res;
  361. for (i = 0; i < info->res_num; i++) {
  362. res = &info->res[i];
  363. if (!res->parent)
  364. continue;
  365. if (!(res->flags & (IORESOURCE_MEM | IORESOURCE_IO)))
  366. continue;
  367. release_resource(res);
  368. }
  369. free_pci_root_info_res(info);
  370. teardown_mcfg_map(info);
  371. kfree(info);
  372. }
  373. static void release_pci_root_info(struct pci_host_bridge *bridge)
  374. {
  375. struct pci_root_info *info = bridge->release_data;
  376. __release_pci_root_info(info);
  377. }
  378. static void probe_pci_root_info(struct pci_root_info *info,
  379. struct acpi_device *device,
  380. int busnum, int domain)
  381. {
  382. size_t size;
  383. sprintf(info->name, "PCI Bus %04x:%02x", domain, busnum);
  384. info->bridge = device;
  385. info->res_num = 0;
  386. acpi_walk_resources(device->handle, METHOD_NAME__CRS, count_resource,
  387. info);
  388. if (!info->res_num)
  389. return;
  390. size = sizeof(*info->res) * info->res_num;
  391. info->res = kzalloc(size, GFP_KERNEL);
  392. if (!info->res) {
  393. info->res_num = 0;
  394. return;
  395. }
  396. size = sizeof(*info->res_offset) * info->res_num;
  397. info->res_num = 0;
  398. info->res_offset = kzalloc(size, GFP_KERNEL);
  399. if (!info->res_offset) {
  400. kfree(info->res);
  401. info->res = NULL;
  402. return;
  403. }
  404. acpi_walk_resources(device->handle, METHOD_NAME__CRS, setup_resource,
  405. info);
  406. }
  407. struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root)
  408. {
  409. struct acpi_device *device = root->device;
  410. struct pci_root_info *info;
  411. int domain = root->segment;
  412. int busnum = root->secondary.start;
  413. LIST_HEAD(resources);
  414. struct pci_bus *bus;
  415. struct pci_sysdata *sd;
  416. int node;
  417. if (pci_ignore_seg)
  418. domain = 0;
  419. if (domain && !pci_domains_supported) {
  420. printk(KERN_WARNING "pci_bus %04x:%02x: "
  421. "ignored (multiple domains not supported)\n",
  422. domain, busnum);
  423. return NULL;
  424. }
  425. node = acpi_get_node(device->handle);
  426. if (node == NUMA_NO_NODE) {
  427. node = x86_pci_root_bus_node(busnum);
  428. if (node != 0 && node != NUMA_NO_NODE)
  429. dev_info(&device->dev, FW_BUG "no _PXM; falling back to node %d from hardware (may be inconsistent with ACPI node numbers)\n",
  430. node);
  431. }
  432. if (node != NUMA_NO_NODE && !node_online(node))
  433. node = NUMA_NO_NODE;
  434. info = kzalloc(sizeof(*info), GFP_KERNEL);
  435. if (!info) {
  436. printk(KERN_WARNING "pci_bus %04x:%02x: "
  437. "ignored (out of memory)\n", domain, busnum);
  438. return NULL;
  439. }
  440. sd = &info->sd;
  441. sd->domain = domain;
  442. sd->node = node;
  443. sd->companion = device;
  444. bus = pci_find_bus(domain, busnum);
  445. if (bus) {
  446. /*
  447. * If the desired bus has been scanned already, replace
  448. * its bus->sysdata.
  449. */
  450. memcpy(bus->sysdata, sd, sizeof(*sd));
  451. kfree(info);
  452. } else {
  453. probe_pci_root_info(info, device, busnum, domain);
  454. /* insert busn res at first */
  455. pci_add_resource(&resources, &root->secondary);
  456. /*
  457. * _CRS with no apertures is normal, so only fall back to
  458. * defaults or native bridge info if we're ignoring _CRS.
  459. */
  460. if (pci_use_crs)
  461. add_resources(info, &resources);
  462. else {
  463. free_pci_root_info_res(info);
  464. x86_pci_root_bus_resources(busnum, &resources);
  465. }
  466. if (!setup_mcfg_map(info, domain, (u8)root->secondary.start,
  467. (u8)root->secondary.end, root->mcfg_addr))
  468. bus = pci_create_root_bus(NULL, busnum, &pci_root_ops,
  469. sd, &resources);
  470. if (bus) {
  471. pci_scan_child_bus(bus);
  472. pci_set_host_bridge_release(
  473. to_pci_host_bridge(bus->bridge),
  474. release_pci_root_info, info);
  475. } else {
  476. pci_free_resource_list(&resources);
  477. __release_pci_root_info(info);
  478. }
  479. }
  480. /* After the PCI-E bus has been walked and all devices discovered,
  481. * configure any settings of the fabric that might be necessary.
  482. */
  483. if (bus) {
  484. struct pci_bus *child;
  485. list_for_each_entry(child, &bus->children, node)
  486. pcie_bus_configure_settings(child);
  487. }
  488. if (bus && node != NUMA_NO_NODE)
  489. dev_printk(KERN_DEBUG, &bus->dev, "on NUMA node %d\n", node);
  490. return bus;
  491. }
  492. int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge)
  493. {
  494. struct pci_sysdata *sd = bridge->bus->sysdata;
  495. ACPI_COMPANION_SET(&bridge->dev, sd->companion);
  496. return 0;
  497. }
  498. int __init pci_acpi_init(void)
  499. {
  500. struct pci_dev *dev = NULL;
  501. if (acpi_noirq)
  502. return -ENODEV;
  503. printk(KERN_INFO "PCI: Using ACPI for IRQ routing\n");
  504. acpi_irq_penalty_init();
  505. pcibios_enable_irq = acpi_pci_irq_enable;
  506. pcibios_disable_irq = acpi_pci_irq_disable;
  507. x86_init.pci.init_irq = x86_init_noop;
  508. if (pci_routeirq) {
  509. /*
  510. * PCI IRQ routing is set up by pci_enable_device(), but we
  511. * also do it here in case there are still broken drivers that
  512. * don't use pci_enable_device().
  513. */
  514. printk(KERN_INFO "PCI: Routing PCI interrupts for all devices because \"pci=routeirq\" specified\n");
  515. for_each_pci_dev(dev)
  516. acpi_pci_irq_enable(dev);
  517. }
  518. return 0;
  519. }