bpf_jit_comp.c 25 KB

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  1. /* bpf_jit_comp.c : BPF JIT compiler
  2. *
  3. * Copyright (C) 2011-2013 Eric Dumazet (eric.dumazet@gmail.com)
  4. * Internal BPF Copyright (c) 2011-2014 PLUMgrid, http://plumgrid.com
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * as published by the Free Software Foundation; version 2
  9. * of the License.
  10. */
  11. #include <linux/moduleloader.h>
  12. #include <asm/cacheflush.h>
  13. #include <linux/netdevice.h>
  14. #include <linux/filter.h>
  15. #include <linux/if_vlan.h>
  16. #include <linux/random.h>
  17. int bpf_jit_enable __read_mostly;
  18. /*
  19. * assembly code in arch/x86/net/bpf_jit.S
  20. */
  21. extern u8 sk_load_word[], sk_load_half[], sk_load_byte[];
  22. extern u8 sk_load_word_positive_offset[], sk_load_half_positive_offset[];
  23. extern u8 sk_load_byte_positive_offset[];
  24. extern u8 sk_load_word_negative_offset[], sk_load_half_negative_offset[];
  25. extern u8 sk_load_byte_negative_offset[];
  26. static inline u8 *emit_code(u8 *ptr, u32 bytes, unsigned int len)
  27. {
  28. if (len == 1)
  29. *ptr = bytes;
  30. else if (len == 2)
  31. *(u16 *)ptr = bytes;
  32. else {
  33. *(u32 *)ptr = bytes;
  34. barrier();
  35. }
  36. return ptr + len;
  37. }
  38. #define EMIT(bytes, len) do { prog = emit_code(prog, bytes, len); } while (0)
  39. #define EMIT1(b1) EMIT(b1, 1)
  40. #define EMIT2(b1, b2) EMIT((b1) + ((b2) << 8), 2)
  41. #define EMIT3(b1, b2, b3) EMIT((b1) + ((b2) << 8) + ((b3) << 16), 3)
  42. #define EMIT4(b1, b2, b3, b4) EMIT((b1) + ((b2) << 8) + ((b3) << 16) + ((b4) << 24), 4)
  43. #define EMIT1_off32(b1, off) \
  44. do {EMIT1(b1); EMIT(off, 4); } while (0)
  45. #define EMIT2_off32(b1, b2, off) \
  46. do {EMIT2(b1, b2); EMIT(off, 4); } while (0)
  47. #define EMIT3_off32(b1, b2, b3, off) \
  48. do {EMIT3(b1, b2, b3); EMIT(off, 4); } while (0)
  49. #define EMIT4_off32(b1, b2, b3, b4, off) \
  50. do {EMIT4(b1, b2, b3, b4); EMIT(off, 4); } while (0)
  51. static inline bool is_imm8(int value)
  52. {
  53. return value <= 127 && value >= -128;
  54. }
  55. static inline bool is_simm32(s64 value)
  56. {
  57. return value == (s64) (s32) value;
  58. }
  59. /* mov dst, src */
  60. #define EMIT_mov(DST, SRC) \
  61. do {if (DST != SRC) \
  62. EMIT3(add_2mod(0x48, DST, SRC), 0x89, add_2reg(0xC0, DST, SRC)); \
  63. } while (0)
  64. static int bpf_size_to_x86_bytes(int bpf_size)
  65. {
  66. if (bpf_size == BPF_W)
  67. return 4;
  68. else if (bpf_size == BPF_H)
  69. return 2;
  70. else if (bpf_size == BPF_B)
  71. return 1;
  72. else if (bpf_size == BPF_DW)
  73. return 4; /* imm32 */
  74. else
  75. return 0;
  76. }
  77. /* list of x86 cond jumps opcodes (. + s8)
  78. * Add 0x10 (and an extra 0x0f) to generate far jumps (. + s32)
  79. */
  80. #define X86_JB 0x72
  81. #define X86_JAE 0x73
  82. #define X86_JE 0x74
  83. #define X86_JNE 0x75
  84. #define X86_JBE 0x76
  85. #define X86_JA 0x77
  86. #define X86_JGE 0x7D
  87. #define X86_JG 0x7F
  88. static inline void bpf_flush_icache(void *start, void *end)
  89. {
  90. mm_segment_t old_fs = get_fs();
  91. set_fs(KERNEL_DS);
  92. smp_wmb();
  93. flush_icache_range((unsigned long)start, (unsigned long)end);
  94. set_fs(old_fs);
  95. }
  96. #define CHOOSE_LOAD_FUNC(K, func) \
  97. ((int)K < 0 ? ((int)K >= SKF_LL_OFF ? func##_negative_offset : func) : func##_positive_offset)
  98. struct bpf_binary_header {
  99. unsigned int pages;
  100. /* Note : for security reasons, bpf code will follow a randomly
  101. * sized amount of int3 instructions
  102. */
  103. u8 image[];
  104. };
  105. static struct bpf_binary_header *bpf_alloc_binary(unsigned int proglen,
  106. u8 **image_ptr)
  107. {
  108. unsigned int sz, hole;
  109. struct bpf_binary_header *header;
  110. /* Most of BPF filters are really small,
  111. * but if some of them fill a page, allow at least
  112. * 128 extra bytes to insert a random section of int3
  113. */
  114. sz = round_up(proglen + sizeof(*header) + 128, PAGE_SIZE);
  115. header = module_alloc(sz);
  116. if (!header)
  117. return NULL;
  118. memset(header, 0xcc, sz); /* fill whole space with int3 instructions */
  119. header->pages = sz / PAGE_SIZE;
  120. hole = min(sz - (proglen + sizeof(*header)), PAGE_SIZE - sizeof(*header));
  121. /* insert a random number of int3 instructions before BPF code */
  122. *image_ptr = &header->image[prandom_u32() % hole];
  123. return header;
  124. }
  125. /* pick a register outside of BPF range for JIT internal work */
  126. #define AUX_REG (MAX_BPF_REG + 1)
  127. /* the following table maps BPF registers to x64 registers.
  128. * x64 register r12 is unused, since if used as base address register
  129. * in load/store instructions, it always needs an extra byte of encoding
  130. */
  131. static const int reg2hex[] = {
  132. [BPF_REG_0] = 0, /* rax */
  133. [BPF_REG_1] = 7, /* rdi */
  134. [BPF_REG_2] = 6, /* rsi */
  135. [BPF_REG_3] = 2, /* rdx */
  136. [BPF_REG_4] = 1, /* rcx */
  137. [BPF_REG_5] = 0, /* r8 */
  138. [BPF_REG_6] = 3, /* rbx callee saved */
  139. [BPF_REG_7] = 5, /* r13 callee saved */
  140. [BPF_REG_8] = 6, /* r14 callee saved */
  141. [BPF_REG_9] = 7, /* r15 callee saved */
  142. [BPF_REG_FP] = 5, /* rbp readonly */
  143. [AUX_REG] = 3, /* r11 temp register */
  144. };
  145. /* is_ereg() == true if BPF register 'reg' maps to x64 r8..r15
  146. * which need extra byte of encoding.
  147. * rax,rcx,...,rbp have simpler encoding
  148. */
  149. static inline bool is_ereg(u32 reg)
  150. {
  151. if (reg == BPF_REG_5 || reg == AUX_REG ||
  152. (reg >= BPF_REG_7 && reg <= BPF_REG_9))
  153. return true;
  154. else
  155. return false;
  156. }
  157. /* add modifiers if 'reg' maps to x64 registers r8..r15 */
  158. static inline u8 add_1mod(u8 byte, u32 reg)
  159. {
  160. if (is_ereg(reg))
  161. byte |= 1;
  162. return byte;
  163. }
  164. static inline u8 add_2mod(u8 byte, u32 r1, u32 r2)
  165. {
  166. if (is_ereg(r1))
  167. byte |= 1;
  168. if (is_ereg(r2))
  169. byte |= 4;
  170. return byte;
  171. }
  172. /* encode 'dst_reg' register into x64 opcode 'byte' */
  173. static inline u8 add_1reg(u8 byte, u32 dst_reg)
  174. {
  175. return byte + reg2hex[dst_reg];
  176. }
  177. /* encode 'dst_reg' and 'src_reg' registers into x64 opcode 'byte' */
  178. static inline u8 add_2reg(u8 byte, u32 dst_reg, u32 src_reg)
  179. {
  180. return byte + reg2hex[dst_reg] + (reg2hex[src_reg] << 3);
  181. }
  182. struct jit_context {
  183. unsigned int cleanup_addr; /* epilogue code offset */
  184. bool seen_ld_abs;
  185. };
  186. static int do_jit(struct sk_filter *bpf_prog, int *addrs, u8 *image,
  187. int oldproglen, struct jit_context *ctx)
  188. {
  189. struct sock_filter_int *insn = bpf_prog->insnsi;
  190. int insn_cnt = bpf_prog->len;
  191. u8 temp[64];
  192. int i;
  193. int proglen = 0;
  194. u8 *prog = temp;
  195. int stacksize = MAX_BPF_STACK +
  196. 32 /* space for rbx, r13, r14, r15 */ +
  197. 8 /* space for skb_copy_bits() buffer */;
  198. EMIT1(0x55); /* push rbp */
  199. EMIT3(0x48, 0x89, 0xE5); /* mov rbp,rsp */
  200. /* sub rsp, stacksize */
  201. EMIT3_off32(0x48, 0x81, 0xEC, stacksize);
  202. /* all classic BPF filters use R6(rbx) save it */
  203. /* mov qword ptr [rbp-X],rbx */
  204. EMIT3_off32(0x48, 0x89, 0x9D, -stacksize);
  205. /* sk_convert_filter() maps classic BPF register X to R7 and uses R8
  206. * as temporary, so all tcpdump filters need to spill/fill R7(r13) and
  207. * R8(r14). R9(r15) spill could be made conditional, but there is only
  208. * one 'bpf_error' return path out of helper functions inside bpf_jit.S
  209. * The overhead of extra spill is negligible for any filter other
  210. * than synthetic ones. Therefore not worth adding complexity.
  211. */
  212. /* mov qword ptr [rbp-X],r13 */
  213. EMIT3_off32(0x4C, 0x89, 0xAD, -stacksize + 8);
  214. /* mov qword ptr [rbp-X],r14 */
  215. EMIT3_off32(0x4C, 0x89, 0xB5, -stacksize + 16);
  216. /* mov qword ptr [rbp-X],r15 */
  217. EMIT3_off32(0x4C, 0x89, 0xBD, -stacksize + 24);
  218. /* clear A and X registers */
  219. EMIT2(0x31, 0xc0); /* xor eax, eax */
  220. EMIT3(0x4D, 0x31, 0xED); /* xor r13, r13 */
  221. if (ctx->seen_ld_abs) {
  222. /* r9d : skb->len - skb->data_len (headlen)
  223. * r10 : skb->data
  224. */
  225. if (is_imm8(offsetof(struct sk_buff, len)))
  226. /* mov %r9d, off8(%rdi) */
  227. EMIT4(0x44, 0x8b, 0x4f,
  228. offsetof(struct sk_buff, len));
  229. else
  230. /* mov %r9d, off32(%rdi) */
  231. EMIT3_off32(0x44, 0x8b, 0x8f,
  232. offsetof(struct sk_buff, len));
  233. if (is_imm8(offsetof(struct sk_buff, data_len)))
  234. /* sub %r9d, off8(%rdi) */
  235. EMIT4(0x44, 0x2b, 0x4f,
  236. offsetof(struct sk_buff, data_len));
  237. else
  238. EMIT3_off32(0x44, 0x2b, 0x8f,
  239. offsetof(struct sk_buff, data_len));
  240. if (is_imm8(offsetof(struct sk_buff, data)))
  241. /* mov %r10, off8(%rdi) */
  242. EMIT4(0x4c, 0x8b, 0x57,
  243. offsetof(struct sk_buff, data));
  244. else
  245. /* mov %r10, off32(%rdi) */
  246. EMIT3_off32(0x4c, 0x8b, 0x97,
  247. offsetof(struct sk_buff, data));
  248. }
  249. for (i = 0; i < insn_cnt; i++, insn++) {
  250. const s32 imm32 = insn->imm;
  251. u32 dst_reg = insn->dst_reg;
  252. u32 src_reg = insn->src_reg;
  253. u8 b1 = 0, b2 = 0, b3 = 0;
  254. s64 jmp_offset;
  255. u8 jmp_cond;
  256. int ilen;
  257. u8 *func;
  258. switch (insn->code) {
  259. /* ALU */
  260. case BPF_ALU | BPF_ADD | BPF_X:
  261. case BPF_ALU | BPF_SUB | BPF_X:
  262. case BPF_ALU | BPF_AND | BPF_X:
  263. case BPF_ALU | BPF_OR | BPF_X:
  264. case BPF_ALU | BPF_XOR | BPF_X:
  265. case BPF_ALU64 | BPF_ADD | BPF_X:
  266. case BPF_ALU64 | BPF_SUB | BPF_X:
  267. case BPF_ALU64 | BPF_AND | BPF_X:
  268. case BPF_ALU64 | BPF_OR | BPF_X:
  269. case BPF_ALU64 | BPF_XOR | BPF_X:
  270. switch (BPF_OP(insn->code)) {
  271. case BPF_ADD: b2 = 0x01; break;
  272. case BPF_SUB: b2 = 0x29; break;
  273. case BPF_AND: b2 = 0x21; break;
  274. case BPF_OR: b2 = 0x09; break;
  275. case BPF_XOR: b2 = 0x31; break;
  276. }
  277. if (BPF_CLASS(insn->code) == BPF_ALU64)
  278. EMIT1(add_2mod(0x48, dst_reg, src_reg));
  279. else if (is_ereg(dst_reg) || is_ereg(src_reg))
  280. EMIT1(add_2mod(0x40, dst_reg, src_reg));
  281. EMIT2(b2, add_2reg(0xC0, dst_reg, src_reg));
  282. break;
  283. /* mov dst, src */
  284. case BPF_ALU64 | BPF_MOV | BPF_X:
  285. EMIT_mov(dst_reg, src_reg);
  286. break;
  287. /* mov32 dst, src */
  288. case BPF_ALU | BPF_MOV | BPF_X:
  289. if (is_ereg(dst_reg) || is_ereg(src_reg))
  290. EMIT1(add_2mod(0x40, dst_reg, src_reg));
  291. EMIT2(0x89, add_2reg(0xC0, dst_reg, src_reg));
  292. break;
  293. /* neg dst */
  294. case BPF_ALU | BPF_NEG:
  295. case BPF_ALU64 | BPF_NEG:
  296. if (BPF_CLASS(insn->code) == BPF_ALU64)
  297. EMIT1(add_1mod(0x48, dst_reg));
  298. else if (is_ereg(dst_reg))
  299. EMIT1(add_1mod(0x40, dst_reg));
  300. EMIT2(0xF7, add_1reg(0xD8, dst_reg));
  301. break;
  302. case BPF_ALU | BPF_ADD | BPF_K:
  303. case BPF_ALU | BPF_SUB | BPF_K:
  304. case BPF_ALU | BPF_AND | BPF_K:
  305. case BPF_ALU | BPF_OR | BPF_K:
  306. case BPF_ALU | BPF_XOR | BPF_K:
  307. case BPF_ALU64 | BPF_ADD | BPF_K:
  308. case BPF_ALU64 | BPF_SUB | BPF_K:
  309. case BPF_ALU64 | BPF_AND | BPF_K:
  310. case BPF_ALU64 | BPF_OR | BPF_K:
  311. case BPF_ALU64 | BPF_XOR | BPF_K:
  312. if (BPF_CLASS(insn->code) == BPF_ALU64)
  313. EMIT1(add_1mod(0x48, dst_reg));
  314. else if (is_ereg(dst_reg))
  315. EMIT1(add_1mod(0x40, dst_reg));
  316. switch (BPF_OP(insn->code)) {
  317. case BPF_ADD: b3 = 0xC0; break;
  318. case BPF_SUB: b3 = 0xE8; break;
  319. case BPF_AND: b3 = 0xE0; break;
  320. case BPF_OR: b3 = 0xC8; break;
  321. case BPF_XOR: b3 = 0xF0; break;
  322. }
  323. if (is_imm8(imm32))
  324. EMIT3(0x83, add_1reg(b3, dst_reg), imm32);
  325. else
  326. EMIT2_off32(0x81, add_1reg(b3, dst_reg), imm32);
  327. break;
  328. case BPF_ALU64 | BPF_MOV | BPF_K:
  329. /* optimization: if imm32 is positive,
  330. * use 'mov eax, imm32' (which zero-extends imm32)
  331. * to save 2 bytes
  332. */
  333. if (imm32 < 0) {
  334. /* 'mov rax, imm32' sign extends imm32 */
  335. b1 = add_1mod(0x48, dst_reg);
  336. b2 = 0xC7;
  337. b3 = 0xC0;
  338. EMIT3_off32(b1, b2, add_1reg(b3, dst_reg), imm32);
  339. break;
  340. }
  341. case BPF_ALU | BPF_MOV | BPF_K:
  342. /* mov %eax, imm32 */
  343. if (is_ereg(dst_reg))
  344. EMIT1(add_1mod(0x40, dst_reg));
  345. EMIT1_off32(add_1reg(0xB8, dst_reg), imm32);
  346. break;
  347. /* dst %= src, dst /= src, dst %= imm32, dst /= imm32 */
  348. case BPF_ALU | BPF_MOD | BPF_X:
  349. case BPF_ALU | BPF_DIV | BPF_X:
  350. case BPF_ALU | BPF_MOD | BPF_K:
  351. case BPF_ALU | BPF_DIV | BPF_K:
  352. case BPF_ALU64 | BPF_MOD | BPF_X:
  353. case BPF_ALU64 | BPF_DIV | BPF_X:
  354. case BPF_ALU64 | BPF_MOD | BPF_K:
  355. case BPF_ALU64 | BPF_DIV | BPF_K:
  356. EMIT1(0x50); /* push rax */
  357. EMIT1(0x52); /* push rdx */
  358. if (BPF_SRC(insn->code) == BPF_X)
  359. /* mov r11, src_reg */
  360. EMIT_mov(AUX_REG, src_reg);
  361. else
  362. /* mov r11, imm32 */
  363. EMIT3_off32(0x49, 0xC7, 0xC3, imm32);
  364. /* mov rax, dst_reg */
  365. EMIT_mov(BPF_REG_0, dst_reg);
  366. /* xor edx, edx
  367. * equivalent to 'xor rdx, rdx', but one byte less
  368. */
  369. EMIT2(0x31, 0xd2);
  370. if (BPF_SRC(insn->code) == BPF_X) {
  371. /* if (src_reg == 0) return 0 */
  372. /* cmp r11, 0 */
  373. EMIT4(0x49, 0x83, 0xFB, 0x00);
  374. /* jne .+9 (skip over pop, pop, xor and jmp) */
  375. EMIT2(X86_JNE, 1 + 1 + 2 + 5);
  376. EMIT1(0x5A); /* pop rdx */
  377. EMIT1(0x58); /* pop rax */
  378. EMIT2(0x31, 0xc0); /* xor eax, eax */
  379. /* jmp cleanup_addr
  380. * addrs[i] - 11, because there are 11 bytes
  381. * after this insn: div, mov, pop, pop, mov
  382. */
  383. jmp_offset = ctx->cleanup_addr - (addrs[i] - 11);
  384. EMIT1_off32(0xE9, jmp_offset);
  385. }
  386. if (BPF_CLASS(insn->code) == BPF_ALU64)
  387. /* div r11 */
  388. EMIT3(0x49, 0xF7, 0xF3);
  389. else
  390. /* div r11d */
  391. EMIT3(0x41, 0xF7, 0xF3);
  392. if (BPF_OP(insn->code) == BPF_MOD)
  393. /* mov r11, rdx */
  394. EMIT3(0x49, 0x89, 0xD3);
  395. else
  396. /* mov r11, rax */
  397. EMIT3(0x49, 0x89, 0xC3);
  398. EMIT1(0x5A); /* pop rdx */
  399. EMIT1(0x58); /* pop rax */
  400. /* mov dst_reg, r11 */
  401. EMIT_mov(dst_reg, AUX_REG);
  402. break;
  403. case BPF_ALU | BPF_MUL | BPF_K:
  404. case BPF_ALU | BPF_MUL | BPF_X:
  405. case BPF_ALU64 | BPF_MUL | BPF_K:
  406. case BPF_ALU64 | BPF_MUL | BPF_X:
  407. EMIT1(0x50); /* push rax */
  408. EMIT1(0x52); /* push rdx */
  409. /* mov r11, dst_reg */
  410. EMIT_mov(AUX_REG, dst_reg);
  411. if (BPF_SRC(insn->code) == BPF_X)
  412. /* mov rax, src_reg */
  413. EMIT_mov(BPF_REG_0, src_reg);
  414. else
  415. /* mov rax, imm32 */
  416. EMIT3_off32(0x48, 0xC7, 0xC0, imm32);
  417. if (BPF_CLASS(insn->code) == BPF_ALU64)
  418. EMIT1(add_1mod(0x48, AUX_REG));
  419. else if (is_ereg(AUX_REG))
  420. EMIT1(add_1mod(0x40, AUX_REG));
  421. /* mul(q) r11 */
  422. EMIT2(0xF7, add_1reg(0xE0, AUX_REG));
  423. /* mov r11, rax */
  424. EMIT_mov(AUX_REG, BPF_REG_0);
  425. EMIT1(0x5A); /* pop rdx */
  426. EMIT1(0x58); /* pop rax */
  427. /* mov dst_reg, r11 */
  428. EMIT_mov(dst_reg, AUX_REG);
  429. break;
  430. /* shifts */
  431. case BPF_ALU | BPF_LSH | BPF_K:
  432. case BPF_ALU | BPF_RSH | BPF_K:
  433. case BPF_ALU | BPF_ARSH | BPF_K:
  434. case BPF_ALU64 | BPF_LSH | BPF_K:
  435. case BPF_ALU64 | BPF_RSH | BPF_K:
  436. case BPF_ALU64 | BPF_ARSH | BPF_K:
  437. if (BPF_CLASS(insn->code) == BPF_ALU64)
  438. EMIT1(add_1mod(0x48, dst_reg));
  439. else if (is_ereg(dst_reg))
  440. EMIT1(add_1mod(0x40, dst_reg));
  441. switch (BPF_OP(insn->code)) {
  442. case BPF_LSH: b3 = 0xE0; break;
  443. case BPF_RSH: b3 = 0xE8; break;
  444. case BPF_ARSH: b3 = 0xF8; break;
  445. }
  446. EMIT3(0xC1, add_1reg(b3, dst_reg), imm32);
  447. break;
  448. case BPF_ALU | BPF_END | BPF_FROM_BE:
  449. switch (imm32) {
  450. case 16:
  451. /* emit 'ror %ax, 8' to swap lower 2 bytes */
  452. EMIT1(0x66);
  453. if (is_ereg(dst_reg))
  454. EMIT1(0x41);
  455. EMIT3(0xC1, add_1reg(0xC8, dst_reg), 8);
  456. break;
  457. case 32:
  458. /* emit 'bswap eax' to swap lower 4 bytes */
  459. if (is_ereg(dst_reg))
  460. EMIT2(0x41, 0x0F);
  461. else
  462. EMIT1(0x0F);
  463. EMIT1(add_1reg(0xC8, dst_reg));
  464. break;
  465. case 64:
  466. /* emit 'bswap rax' to swap 8 bytes */
  467. EMIT3(add_1mod(0x48, dst_reg), 0x0F,
  468. add_1reg(0xC8, dst_reg));
  469. break;
  470. }
  471. break;
  472. case BPF_ALU | BPF_END | BPF_FROM_LE:
  473. break;
  474. /* ST: *(u8*)(dst_reg + off) = imm */
  475. case BPF_ST | BPF_MEM | BPF_B:
  476. if (is_ereg(dst_reg))
  477. EMIT2(0x41, 0xC6);
  478. else
  479. EMIT1(0xC6);
  480. goto st;
  481. case BPF_ST | BPF_MEM | BPF_H:
  482. if (is_ereg(dst_reg))
  483. EMIT3(0x66, 0x41, 0xC7);
  484. else
  485. EMIT2(0x66, 0xC7);
  486. goto st;
  487. case BPF_ST | BPF_MEM | BPF_W:
  488. if (is_ereg(dst_reg))
  489. EMIT2(0x41, 0xC7);
  490. else
  491. EMIT1(0xC7);
  492. goto st;
  493. case BPF_ST | BPF_MEM | BPF_DW:
  494. EMIT2(add_1mod(0x48, dst_reg), 0xC7);
  495. st: if (is_imm8(insn->off))
  496. EMIT2(add_1reg(0x40, dst_reg), insn->off);
  497. else
  498. EMIT1_off32(add_1reg(0x80, dst_reg), insn->off);
  499. EMIT(imm32, bpf_size_to_x86_bytes(BPF_SIZE(insn->code)));
  500. break;
  501. /* STX: *(u8*)(dst_reg + off) = src_reg */
  502. case BPF_STX | BPF_MEM | BPF_B:
  503. /* emit 'mov byte ptr [rax + off], al' */
  504. if (is_ereg(dst_reg) || is_ereg(src_reg) ||
  505. /* have to add extra byte for x86 SIL, DIL regs */
  506. src_reg == BPF_REG_1 || src_reg == BPF_REG_2)
  507. EMIT2(add_2mod(0x40, dst_reg, src_reg), 0x88);
  508. else
  509. EMIT1(0x88);
  510. goto stx;
  511. case BPF_STX | BPF_MEM | BPF_H:
  512. if (is_ereg(dst_reg) || is_ereg(src_reg))
  513. EMIT3(0x66, add_2mod(0x40, dst_reg, src_reg), 0x89);
  514. else
  515. EMIT2(0x66, 0x89);
  516. goto stx;
  517. case BPF_STX | BPF_MEM | BPF_W:
  518. if (is_ereg(dst_reg) || is_ereg(src_reg))
  519. EMIT2(add_2mod(0x40, dst_reg, src_reg), 0x89);
  520. else
  521. EMIT1(0x89);
  522. goto stx;
  523. case BPF_STX | BPF_MEM | BPF_DW:
  524. EMIT2(add_2mod(0x48, dst_reg, src_reg), 0x89);
  525. stx: if (is_imm8(insn->off))
  526. EMIT2(add_2reg(0x40, dst_reg, src_reg), insn->off);
  527. else
  528. EMIT1_off32(add_2reg(0x80, dst_reg, src_reg),
  529. insn->off);
  530. break;
  531. /* LDX: dst_reg = *(u8*)(src_reg + off) */
  532. case BPF_LDX | BPF_MEM | BPF_B:
  533. /* emit 'movzx rax, byte ptr [rax + off]' */
  534. EMIT3(add_2mod(0x48, src_reg, dst_reg), 0x0F, 0xB6);
  535. goto ldx;
  536. case BPF_LDX | BPF_MEM | BPF_H:
  537. /* emit 'movzx rax, word ptr [rax + off]' */
  538. EMIT3(add_2mod(0x48, src_reg, dst_reg), 0x0F, 0xB7);
  539. goto ldx;
  540. case BPF_LDX | BPF_MEM | BPF_W:
  541. /* emit 'mov eax, dword ptr [rax+0x14]' */
  542. if (is_ereg(dst_reg) || is_ereg(src_reg))
  543. EMIT2(add_2mod(0x40, src_reg, dst_reg), 0x8B);
  544. else
  545. EMIT1(0x8B);
  546. goto ldx;
  547. case BPF_LDX | BPF_MEM | BPF_DW:
  548. /* emit 'mov rax, qword ptr [rax+0x14]' */
  549. EMIT2(add_2mod(0x48, src_reg, dst_reg), 0x8B);
  550. ldx: /* if insn->off == 0 we can save one extra byte, but
  551. * special case of x86 r13 which always needs an offset
  552. * is not worth the hassle
  553. */
  554. if (is_imm8(insn->off))
  555. EMIT2(add_2reg(0x40, src_reg, dst_reg), insn->off);
  556. else
  557. EMIT1_off32(add_2reg(0x80, src_reg, dst_reg),
  558. insn->off);
  559. break;
  560. /* STX XADD: lock *(u32*)(dst_reg + off) += src_reg */
  561. case BPF_STX | BPF_XADD | BPF_W:
  562. /* emit 'lock add dword ptr [rax + off], eax' */
  563. if (is_ereg(dst_reg) || is_ereg(src_reg))
  564. EMIT3(0xF0, add_2mod(0x40, dst_reg, src_reg), 0x01);
  565. else
  566. EMIT2(0xF0, 0x01);
  567. goto xadd;
  568. case BPF_STX | BPF_XADD | BPF_DW:
  569. EMIT3(0xF0, add_2mod(0x48, dst_reg, src_reg), 0x01);
  570. xadd: if (is_imm8(insn->off))
  571. EMIT2(add_2reg(0x40, dst_reg, src_reg), insn->off);
  572. else
  573. EMIT1_off32(add_2reg(0x80, dst_reg, src_reg),
  574. insn->off);
  575. break;
  576. /* call */
  577. case BPF_JMP | BPF_CALL:
  578. func = (u8 *) __bpf_call_base + imm32;
  579. jmp_offset = func - (image + addrs[i]);
  580. if (ctx->seen_ld_abs) {
  581. EMIT2(0x41, 0x52); /* push %r10 */
  582. EMIT2(0x41, 0x51); /* push %r9 */
  583. /* need to adjust jmp offset, since
  584. * pop %r9, pop %r10 take 4 bytes after call insn
  585. */
  586. jmp_offset += 4;
  587. }
  588. if (!imm32 || !is_simm32(jmp_offset)) {
  589. pr_err("unsupported bpf func %d addr %p image %p\n",
  590. imm32, func, image);
  591. return -EINVAL;
  592. }
  593. EMIT1_off32(0xE8, jmp_offset);
  594. if (ctx->seen_ld_abs) {
  595. EMIT2(0x41, 0x59); /* pop %r9 */
  596. EMIT2(0x41, 0x5A); /* pop %r10 */
  597. }
  598. break;
  599. /* cond jump */
  600. case BPF_JMP | BPF_JEQ | BPF_X:
  601. case BPF_JMP | BPF_JNE | BPF_X:
  602. case BPF_JMP | BPF_JGT | BPF_X:
  603. case BPF_JMP | BPF_JGE | BPF_X:
  604. case BPF_JMP | BPF_JSGT | BPF_X:
  605. case BPF_JMP | BPF_JSGE | BPF_X:
  606. /* cmp dst_reg, src_reg */
  607. EMIT3(add_2mod(0x48, dst_reg, src_reg), 0x39,
  608. add_2reg(0xC0, dst_reg, src_reg));
  609. goto emit_cond_jmp;
  610. case BPF_JMP | BPF_JSET | BPF_X:
  611. /* test dst_reg, src_reg */
  612. EMIT3(add_2mod(0x48, dst_reg, src_reg), 0x85,
  613. add_2reg(0xC0, dst_reg, src_reg));
  614. goto emit_cond_jmp;
  615. case BPF_JMP | BPF_JSET | BPF_K:
  616. /* test dst_reg, imm32 */
  617. EMIT1(add_1mod(0x48, dst_reg));
  618. EMIT2_off32(0xF7, add_1reg(0xC0, dst_reg), imm32);
  619. goto emit_cond_jmp;
  620. case BPF_JMP | BPF_JEQ | BPF_K:
  621. case BPF_JMP | BPF_JNE | BPF_K:
  622. case BPF_JMP | BPF_JGT | BPF_K:
  623. case BPF_JMP | BPF_JGE | BPF_K:
  624. case BPF_JMP | BPF_JSGT | BPF_K:
  625. case BPF_JMP | BPF_JSGE | BPF_K:
  626. /* cmp dst_reg, imm8/32 */
  627. EMIT1(add_1mod(0x48, dst_reg));
  628. if (is_imm8(imm32))
  629. EMIT3(0x83, add_1reg(0xF8, dst_reg), imm32);
  630. else
  631. EMIT2_off32(0x81, add_1reg(0xF8, dst_reg), imm32);
  632. emit_cond_jmp: /* convert BPF opcode to x86 */
  633. switch (BPF_OP(insn->code)) {
  634. case BPF_JEQ:
  635. jmp_cond = X86_JE;
  636. break;
  637. case BPF_JSET:
  638. case BPF_JNE:
  639. jmp_cond = X86_JNE;
  640. break;
  641. case BPF_JGT:
  642. /* GT is unsigned '>', JA in x86 */
  643. jmp_cond = X86_JA;
  644. break;
  645. case BPF_JGE:
  646. /* GE is unsigned '>=', JAE in x86 */
  647. jmp_cond = X86_JAE;
  648. break;
  649. case BPF_JSGT:
  650. /* signed '>', GT in x86 */
  651. jmp_cond = X86_JG;
  652. break;
  653. case BPF_JSGE:
  654. /* signed '>=', GE in x86 */
  655. jmp_cond = X86_JGE;
  656. break;
  657. default: /* to silence gcc warning */
  658. return -EFAULT;
  659. }
  660. jmp_offset = addrs[i + insn->off] - addrs[i];
  661. if (is_imm8(jmp_offset)) {
  662. EMIT2(jmp_cond, jmp_offset);
  663. } else if (is_simm32(jmp_offset)) {
  664. EMIT2_off32(0x0F, jmp_cond + 0x10, jmp_offset);
  665. } else {
  666. pr_err("cond_jmp gen bug %llx\n", jmp_offset);
  667. return -EFAULT;
  668. }
  669. break;
  670. case BPF_JMP | BPF_JA:
  671. jmp_offset = addrs[i + insn->off] - addrs[i];
  672. if (!jmp_offset)
  673. /* optimize out nop jumps */
  674. break;
  675. emit_jmp:
  676. if (is_imm8(jmp_offset)) {
  677. EMIT2(0xEB, jmp_offset);
  678. } else if (is_simm32(jmp_offset)) {
  679. EMIT1_off32(0xE9, jmp_offset);
  680. } else {
  681. pr_err("jmp gen bug %llx\n", jmp_offset);
  682. return -EFAULT;
  683. }
  684. break;
  685. case BPF_LD | BPF_IND | BPF_W:
  686. func = sk_load_word;
  687. goto common_load;
  688. case BPF_LD | BPF_ABS | BPF_W:
  689. func = CHOOSE_LOAD_FUNC(imm32, sk_load_word);
  690. common_load: ctx->seen_ld_abs = true;
  691. jmp_offset = func - (image + addrs[i]);
  692. if (!func || !is_simm32(jmp_offset)) {
  693. pr_err("unsupported bpf func %d addr %p image %p\n",
  694. imm32, func, image);
  695. return -EINVAL;
  696. }
  697. if (BPF_MODE(insn->code) == BPF_ABS) {
  698. /* mov %esi, imm32 */
  699. EMIT1_off32(0xBE, imm32);
  700. } else {
  701. /* mov %rsi, src_reg */
  702. EMIT_mov(BPF_REG_2, src_reg);
  703. if (imm32) {
  704. if (is_imm8(imm32))
  705. /* add %esi, imm8 */
  706. EMIT3(0x83, 0xC6, imm32);
  707. else
  708. /* add %esi, imm32 */
  709. EMIT2_off32(0x81, 0xC6, imm32);
  710. }
  711. }
  712. /* skb pointer is in R6 (%rbx), it will be copied into
  713. * %rdi if skb_copy_bits() call is necessary.
  714. * sk_load_* helpers also use %r10 and %r9d.
  715. * See bpf_jit.S
  716. */
  717. EMIT1_off32(0xE8, jmp_offset); /* call */
  718. break;
  719. case BPF_LD | BPF_IND | BPF_H:
  720. func = sk_load_half;
  721. goto common_load;
  722. case BPF_LD | BPF_ABS | BPF_H:
  723. func = CHOOSE_LOAD_FUNC(imm32, sk_load_half);
  724. goto common_load;
  725. case BPF_LD | BPF_IND | BPF_B:
  726. func = sk_load_byte;
  727. goto common_load;
  728. case BPF_LD | BPF_ABS | BPF_B:
  729. func = CHOOSE_LOAD_FUNC(imm32, sk_load_byte);
  730. goto common_load;
  731. case BPF_JMP | BPF_EXIT:
  732. if (i != insn_cnt - 1) {
  733. jmp_offset = ctx->cleanup_addr - addrs[i];
  734. goto emit_jmp;
  735. }
  736. /* update cleanup_addr */
  737. ctx->cleanup_addr = proglen;
  738. /* mov rbx, qword ptr [rbp-X] */
  739. EMIT3_off32(0x48, 0x8B, 0x9D, -stacksize);
  740. /* mov r13, qword ptr [rbp-X] */
  741. EMIT3_off32(0x4C, 0x8B, 0xAD, -stacksize + 8);
  742. /* mov r14, qword ptr [rbp-X] */
  743. EMIT3_off32(0x4C, 0x8B, 0xB5, -stacksize + 16);
  744. /* mov r15, qword ptr [rbp-X] */
  745. EMIT3_off32(0x4C, 0x8B, 0xBD, -stacksize + 24);
  746. EMIT1(0xC9); /* leave */
  747. EMIT1(0xC3); /* ret */
  748. break;
  749. default:
  750. /* By design x64 JIT should support all BPF instructions
  751. * This error will be seen if new instruction was added
  752. * to interpreter, but not to JIT
  753. * or if there is junk in sk_filter
  754. */
  755. pr_err("bpf_jit: unknown opcode %02x\n", insn->code);
  756. return -EINVAL;
  757. }
  758. ilen = prog - temp;
  759. if (image) {
  760. if (unlikely(proglen + ilen > oldproglen)) {
  761. pr_err("bpf_jit_compile fatal error\n");
  762. return -EFAULT;
  763. }
  764. memcpy(image + proglen, temp, ilen);
  765. }
  766. proglen += ilen;
  767. addrs[i] = proglen;
  768. prog = temp;
  769. }
  770. return proglen;
  771. }
  772. void bpf_jit_compile(struct sk_filter *prog)
  773. {
  774. }
  775. void bpf_int_jit_compile(struct sk_filter *prog)
  776. {
  777. struct bpf_binary_header *header = NULL;
  778. int proglen, oldproglen = 0;
  779. struct jit_context ctx = {};
  780. u8 *image = NULL;
  781. int *addrs;
  782. int pass;
  783. int i;
  784. if (!bpf_jit_enable)
  785. return;
  786. if (!prog || !prog->len)
  787. return;
  788. addrs = kmalloc(prog->len * sizeof(*addrs), GFP_KERNEL);
  789. if (!addrs)
  790. return;
  791. /* Before first pass, make a rough estimation of addrs[]
  792. * each bpf instruction is translated to less than 64 bytes
  793. */
  794. for (proglen = 0, i = 0; i < prog->len; i++) {
  795. proglen += 64;
  796. addrs[i] = proglen;
  797. }
  798. ctx.cleanup_addr = proglen;
  799. for (pass = 0; pass < 10; pass++) {
  800. proglen = do_jit(prog, addrs, image, oldproglen, &ctx);
  801. if (proglen <= 0) {
  802. image = NULL;
  803. if (header)
  804. module_free(NULL, header);
  805. goto out;
  806. }
  807. if (image) {
  808. if (proglen != oldproglen)
  809. pr_err("bpf_jit: proglen=%d != oldproglen=%d\n",
  810. proglen, oldproglen);
  811. break;
  812. }
  813. if (proglen == oldproglen) {
  814. header = bpf_alloc_binary(proglen, &image);
  815. if (!header)
  816. goto out;
  817. }
  818. oldproglen = proglen;
  819. }
  820. if (bpf_jit_enable > 1)
  821. bpf_jit_dump(prog->len, proglen, 0, image);
  822. if (image) {
  823. bpf_flush_icache(header, image + proglen);
  824. set_memory_ro((unsigned long)header, header->pages);
  825. prog->bpf_func = (void *)image;
  826. prog->jited = 1;
  827. }
  828. out:
  829. kfree(addrs);
  830. }
  831. static void bpf_jit_free_deferred(struct work_struct *work)
  832. {
  833. struct sk_filter *fp = container_of(work, struct sk_filter, work);
  834. unsigned long addr = (unsigned long)fp->bpf_func & PAGE_MASK;
  835. struct bpf_binary_header *header = (void *)addr;
  836. set_memory_rw(addr, header->pages);
  837. module_free(NULL, header);
  838. kfree(fp);
  839. }
  840. void bpf_jit_free(struct sk_filter *fp)
  841. {
  842. if (fp->jited) {
  843. INIT_WORK(&fp->work, bpf_jit_free_deferred);
  844. schedule_work(&fp->work);
  845. } else {
  846. kfree(fp);
  847. }
  848. }