pci.c 19 KB

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  1. /*
  2. * Copyright IBM Corp. 2012
  3. *
  4. * Author(s):
  5. * Jan Glauber <jang@linux.vnet.ibm.com>
  6. *
  7. * The System z PCI code is a rewrite from a prototype by
  8. * the following people (Kudoz!):
  9. * Alexander Schmidt
  10. * Christoph Raisch
  11. * Hannes Hering
  12. * Hoang-Nam Nguyen
  13. * Jan-Bernd Themann
  14. * Stefan Roscher
  15. * Thomas Klein
  16. */
  17. #define COMPONENT "zPCI"
  18. #define pr_fmt(fmt) COMPONENT ": " fmt
  19. #include <linux/kernel.h>
  20. #include <linux/slab.h>
  21. #include <linux/err.h>
  22. #include <linux/export.h>
  23. #include <linux/delay.h>
  24. #include <linux/irq.h>
  25. #include <linux/kernel_stat.h>
  26. #include <linux/seq_file.h>
  27. #include <linux/pci.h>
  28. #include <linux/msi.h>
  29. #include <asm/isc.h>
  30. #include <asm/airq.h>
  31. #include <asm/facility.h>
  32. #include <asm/pci_insn.h>
  33. #include <asm/pci_clp.h>
  34. #include <asm/pci_dma.h>
  35. #define DEBUG /* enable pr_debug */
  36. #define SIC_IRQ_MODE_ALL 0
  37. #define SIC_IRQ_MODE_SINGLE 1
  38. #define ZPCI_NR_DMA_SPACES 1
  39. #define ZPCI_NR_DEVICES CONFIG_PCI_NR_FUNCTIONS
  40. /* list of all detected zpci devices */
  41. static LIST_HEAD(zpci_list);
  42. static DEFINE_SPINLOCK(zpci_list_lock);
  43. static struct irq_chip zpci_irq_chip = {
  44. .name = "zPCI",
  45. .irq_unmask = unmask_msi_irq,
  46. .irq_mask = mask_msi_irq,
  47. };
  48. static DECLARE_BITMAP(zpci_domain, ZPCI_NR_DEVICES);
  49. static DEFINE_SPINLOCK(zpci_domain_lock);
  50. static struct airq_iv *zpci_aisb_iv;
  51. static struct airq_iv *zpci_aibv[ZPCI_NR_DEVICES];
  52. /* Adapter interrupt definitions */
  53. static void zpci_irq_handler(struct airq_struct *airq);
  54. static struct airq_struct zpci_airq = {
  55. .handler = zpci_irq_handler,
  56. .isc = PCI_ISC,
  57. };
  58. /* I/O Map */
  59. static DEFINE_SPINLOCK(zpci_iomap_lock);
  60. static DECLARE_BITMAP(zpci_iomap, ZPCI_IOMAP_MAX_ENTRIES);
  61. struct zpci_iomap_entry *zpci_iomap_start;
  62. EXPORT_SYMBOL_GPL(zpci_iomap_start);
  63. static struct kmem_cache *zdev_fmb_cache;
  64. struct zpci_dev *get_zdev(struct pci_dev *pdev)
  65. {
  66. return (struct zpci_dev *) pdev->sysdata;
  67. }
  68. struct zpci_dev *get_zdev_by_fid(u32 fid)
  69. {
  70. struct zpci_dev *tmp, *zdev = NULL;
  71. spin_lock(&zpci_list_lock);
  72. list_for_each_entry(tmp, &zpci_list, entry) {
  73. if (tmp->fid == fid) {
  74. zdev = tmp;
  75. break;
  76. }
  77. }
  78. spin_unlock(&zpci_list_lock);
  79. return zdev;
  80. }
  81. static struct zpci_dev *get_zdev_by_bus(struct pci_bus *bus)
  82. {
  83. return (bus && bus->sysdata) ? (struct zpci_dev *) bus->sysdata : NULL;
  84. }
  85. int pci_domain_nr(struct pci_bus *bus)
  86. {
  87. return ((struct zpci_dev *) bus->sysdata)->domain;
  88. }
  89. EXPORT_SYMBOL_GPL(pci_domain_nr);
  90. int pci_proc_domain(struct pci_bus *bus)
  91. {
  92. return pci_domain_nr(bus);
  93. }
  94. EXPORT_SYMBOL_GPL(pci_proc_domain);
  95. /* Modify PCI: Register adapter interruptions */
  96. static int zpci_set_airq(struct zpci_dev *zdev)
  97. {
  98. u64 req = ZPCI_CREATE_REQ(zdev->fh, 0, ZPCI_MOD_FC_REG_INT);
  99. struct zpci_fib fib = {0};
  100. fib.isc = PCI_ISC;
  101. fib.sum = 1; /* enable summary notifications */
  102. fib.noi = airq_iv_end(zdev->aibv);
  103. fib.aibv = (unsigned long) zdev->aibv->vector;
  104. fib.aibvo = 0; /* each zdev has its own interrupt vector */
  105. fib.aisb = (unsigned long) zpci_aisb_iv->vector + (zdev->aisb/64)*8;
  106. fib.aisbo = zdev->aisb & 63;
  107. return zpci_mod_fc(req, &fib);
  108. }
  109. struct mod_pci_args {
  110. u64 base;
  111. u64 limit;
  112. u64 iota;
  113. u64 fmb_addr;
  114. };
  115. static int mod_pci(struct zpci_dev *zdev, int fn, u8 dmaas, struct mod_pci_args *args)
  116. {
  117. u64 req = ZPCI_CREATE_REQ(zdev->fh, dmaas, fn);
  118. struct zpci_fib fib = {0};
  119. fib.pba = args->base;
  120. fib.pal = args->limit;
  121. fib.iota = args->iota;
  122. fib.fmb_addr = args->fmb_addr;
  123. return zpci_mod_fc(req, &fib);
  124. }
  125. /* Modify PCI: Register I/O address translation parameters */
  126. int zpci_register_ioat(struct zpci_dev *zdev, u8 dmaas,
  127. u64 base, u64 limit, u64 iota)
  128. {
  129. struct mod_pci_args args = { base, limit, iota, 0 };
  130. WARN_ON_ONCE(iota & 0x3fff);
  131. args.iota |= ZPCI_IOTA_RTTO_FLAG;
  132. return mod_pci(zdev, ZPCI_MOD_FC_REG_IOAT, dmaas, &args);
  133. }
  134. /* Modify PCI: Unregister I/O address translation parameters */
  135. int zpci_unregister_ioat(struct zpci_dev *zdev, u8 dmaas)
  136. {
  137. struct mod_pci_args args = { 0, 0, 0, 0 };
  138. return mod_pci(zdev, ZPCI_MOD_FC_DEREG_IOAT, dmaas, &args);
  139. }
  140. /* Modify PCI: Unregister adapter interruptions */
  141. static int zpci_clear_airq(struct zpci_dev *zdev)
  142. {
  143. struct mod_pci_args args = { 0, 0, 0, 0 };
  144. return mod_pci(zdev, ZPCI_MOD_FC_DEREG_INT, 0, &args);
  145. }
  146. /* Modify PCI: Set PCI function measurement parameters */
  147. int zpci_fmb_enable_device(struct zpci_dev *zdev)
  148. {
  149. struct mod_pci_args args = { 0, 0, 0, 0 };
  150. if (zdev->fmb)
  151. return -EINVAL;
  152. zdev->fmb = kmem_cache_zalloc(zdev_fmb_cache, GFP_KERNEL);
  153. if (!zdev->fmb)
  154. return -ENOMEM;
  155. WARN_ON((u64) zdev->fmb & 0xf);
  156. args.fmb_addr = virt_to_phys(zdev->fmb);
  157. return mod_pci(zdev, ZPCI_MOD_FC_SET_MEASURE, 0, &args);
  158. }
  159. /* Modify PCI: Disable PCI function measurement */
  160. int zpci_fmb_disable_device(struct zpci_dev *zdev)
  161. {
  162. struct mod_pci_args args = { 0, 0, 0, 0 };
  163. int rc;
  164. if (!zdev->fmb)
  165. return -EINVAL;
  166. /* Function measurement is disabled if fmb address is zero */
  167. rc = mod_pci(zdev, ZPCI_MOD_FC_SET_MEASURE, 0, &args);
  168. kmem_cache_free(zdev_fmb_cache, zdev->fmb);
  169. zdev->fmb = NULL;
  170. return rc;
  171. }
  172. #define ZPCI_PCIAS_CFGSPC 15
  173. static int zpci_cfg_load(struct zpci_dev *zdev, int offset, u32 *val, u8 len)
  174. {
  175. u64 req = ZPCI_CREATE_REQ(zdev->fh, ZPCI_PCIAS_CFGSPC, len);
  176. u64 data;
  177. int rc;
  178. rc = zpci_load(&data, req, offset);
  179. if (!rc) {
  180. data = data << ((8 - len) * 8);
  181. data = le64_to_cpu(data);
  182. *val = (u32) data;
  183. } else
  184. *val = 0xffffffff;
  185. return rc;
  186. }
  187. static int zpci_cfg_store(struct zpci_dev *zdev, int offset, u32 val, u8 len)
  188. {
  189. u64 req = ZPCI_CREATE_REQ(zdev->fh, ZPCI_PCIAS_CFGSPC, len);
  190. u64 data = val;
  191. int rc;
  192. data = cpu_to_le64(data);
  193. data = data >> ((8 - len) * 8);
  194. rc = zpci_store(data, req, offset);
  195. return rc;
  196. }
  197. void pcibios_fixup_bus(struct pci_bus *bus)
  198. {
  199. }
  200. resource_size_t pcibios_align_resource(void *data, const struct resource *res,
  201. resource_size_t size,
  202. resource_size_t align)
  203. {
  204. return 0;
  205. }
  206. /* combine single writes by using store-block insn */
  207. void __iowrite64_copy(void __iomem *to, const void *from, size_t count)
  208. {
  209. zpci_memcpy_toio(to, from, count);
  210. }
  211. /* Create a virtual mapping cookie for a PCI BAR */
  212. void __iomem *pci_iomap(struct pci_dev *pdev, int bar, unsigned long max)
  213. {
  214. struct zpci_dev *zdev = get_zdev(pdev);
  215. u64 addr;
  216. int idx;
  217. if ((bar & 7) != bar)
  218. return NULL;
  219. idx = zdev->bars[bar].map_idx;
  220. spin_lock(&zpci_iomap_lock);
  221. zpci_iomap_start[idx].fh = zdev->fh;
  222. zpci_iomap_start[idx].bar = bar;
  223. spin_unlock(&zpci_iomap_lock);
  224. addr = ZPCI_IOMAP_ADDR_BASE | ((u64) idx << 48);
  225. return (void __iomem *) addr;
  226. }
  227. EXPORT_SYMBOL_GPL(pci_iomap);
  228. void pci_iounmap(struct pci_dev *pdev, void __iomem *addr)
  229. {
  230. unsigned int idx;
  231. idx = (((__force u64) addr) & ~ZPCI_IOMAP_ADDR_BASE) >> 48;
  232. spin_lock(&zpci_iomap_lock);
  233. zpci_iomap_start[idx].fh = 0;
  234. zpci_iomap_start[idx].bar = 0;
  235. spin_unlock(&zpci_iomap_lock);
  236. }
  237. EXPORT_SYMBOL_GPL(pci_iounmap);
  238. static int pci_read(struct pci_bus *bus, unsigned int devfn, int where,
  239. int size, u32 *val)
  240. {
  241. struct zpci_dev *zdev = get_zdev_by_bus(bus);
  242. int ret;
  243. if (!zdev || devfn != ZPCI_DEVFN)
  244. ret = -ENODEV;
  245. else
  246. ret = zpci_cfg_load(zdev, where, val, size);
  247. return ret;
  248. }
  249. static int pci_write(struct pci_bus *bus, unsigned int devfn, int where,
  250. int size, u32 val)
  251. {
  252. struct zpci_dev *zdev = get_zdev_by_bus(bus);
  253. int ret;
  254. if (!zdev || devfn != ZPCI_DEVFN)
  255. ret = -ENODEV;
  256. else
  257. ret = zpci_cfg_store(zdev, where, val, size);
  258. return ret;
  259. }
  260. static struct pci_ops pci_root_ops = {
  261. .read = pci_read,
  262. .write = pci_write,
  263. };
  264. static void zpci_irq_handler(struct airq_struct *airq)
  265. {
  266. unsigned long si, ai;
  267. struct airq_iv *aibv;
  268. int irqs_on = 0;
  269. inc_irq_stat(IRQIO_PCI);
  270. for (si = 0;;) {
  271. /* Scan adapter summary indicator bit vector */
  272. si = airq_iv_scan(zpci_aisb_iv, si, airq_iv_end(zpci_aisb_iv));
  273. if (si == -1UL) {
  274. if (irqs_on++)
  275. /* End of second scan with interrupts on. */
  276. break;
  277. /* First scan complete, reenable interrupts. */
  278. zpci_set_irq_ctrl(SIC_IRQ_MODE_SINGLE, NULL, PCI_ISC);
  279. si = 0;
  280. continue;
  281. }
  282. /* Scan the adapter interrupt vector for this device. */
  283. aibv = zpci_aibv[si];
  284. for (ai = 0;;) {
  285. ai = airq_iv_scan(aibv, ai, airq_iv_end(aibv));
  286. if (ai == -1UL)
  287. break;
  288. inc_irq_stat(IRQIO_MSI);
  289. airq_iv_lock(aibv, ai);
  290. generic_handle_irq(airq_iv_get_data(aibv, ai));
  291. airq_iv_unlock(aibv, ai);
  292. }
  293. }
  294. }
  295. int arch_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
  296. {
  297. struct zpci_dev *zdev = get_zdev(pdev);
  298. unsigned int hwirq, msi_vecs;
  299. unsigned long aisb;
  300. struct msi_desc *msi;
  301. struct msi_msg msg;
  302. int rc, irq;
  303. if (type == PCI_CAP_ID_MSI && nvec > 1)
  304. return 1;
  305. msi_vecs = min(nvec, ZPCI_MSI_VEC_MAX);
  306. msi_vecs = min_t(unsigned int, msi_vecs, CONFIG_PCI_NR_MSI);
  307. /* Allocate adapter summary indicator bit */
  308. rc = -EIO;
  309. aisb = airq_iv_alloc_bit(zpci_aisb_iv);
  310. if (aisb == -1UL)
  311. goto out;
  312. zdev->aisb = aisb;
  313. /* Create adapter interrupt vector */
  314. rc = -ENOMEM;
  315. zdev->aibv = airq_iv_create(msi_vecs, AIRQ_IV_DATA | AIRQ_IV_BITLOCK);
  316. if (!zdev->aibv)
  317. goto out_si;
  318. /* Wire up shortcut pointer */
  319. zpci_aibv[aisb] = zdev->aibv;
  320. /* Request MSI interrupts */
  321. hwirq = 0;
  322. list_for_each_entry(msi, &pdev->msi_list, list) {
  323. rc = -EIO;
  324. irq = irq_alloc_desc(0); /* Alloc irq on node 0 */
  325. if (irq < 0)
  326. goto out_msi;
  327. rc = irq_set_msi_desc(irq, msi);
  328. if (rc)
  329. goto out_msi;
  330. irq_set_chip_and_handler(irq, &zpci_irq_chip,
  331. handle_simple_irq);
  332. msg.data = hwirq;
  333. msg.address_lo = zdev->msi_addr & 0xffffffff;
  334. msg.address_hi = zdev->msi_addr >> 32;
  335. write_msi_msg(irq, &msg);
  336. airq_iv_set_data(zdev->aibv, hwirq, irq);
  337. hwirq++;
  338. }
  339. /* Enable adapter interrupts */
  340. rc = zpci_set_airq(zdev);
  341. if (rc)
  342. goto out_msi;
  343. return (msi_vecs == nvec) ? 0 : msi_vecs;
  344. out_msi:
  345. list_for_each_entry(msi, &pdev->msi_list, list) {
  346. if (hwirq-- == 0)
  347. break;
  348. irq_set_msi_desc(msi->irq, NULL);
  349. irq_free_desc(msi->irq);
  350. msi->msg.address_lo = 0;
  351. msi->msg.address_hi = 0;
  352. msi->msg.data = 0;
  353. msi->irq = 0;
  354. }
  355. zpci_aibv[aisb] = NULL;
  356. airq_iv_release(zdev->aibv);
  357. out_si:
  358. airq_iv_free_bit(zpci_aisb_iv, aisb);
  359. out:
  360. return rc;
  361. }
  362. void arch_teardown_msi_irqs(struct pci_dev *pdev)
  363. {
  364. struct zpci_dev *zdev = get_zdev(pdev);
  365. struct msi_desc *msi;
  366. int rc;
  367. /* Disable adapter interrupts */
  368. rc = zpci_clear_airq(zdev);
  369. if (rc)
  370. return;
  371. /* Release MSI interrupts */
  372. list_for_each_entry(msi, &pdev->msi_list, list) {
  373. if (msi->msi_attrib.is_msix)
  374. default_msix_mask_irq(msi, 1);
  375. else
  376. default_msi_mask_irq(msi, 1, 1);
  377. irq_set_msi_desc(msi->irq, NULL);
  378. irq_free_desc(msi->irq);
  379. msi->msg.address_lo = 0;
  380. msi->msg.address_hi = 0;
  381. msi->msg.data = 0;
  382. msi->irq = 0;
  383. }
  384. zpci_aibv[zdev->aisb] = NULL;
  385. airq_iv_release(zdev->aibv);
  386. airq_iv_free_bit(zpci_aisb_iv, zdev->aisb);
  387. }
  388. static void zpci_map_resources(struct zpci_dev *zdev)
  389. {
  390. struct pci_dev *pdev = zdev->pdev;
  391. resource_size_t len;
  392. int i;
  393. for (i = 0; i < PCI_BAR_COUNT; i++) {
  394. len = pci_resource_len(pdev, i);
  395. if (!len)
  396. continue;
  397. pdev->resource[i].start = (resource_size_t) pci_iomap(pdev, i, 0);
  398. pdev->resource[i].end = pdev->resource[i].start + len - 1;
  399. }
  400. }
  401. static void zpci_unmap_resources(struct zpci_dev *zdev)
  402. {
  403. struct pci_dev *pdev = zdev->pdev;
  404. resource_size_t len;
  405. int i;
  406. for (i = 0; i < PCI_BAR_COUNT; i++) {
  407. len = pci_resource_len(pdev, i);
  408. if (!len)
  409. continue;
  410. pci_iounmap(pdev, (void *) pdev->resource[i].start);
  411. }
  412. }
  413. static int __init zpci_irq_init(void)
  414. {
  415. int rc;
  416. rc = register_adapter_interrupt(&zpci_airq);
  417. if (rc)
  418. goto out;
  419. /* Set summary to 1 to be called every time for the ISC. */
  420. *zpci_airq.lsi_ptr = 1;
  421. rc = -ENOMEM;
  422. zpci_aisb_iv = airq_iv_create(ZPCI_NR_DEVICES, AIRQ_IV_ALLOC);
  423. if (!zpci_aisb_iv)
  424. goto out_airq;
  425. zpci_set_irq_ctrl(SIC_IRQ_MODE_SINGLE, NULL, PCI_ISC);
  426. return 0;
  427. out_airq:
  428. unregister_adapter_interrupt(&zpci_airq);
  429. out:
  430. return rc;
  431. }
  432. static void zpci_irq_exit(void)
  433. {
  434. airq_iv_release(zpci_aisb_iv);
  435. unregister_adapter_interrupt(&zpci_airq);
  436. }
  437. static int zpci_alloc_iomap(struct zpci_dev *zdev)
  438. {
  439. int entry;
  440. spin_lock(&zpci_iomap_lock);
  441. entry = find_first_zero_bit(zpci_iomap, ZPCI_IOMAP_MAX_ENTRIES);
  442. if (entry == ZPCI_IOMAP_MAX_ENTRIES) {
  443. spin_unlock(&zpci_iomap_lock);
  444. return -ENOSPC;
  445. }
  446. set_bit(entry, zpci_iomap);
  447. spin_unlock(&zpci_iomap_lock);
  448. return entry;
  449. }
  450. static void zpci_free_iomap(struct zpci_dev *zdev, int entry)
  451. {
  452. spin_lock(&zpci_iomap_lock);
  453. memset(&zpci_iomap_start[entry], 0, sizeof(struct zpci_iomap_entry));
  454. clear_bit(entry, zpci_iomap);
  455. spin_unlock(&zpci_iomap_lock);
  456. }
  457. static struct resource *__alloc_res(struct zpci_dev *zdev, unsigned long start,
  458. unsigned long size, unsigned long flags)
  459. {
  460. struct resource *r;
  461. r = kzalloc(sizeof(*r), GFP_KERNEL);
  462. if (!r)
  463. return NULL;
  464. r->start = start;
  465. r->end = r->start + size - 1;
  466. r->flags = flags;
  467. r->name = zdev->res_name;
  468. if (request_resource(&iomem_resource, r)) {
  469. kfree(r);
  470. return NULL;
  471. }
  472. return r;
  473. }
  474. static int zpci_setup_bus_resources(struct zpci_dev *zdev,
  475. struct list_head *resources)
  476. {
  477. unsigned long addr, size, flags;
  478. struct resource *res;
  479. int i, entry;
  480. snprintf(zdev->res_name, sizeof(zdev->res_name),
  481. "PCI Bus %04x:%02x", zdev->domain, ZPCI_BUS_NR);
  482. for (i = 0; i < PCI_BAR_COUNT; i++) {
  483. if (!zdev->bars[i].size)
  484. continue;
  485. entry = zpci_alloc_iomap(zdev);
  486. if (entry < 0)
  487. return entry;
  488. zdev->bars[i].map_idx = entry;
  489. /* only MMIO is supported */
  490. flags = IORESOURCE_MEM;
  491. if (zdev->bars[i].val & 8)
  492. flags |= IORESOURCE_PREFETCH;
  493. if (zdev->bars[i].val & 4)
  494. flags |= IORESOURCE_MEM_64;
  495. addr = ZPCI_IOMAP_ADDR_BASE + ((u64) entry << 48);
  496. size = 1UL << zdev->bars[i].size;
  497. res = __alloc_res(zdev, addr, size, flags);
  498. if (!res) {
  499. zpci_free_iomap(zdev, entry);
  500. return -ENOMEM;
  501. }
  502. zdev->bars[i].res = res;
  503. pci_add_resource(resources, res);
  504. }
  505. return 0;
  506. }
  507. static void zpci_cleanup_bus_resources(struct zpci_dev *zdev)
  508. {
  509. int i;
  510. for (i = 0; i < PCI_BAR_COUNT; i++) {
  511. if (!zdev->bars[i].size)
  512. continue;
  513. zpci_free_iomap(zdev, zdev->bars[i].map_idx);
  514. release_resource(zdev->bars[i].res);
  515. kfree(zdev->bars[i].res);
  516. }
  517. }
  518. int pcibios_add_device(struct pci_dev *pdev)
  519. {
  520. struct zpci_dev *zdev = get_zdev(pdev);
  521. struct resource *res;
  522. int i;
  523. zdev->pdev = pdev;
  524. pdev->dev.groups = zpci_attr_groups;
  525. zpci_map_resources(zdev);
  526. for (i = 0; i < PCI_BAR_COUNT; i++) {
  527. res = &pdev->resource[i];
  528. if (res->parent || !res->flags)
  529. continue;
  530. pci_claim_resource(pdev, i);
  531. }
  532. return 0;
  533. }
  534. int pcibios_enable_device(struct pci_dev *pdev, int mask)
  535. {
  536. struct zpci_dev *zdev = get_zdev(pdev);
  537. zdev->pdev = pdev;
  538. zpci_debug_init_device(zdev);
  539. zpci_fmb_enable_device(zdev);
  540. zpci_map_resources(zdev);
  541. return pci_enable_resources(pdev, mask);
  542. }
  543. void pcibios_disable_device(struct pci_dev *pdev)
  544. {
  545. struct zpci_dev *zdev = get_zdev(pdev);
  546. zpci_unmap_resources(zdev);
  547. zpci_fmb_disable_device(zdev);
  548. zpci_debug_exit_device(zdev);
  549. zdev->pdev = NULL;
  550. }
  551. #ifdef CONFIG_HIBERNATE_CALLBACKS
  552. static int zpci_restore(struct device *dev)
  553. {
  554. struct zpci_dev *zdev = get_zdev(to_pci_dev(dev));
  555. int ret = 0;
  556. if (zdev->state != ZPCI_FN_STATE_ONLINE)
  557. goto out;
  558. ret = clp_enable_fh(zdev, ZPCI_NR_DMA_SPACES);
  559. if (ret)
  560. goto out;
  561. zpci_map_resources(zdev);
  562. zpci_register_ioat(zdev, 0, zdev->start_dma + PAGE_OFFSET,
  563. zdev->start_dma + zdev->iommu_size - 1,
  564. (u64) zdev->dma_table);
  565. out:
  566. return ret;
  567. }
  568. static int zpci_freeze(struct device *dev)
  569. {
  570. struct zpci_dev *zdev = get_zdev(to_pci_dev(dev));
  571. if (zdev->state != ZPCI_FN_STATE_ONLINE)
  572. return 0;
  573. zpci_unregister_ioat(zdev, 0);
  574. return clp_disable_fh(zdev);
  575. }
  576. struct dev_pm_ops pcibios_pm_ops = {
  577. .thaw_noirq = zpci_restore,
  578. .freeze_noirq = zpci_freeze,
  579. .restore_noirq = zpci_restore,
  580. .poweroff_noirq = zpci_freeze,
  581. };
  582. #endif /* CONFIG_HIBERNATE_CALLBACKS */
  583. static int zpci_alloc_domain(struct zpci_dev *zdev)
  584. {
  585. spin_lock(&zpci_domain_lock);
  586. zdev->domain = find_first_zero_bit(zpci_domain, ZPCI_NR_DEVICES);
  587. if (zdev->domain == ZPCI_NR_DEVICES) {
  588. spin_unlock(&zpci_domain_lock);
  589. return -ENOSPC;
  590. }
  591. set_bit(zdev->domain, zpci_domain);
  592. spin_unlock(&zpci_domain_lock);
  593. return 0;
  594. }
  595. static void zpci_free_domain(struct zpci_dev *zdev)
  596. {
  597. spin_lock(&zpci_domain_lock);
  598. clear_bit(zdev->domain, zpci_domain);
  599. spin_unlock(&zpci_domain_lock);
  600. }
  601. void pcibios_remove_bus(struct pci_bus *bus)
  602. {
  603. struct zpci_dev *zdev = get_zdev_by_bus(bus);
  604. zpci_exit_slot(zdev);
  605. zpci_cleanup_bus_resources(zdev);
  606. zpci_free_domain(zdev);
  607. spin_lock(&zpci_list_lock);
  608. list_del(&zdev->entry);
  609. spin_unlock(&zpci_list_lock);
  610. kfree(zdev);
  611. }
  612. static int zpci_scan_bus(struct zpci_dev *zdev)
  613. {
  614. LIST_HEAD(resources);
  615. int ret;
  616. ret = zpci_setup_bus_resources(zdev, &resources);
  617. if (ret)
  618. return ret;
  619. zdev->bus = pci_scan_root_bus(NULL, ZPCI_BUS_NR, &pci_root_ops,
  620. zdev, &resources);
  621. if (!zdev->bus) {
  622. zpci_cleanup_bus_resources(zdev);
  623. return -EIO;
  624. }
  625. zdev->bus->max_bus_speed = zdev->max_bus_speed;
  626. return 0;
  627. }
  628. int zpci_enable_device(struct zpci_dev *zdev)
  629. {
  630. int rc;
  631. rc = clp_enable_fh(zdev, ZPCI_NR_DMA_SPACES);
  632. if (rc)
  633. goto out;
  634. rc = zpci_dma_init_device(zdev);
  635. if (rc)
  636. goto out_dma;
  637. zdev->state = ZPCI_FN_STATE_ONLINE;
  638. return 0;
  639. out_dma:
  640. clp_disable_fh(zdev);
  641. out:
  642. return rc;
  643. }
  644. EXPORT_SYMBOL_GPL(zpci_enable_device);
  645. int zpci_disable_device(struct zpci_dev *zdev)
  646. {
  647. zpci_dma_exit_device(zdev);
  648. return clp_disable_fh(zdev);
  649. }
  650. EXPORT_SYMBOL_GPL(zpci_disable_device);
  651. int zpci_create_device(struct zpci_dev *zdev)
  652. {
  653. int rc;
  654. rc = zpci_alloc_domain(zdev);
  655. if (rc)
  656. goto out;
  657. if (zdev->state == ZPCI_FN_STATE_CONFIGURED) {
  658. rc = zpci_enable_device(zdev);
  659. if (rc)
  660. goto out_free;
  661. }
  662. rc = zpci_scan_bus(zdev);
  663. if (rc)
  664. goto out_disable;
  665. spin_lock(&zpci_list_lock);
  666. list_add_tail(&zdev->entry, &zpci_list);
  667. spin_unlock(&zpci_list_lock);
  668. zpci_init_slot(zdev);
  669. return 0;
  670. out_disable:
  671. if (zdev->state == ZPCI_FN_STATE_ONLINE)
  672. zpci_disable_device(zdev);
  673. out_free:
  674. zpci_free_domain(zdev);
  675. out:
  676. return rc;
  677. }
  678. void zpci_stop_device(struct zpci_dev *zdev)
  679. {
  680. zpci_dma_exit_device(zdev);
  681. /*
  682. * Note: SCLP disables fh via set-pci-fn so don't
  683. * do that here.
  684. */
  685. }
  686. EXPORT_SYMBOL_GPL(zpci_stop_device);
  687. static inline int barsize(u8 size)
  688. {
  689. return (size) ? (1 << size) >> 10 : 0;
  690. }
  691. static int zpci_mem_init(void)
  692. {
  693. zdev_fmb_cache = kmem_cache_create("PCI_FMB_cache", sizeof(struct zpci_fmb),
  694. 16, 0, NULL);
  695. if (!zdev_fmb_cache)
  696. goto error_zdev;
  697. /* TODO: use realloc */
  698. zpci_iomap_start = kzalloc(ZPCI_IOMAP_MAX_ENTRIES * sizeof(*zpci_iomap_start),
  699. GFP_KERNEL);
  700. if (!zpci_iomap_start)
  701. goto error_iomap;
  702. return 0;
  703. error_iomap:
  704. kmem_cache_destroy(zdev_fmb_cache);
  705. error_zdev:
  706. return -ENOMEM;
  707. }
  708. static void zpci_mem_exit(void)
  709. {
  710. kfree(zpci_iomap_start);
  711. kmem_cache_destroy(zdev_fmb_cache);
  712. }
  713. static unsigned int s390_pci_probe = 1;
  714. static unsigned int s390_pci_initialized;
  715. char * __init pcibios_setup(char *str)
  716. {
  717. if (!strcmp(str, "off")) {
  718. s390_pci_probe = 0;
  719. return NULL;
  720. }
  721. return str;
  722. }
  723. bool zpci_is_enabled(void)
  724. {
  725. return s390_pci_initialized;
  726. }
  727. static int __init pci_base_init(void)
  728. {
  729. int rc;
  730. if (!s390_pci_probe)
  731. return 0;
  732. if (!test_facility(2) || !test_facility(69)
  733. || !test_facility(71) || !test_facility(72))
  734. return 0;
  735. rc = zpci_debug_init();
  736. if (rc)
  737. goto out;
  738. rc = zpci_mem_init();
  739. if (rc)
  740. goto out_mem;
  741. rc = zpci_irq_init();
  742. if (rc)
  743. goto out_irq;
  744. rc = zpci_dma_init();
  745. if (rc)
  746. goto out_dma;
  747. rc = clp_scan_pci_devices();
  748. if (rc)
  749. goto out_find;
  750. s390_pci_initialized = 1;
  751. return 0;
  752. out_find:
  753. zpci_dma_exit();
  754. out_dma:
  755. zpci_irq_exit();
  756. out_irq:
  757. zpci_mem_exit();
  758. out_mem:
  759. zpci_debug_exit();
  760. out:
  761. return rc;
  762. }
  763. subsys_initcall_sync(pci_base_init);
  764. void zpci_rescan(void)
  765. {
  766. if (zpci_is_enabled())
  767. clp_rescan_pci_devices_simple();
  768. }