head31.S 2.9 KB

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  1. /*
  2. * Copyright IBM Corp. 2005, 2010
  3. *
  4. * Author(s): Hartmut Penner <hp@de.ibm.com>
  5. * Martin Schwidefsky <schwidefsky@de.ibm.com>
  6. * Rob van der Heij <rvdhei@iae.nl>
  7. * Heiko Carstens <heiko.carstens@de.ibm.com>
  8. *
  9. */
  10. #include <linux/init.h>
  11. #include <linux/linkage.h>
  12. #include <asm/asm-offsets.h>
  13. #include <asm/thread_info.h>
  14. #include <asm/page.h>
  15. __HEAD
  16. ENTRY(startup_continue)
  17. basr %r13,0 # get base
  18. .LPG1:
  19. l %r1,.Lbase_cc-.LPG1(%r13)
  20. mvc 0(8,%r1),__LC_LAST_UPDATE_CLOCK
  21. lctl %c0,%c15,.Lctl-.LPG1(%r13) # load control registers
  22. l %r12,.Lparmaddr-.LPG1(%r13) # pointer to parameter area
  23. # move IPL device to lowcore
  24. #
  25. # Setup stack
  26. #
  27. l %r15,.Linittu-.LPG1(%r13)
  28. st %r15,__LC_THREAD_INFO # cache thread info in lowcore
  29. mvc __LC_CURRENT(4),__TI_task(%r15)
  30. ahi %r15,1<<(PAGE_SHIFT+THREAD_ORDER) # init_task_union+THREAD_SIZE
  31. st %r15,__LC_KERNEL_STACK # set end of kernel stack
  32. ahi %r15,-96
  33. #
  34. # Save ipl parameters, clear bss memory, initialize storage key for kernel pages,
  35. # and create a kernel NSS if the SAVESYS= parm is defined
  36. #
  37. l %r14,.Lstartup_init-.LPG1(%r13)
  38. basr %r14,%r14
  39. lpsw .Lentry-.LPG1(13) # jump to _stext in primary-space,
  40. # virtual and never return ...
  41. .align 8
  42. .Lentry:.long 0x00080000,0x80000000 + _stext
  43. .Lctl: .long 0x04b50000 # cr0: various things
  44. .long 0 # cr1: primary space segment table
  45. .long .Lduct # cr2: dispatchable unit control table
  46. .long 0 # cr3: instruction authorization
  47. .long 0 # cr4: instruction authorization
  48. .long .Lduct # cr5: primary-aste origin
  49. .long 0 # cr6: I/O interrupts
  50. .long 0 # cr7: secondary space segment table
  51. .long 0 # cr8: access registers translation
  52. .long 0 # cr9: tracing off
  53. .long 0 # cr10: tracing off
  54. .long 0 # cr11: tracing off
  55. .long 0 # cr12: tracing off
  56. .long 0 # cr13: home space segment table
  57. .long 0xc0000000 # cr14: machine check handling off
  58. .long 0 # cr15: linkage stack operations
  59. .Lbss_bgn: .long __bss_start
  60. .Lbss_end: .long _end
  61. .Lparmaddr: .long PARMAREA
  62. .Linittu: .long init_thread_union
  63. .Lstartup_init:
  64. .long startup_init
  65. .align 64
  66. .Lduct: .long 0,0,0,0,.Lduald,0,0,0
  67. .long 0,0,0,0,0,0,0,0
  68. .align 128
  69. .Lduald:.rept 8
  70. .long 0x80000000,0,0,0 # invalid access-list entries
  71. .endr
  72. .Lbase_cc:
  73. .long sched_clock_base_cc
  74. ENTRY(_ehead)
  75. .org 0x100000 - 0x11000 # head.o ends at 0x11000
  76. #
  77. # startup-code, running in absolute addressing mode
  78. #
  79. ENTRY(_stext)
  80. basr %r13,0 # get base
  81. .LPG3:
  82. # check control registers
  83. stctl %c0,%c15,0(%r15)
  84. oi 2(%r15),0x60 # enable sigp emergency & external call
  85. oi 0(%r15),0x10 # switch on low address protection
  86. lctl %c0,%c15,0(%r15)
  87. #
  88. lam 0,15,.Laregs-.LPG3(%r13) # load access regs needed by uaccess
  89. l %r14,.Lstart-.LPG3(%r13)
  90. basr %r14,%r14 # call start_kernel
  91. #
  92. # We returned from start_kernel ?!? PANIK
  93. #
  94. basr %r13,0
  95. lpsw .Ldw-.(%r13) # load disabled wait psw
  96. #
  97. .align 8
  98. .Ldw: .long 0x000a0000,0x00000000
  99. .Lstart:.long start_kernel
  100. .Laregs:.long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0