sigp.h 1.4 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253
  1. #ifndef __S390_ASM_SIGP_H
  2. #define __S390_ASM_SIGP_H
  3. /* SIGP order codes */
  4. #define SIGP_SENSE 1
  5. #define SIGP_EXTERNAL_CALL 2
  6. #define SIGP_EMERGENCY_SIGNAL 3
  7. #define SIGP_START 4
  8. #define SIGP_STOP 5
  9. #define SIGP_RESTART 6
  10. #define SIGP_STOP_AND_STORE_STATUS 9
  11. #define SIGP_INITIAL_CPU_RESET 11
  12. #define SIGP_SET_PREFIX 13
  13. #define SIGP_STORE_STATUS_AT_ADDRESS 14
  14. #define SIGP_SET_ARCHITECTURE 18
  15. #define SIGP_COND_EMERGENCY_SIGNAL 19
  16. #define SIGP_SENSE_RUNNING 21
  17. /* SIGP condition codes */
  18. #define SIGP_CC_ORDER_CODE_ACCEPTED 0
  19. #define SIGP_CC_STATUS_STORED 1
  20. #define SIGP_CC_BUSY 2
  21. #define SIGP_CC_NOT_OPERATIONAL 3
  22. /* SIGP cpu status bits */
  23. #define SIGP_STATUS_CHECK_STOP 0x00000010UL
  24. #define SIGP_STATUS_STOPPED 0x00000040UL
  25. #define SIGP_STATUS_EXT_CALL_PENDING 0x00000080UL
  26. #define SIGP_STATUS_INVALID_PARAMETER 0x00000100UL
  27. #define SIGP_STATUS_INCORRECT_STATE 0x00000200UL
  28. #define SIGP_STATUS_NOT_RUNNING 0x00000400UL
  29. #ifndef __ASSEMBLY__
  30. static inline int __pcpu_sigp(u16 addr, u8 order, u32 parm, u32 *status)
  31. {
  32. register unsigned int reg1 asm ("1") = parm;
  33. int cc;
  34. asm volatile(
  35. " sigp %1,%2,0(%3)\n"
  36. " ipm %0\n"
  37. " srl %0,28\n"
  38. : "=d" (cc), "+d" (reg1) : "d" (addr), "a" (order) : "cc");
  39. if (status && cc == 1)
  40. *status = reg1;
  41. return cc;
  42. }
  43. #endif /* __ASSEMBLY__ */
  44. #endif /* __S390_ASM_SIGP_H */