pgtable_64.c 22 KB

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  1. /*
  2. * This file contains ioremap and related functions for 64-bit machines.
  3. *
  4. * Derived from arch/ppc64/mm/init.c
  5. * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
  6. *
  7. * Modifications by Paul Mackerras (PowerMac) (paulus@samba.org)
  8. * and Cort Dougan (PReP) (cort@cs.nmt.edu)
  9. * Copyright (C) 1996 Paul Mackerras
  10. *
  11. * Derived from "arch/i386/mm/init.c"
  12. * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
  13. *
  14. * Dave Engebretsen <engebret@us.ibm.com>
  15. * Rework for PPC64 port.
  16. *
  17. * This program is free software; you can redistribute it and/or
  18. * modify it under the terms of the GNU General Public License
  19. * as published by the Free Software Foundation; either version
  20. * 2 of the License, or (at your option) any later version.
  21. *
  22. */
  23. #include <linux/signal.h>
  24. #include <linux/sched.h>
  25. #include <linux/kernel.h>
  26. #include <linux/errno.h>
  27. #include <linux/string.h>
  28. #include <linux/export.h>
  29. #include <linux/types.h>
  30. #include <linux/mman.h>
  31. #include <linux/mm.h>
  32. #include <linux/swap.h>
  33. #include <linux/stddef.h>
  34. #include <linux/vmalloc.h>
  35. #include <linux/bootmem.h>
  36. #include <linux/memblock.h>
  37. #include <linux/slab.h>
  38. #include <asm/pgalloc.h>
  39. #include <asm/page.h>
  40. #include <asm/prom.h>
  41. #include <asm/io.h>
  42. #include <asm/mmu_context.h>
  43. #include <asm/pgtable.h>
  44. #include <asm/mmu.h>
  45. #include <asm/smp.h>
  46. #include <asm/machdep.h>
  47. #include <asm/tlb.h>
  48. #include <asm/processor.h>
  49. #include <asm/cputable.h>
  50. #include <asm/sections.h>
  51. #include <asm/firmware.h>
  52. #include "mmu_decl.h"
  53. /* Some sanity checking */
  54. #if TASK_SIZE_USER64 > PGTABLE_RANGE
  55. #error TASK_SIZE_USER64 exceeds pagetable range
  56. #endif
  57. #ifdef CONFIG_PPC_STD_MMU_64
  58. #if TASK_SIZE_USER64 > (1UL << (ESID_BITS + SID_SHIFT))
  59. #error TASK_SIZE_USER64 exceeds user VSID range
  60. #endif
  61. #endif
  62. unsigned long ioremap_bot = IOREMAP_BASE;
  63. #ifdef CONFIG_PPC_MMU_NOHASH
  64. static void *early_alloc_pgtable(unsigned long size)
  65. {
  66. void *pt;
  67. if (init_bootmem_done)
  68. pt = __alloc_bootmem(size, size, __pa(MAX_DMA_ADDRESS));
  69. else
  70. pt = __va(memblock_alloc_base(size, size,
  71. __pa(MAX_DMA_ADDRESS)));
  72. memset(pt, 0, size);
  73. return pt;
  74. }
  75. #endif /* CONFIG_PPC_MMU_NOHASH */
  76. /*
  77. * map_kernel_page currently only called by __ioremap
  78. * map_kernel_page adds an entry to the ioremap page table
  79. * and adds an entry to the HPT, possibly bolting it
  80. */
  81. int map_kernel_page(unsigned long ea, unsigned long pa, int flags)
  82. {
  83. pgd_t *pgdp;
  84. pud_t *pudp;
  85. pmd_t *pmdp;
  86. pte_t *ptep;
  87. if (slab_is_available()) {
  88. pgdp = pgd_offset_k(ea);
  89. pudp = pud_alloc(&init_mm, pgdp, ea);
  90. if (!pudp)
  91. return -ENOMEM;
  92. pmdp = pmd_alloc(&init_mm, pudp, ea);
  93. if (!pmdp)
  94. return -ENOMEM;
  95. ptep = pte_alloc_kernel(pmdp, ea);
  96. if (!ptep)
  97. return -ENOMEM;
  98. set_pte_at(&init_mm, ea, ptep, pfn_pte(pa >> PAGE_SHIFT,
  99. __pgprot(flags)));
  100. } else {
  101. #ifdef CONFIG_PPC_MMU_NOHASH
  102. /* Warning ! This will blow up if bootmem is not initialized
  103. * which our ppc64 code is keen to do that, we'll need to
  104. * fix it and/or be more careful
  105. */
  106. pgdp = pgd_offset_k(ea);
  107. #ifdef PUD_TABLE_SIZE
  108. if (pgd_none(*pgdp)) {
  109. pudp = early_alloc_pgtable(PUD_TABLE_SIZE);
  110. BUG_ON(pudp == NULL);
  111. pgd_populate(&init_mm, pgdp, pudp);
  112. }
  113. #endif /* PUD_TABLE_SIZE */
  114. pudp = pud_offset(pgdp, ea);
  115. if (pud_none(*pudp)) {
  116. pmdp = early_alloc_pgtable(PMD_TABLE_SIZE);
  117. BUG_ON(pmdp == NULL);
  118. pud_populate(&init_mm, pudp, pmdp);
  119. }
  120. pmdp = pmd_offset(pudp, ea);
  121. if (!pmd_present(*pmdp)) {
  122. ptep = early_alloc_pgtable(PAGE_SIZE);
  123. BUG_ON(ptep == NULL);
  124. pmd_populate_kernel(&init_mm, pmdp, ptep);
  125. }
  126. ptep = pte_offset_kernel(pmdp, ea);
  127. set_pte_at(&init_mm, ea, ptep, pfn_pte(pa >> PAGE_SHIFT,
  128. __pgprot(flags)));
  129. #else /* CONFIG_PPC_MMU_NOHASH */
  130. /*
  131. * If the mm subsystem is not fully up, we cannot create a
  132. * linux page table entry for this mapping. Simply bolt an
  133. * entry in the hardware page table.
  134. *
  135. */
  136. if (htab_bolt_mapping(ea, ea + PAGE_SIZE, pa, flags,
  137. mmu_io_psize, mmu_kernel_ssize)) {
  138. printk(KERN_ERR "Failed to do bolted mapping IO "
  139. "memory at %016lx !\n", pa);
  140. return -ENOMEM;
  141. }
  142. #endif /* !CONFIG_PPC_MMU_NOHASH */
  143. }
  144. #ifdef CONFIG_PPC_BOOK3E_64
  145. /*
  146. * With hardware tablewalk, a sync is needed to ensure that
  147. * subsequent accesses see the PTE we just wrote. Unlike userspace
  148. * mappings, we can't tolerate spurious faults, so make sure
  149. * the new PTE will be seen the first time.
  150. */
  151. mb();
  152. #else
  153. smp_wmb();
  154. #endif
  155. return 0;
  156. }
  157. /**
  158. * __ioremap_at - Low level function to establish the page tables
  159. * for an IO mapping
  160. */
  161. void __iomem * __ioremap_at(phys_addr_t pa, void *ea, unsigned long size,
  162. unsigned long flags)
  163. {
  164. unsigned long i;
  165. /* Make sure we have the base flags */
  166. if ((flags & _PAGE_PRESENT) == 0)
  167. flags |= pgprot_val(PAGE_KERNEL);
  168. /* Non-cacheable page cannot be coherent */
  169. if (flags & _PAGE_NO_CACHE)
  170. flags &= ~_PAGE_COHERENT;
  171. /* We don't support the 4K PFN hack with ioremap */
  172. if (flags & _PAGE_4K_PFN)
  173. return NULL;
  174. WARN_ON(pa & ~PAGE_MASK);
  175. WARN_ON(((unsigned long)ea) & ~PAGE_MASK);
  176. WARN_ON(size & ~PAGE_MASK);
  177. for (i = 0; i < size; i += PAGE_SIZE)
  178. if (map_kernel_page((unsigned long)ea+i, pa+i, flags))
  179. return NULL;
  180. return (void __iomem *)ea;
  181. }
  182. /**
  183. * __iounmap_from - Low level function to tear down the page tables
  184. * for an IO mapping. This is used for mappings that
  185. * are manipulated manually, like partial unmapping of
  186. * PCI IOs or ISA space.
  187. */
  188. void __iounmap_at(void *ea, unsigned long size)
  189. {
  190. WARN_ON(((unsigned long)ea) & ~PAGE_MASK);
  191. WARN_ON(size & ~PAGE_MASK);
  192. unmap_kernel_range((unsigned long)ea, size);
  193. }
  194. void __iomem * __ioremap_caller(phys_addr_t addr, unsigned long size,
  195. unsigned long flags, void *caller)
  196. {
  197. phys_addr_t paligned;
  198. void __iomem *ret;
  199. /*
  200. * Choose an address to map it to.
  201. * Once the imalloc system is running, we use it.
  202. * Before that, we map using addresses going
  203. * up from ioremap_bot. imalloc will use
  204. * the addresses from ioremap_bot through
  205. * IMALLOC_END
  206. *
  207. */
  208. paligned = addr & PAGE_MASK;
  209. size = PAGE_ALIGN(addr + size) - paligned;
  210. if ((size == 0) || (paligned == 0))
  211. return NULL;
  212. if (mem_init_done) {
  213. struct vm_struct *area;
  214. area = __get_vm_area_caller(size, VM_IOREMAP,
  215. ioremap_bot, IOREMAP_END,
  216. caller);
  217. if (area == NULL)
  218. return NULL;
  219. area->phys_addr = paligned;
  220. ret = __ioremap_at(paligned, area->addr, size, flags);
  221. if (!ret)
  222. vunmap(area->addr);
  223. } else {
  224. ret = __ioremap_at(paligned, (void *)ioremap_bot, size, flags);
  225. if (ret)
  226. ioremap_bot += size;
  227. }
  228. if (ret)
  229. ret += addr & ~PAGE_MASK;
  230. return ret;
  231. }
  232. void __iomem * __ioremap(phys_addr_t addr, unsigned long size,
  233. unsigned long flags)
  234. {
  235. return __ioremap_caller(addr, size, flags, __builtin_return_address(0));
  236. }
  237. void __iomem * ioremap(phys_addr_t addr, unsigned long size)
  238. {
  239. unsigned long flags = _PAGE_NO_CACHE | _PAGE_GUARDED;
  240. void *caller = __builtin_return_address(0);
  241. if (ppc_md.ioremap)
  242. return ppc_md.ioremap(addr, size, flags, caller);
  243. return __ioremap_caller(addr, size, flags, caller);
  244. }
  245. void __iomem * ioremap_wc(phys_addr_t addr, unsigned long size)
  246. {
  247. unsigned long flags = _PAGE_NO_CACHE;
  248. void *caller = __builtin_return_address(0);
  249. if (ppc_md.ioremap)
  250. return ppc_md.ioremap(addr, size, flags, caller);
  251. return __ioremap_caller(addr, size, flags, caller);
  252. }
  253. void __iomem * ioremap_prot(phys_addr_t addr, unsigned long size,
  254. unsigned long flags)
  255. {
  256. void *caller = __builtin_return_address(0);
  257. /* writeable implies dirty for kernel addresses */
  258. if (flags & _PAGE_RW)
  259. flags |= _PAGE_DIRTY;
  260. /* we don't want to let _PAGE_USER and _PAGE_EXEC leak out */
  261. flags &= ~(_PAGE_USER | _PAGE_EXEC);
  262. #ifdef _PAGE_BAP_SR
  263. /* _PAGE_USER contains _PAGE_BAP_SR on BookE using the new PTE format
  264. * which means that we just cleared supervisor access... oops ;-) This
  265. * restores it
  266. */
  267. flags |= _PAGE_BAP_SR;
  268. #endif
  269. if (ppc_md.ioremap)
  270. return ppc_md.ioremap(addr, size, flags, caller);
  271. return __ioremap_caller(addr, size, flags, caller);
  272. }
  273. /*
  274. * Unmap an IO region and remove it from imalloc'd list.
  275. * Access to IO memory should be serialized by driver.
  276. */
  277. void __iounmap(volatile void __iomem *token)
  278. {
  279. void *addr;
  280. if (!mem_init_done)
  281. return;
  282. addr = (void *) ((unsigned long __force)
  283. PCI_FIX_ADDR(token) & PAGE_MASK);
  284. if ((unsigned long)addr < ioremap_bot) {
  285. printk(KERN_WARNING "Attempt to iounmap early bolted mapping"
  286. " at 0x%p\n", addr);
  287. return;
  288. }
  289. vunmap(addr);
  290. }
  291. void iounmap(volatile void __iomem *token)
  292. {
  293. if (ppc_md.iounmap)
  294. ppc_md.iounmap(token);
  295. else
  296. __iounmap(token);
  297. }
  298. EXPORT_SYMBOL(ioremap);
  299. EXPORT_SYMBOL(ioremap_wc);
  300. EXPORT_SYMBOL(ioremap_prot);
  301. EXPORT_SYMBOL(__ioremap);
  302. EXPORT_SYMBOL(__ioremap_at);
  303. EXPORT_SYMBOL(iounmap);
  304. EXPORT_SYMBOL(__iounmap);
  305. EXPORT_SYMBOL(__iounmap_at);
  306. /*
  307. * For hugepage we have pfn in the pmd, we use PTE_RPN_SHIFT bits for flags
  308. * For PTE page, we have a PTE_FRAG_SIZE (4K) aligned virtual address.
  309. */
  310. struct page *pmd_page(pmd_t pmd)
  311. {
  312. #ifdef CONFIG_TRANSPARENT_HUGEPAGE
  313. if (pmd_trans_huge(pmd))
  314. return pfn_to_page(pmd_pfn(pmd));
  315. #endif
  316. return virt_to_page(pmd_page_vaddr(pmd));
  317. }
  318. #ifdef CONFIG_PPC_64K_PAGES
  319. static pte_t *get_from_cache(struct mm_struct *mm)
  320. {
  321. void *pte_frag, *ret;
  322. spin_lock(&mm->page_table_lock);
  323. ret = mm->context.pte_frag;
  324. if (ret) {
  325. pte_frag = ret + PTE_FRAG_SIZE;
  326. /*
  327. * If we have taken up all the fragments mark PTE page NULL
  328. */
  329. if (((unsigned long)pte_frag & ~PAGE_MASK) == 0)
  330. pte_frag = NULL;
  331. mm->context.pte_frag = pte_frag;
  332. }
  333. spin_unlock(&mm->page_table_lock);
  334. return (pte_t *)ret;
  335. }
  336. static pte_t *__alloc_for_cache(struct mm_struct *mm, int kernel)
  337. {
  338. void *ret = NULL;
  339. struct page *page = alloc_page(GFP_KERNEL | __GFP_NOTRACK |
  340. __GFP_REPEAT | __GFP_ZERO);
  341. if (!page)
  342. return NULL;
  343. if (!kernel && !pgtable_page_ctor(page)) {
  344. __free_page(page);
  345. return NULL;
  346. }
  347. ret = page_address(page);
  348. spin_lock(&mm->page_table_lock);
  349. /*
  350. * If we find pgtable_page set, we return
  351. * the allocated page with single fragement
  352. * count.
  353. */
  354. if (likely(!mm->context.pte_frag)) {
  355. atomic_set(&page->_count, PTE_FRAG_NR);
  356. mm->context.pte_frag = ret + PTE_FRAG_SIZE;
  357. }
  358. spin_unlock(&mm->page_table_lock);
  359. return (pte_t *)ret;
  360. }
  361. pte_t *page_table_alloc(struct mm_struct *mm, unsigned long vmaddr, int kernel)
  362. {
  363. pte_t *pte;
  364. pte = get_from_cache(mm);
  365. if (pte)
  366. return pte;
  367. return __alloc_for_cache(mm, kernel);
  368. }
  369. void page_table_free(struct mm_struct *mm, unsigned long *table, int kernel)
  370. {
  371. struct page *page = virt_to_page(table);
  372. if (put_page_testzero(page)) {
  373. if (!kernel)
  374. pgtable_page_dtor(page);
  375. free_hot_cold_page(page, 0);
  376. }
  377. }
  378. #ifdef CONFIG_SMP
  379. static void page_table_free_rcu(void *table)
  380. {
  381. struct page *page = virt_to_page(table);
  382. if (put_page_testzero(page)) {
  383. pgtable_page_dtor(page);
  384. free_hot_cold_page(page, 0);
  385. }
  386. }
  387. void pgtable_free_tlb(struct mmu_gather *tlb, void *table, int shift)
  388. {
  389. unsigned long pgf = (unsigned long)table;
  390. BUG_ON(shift > MAX_PGTABLE_INDEX_SIZE);
  391. pgf |= shift;
  392. tlb_remove_table(tlb, (void *)pgf);
  393. }
  394. void __tlb_remove_table(void *_table)
  395. {
  396. void *table = (void *)((unsigned long)_table & ~MAX_PGTABLE_INDEX_SIZE);
  397. unsigned shift = (unsigned long)_table & MAX_PGTABLE_INDEX_SIZE;
  398. if (!shift)
  399. /* PTE page needs special handling */
  400. page_table_free_rcu(table);
  401. else {
  402. BUG_ON(shift > MAX_PGTABLE_INDEX_SIZE);
  403. kmem_cache_free(PGT_CACHE(shift), table);
  404. }
  405. }
  406. #else
  407. void pgtable_free_tlb(struct mmu_gather *tlb, void *table, int shift)
  408. {
  409. if (!shift) {
  410. /* PTE page needs special handling */
  411. struct page *page = virt_to_page(table);
  412. if (put_page_testzero(page)) {
  413. pgtable_page_dtor(page);
  414. free_hot_cold_page(page, 0);
  415. }
  416. } else {
  417. BUG_ON(shift > MAX_PGTABLE_INDEX_SIZE);
  418. kmem_cache_free(PGT_CACHE(shift), table);
  419. }
  420. }
  421. #endif
  422. #endif /* CONFIG_PPC_64K_PAGES */
  423. #ifdef CONFIG_TRANSPARENT_HUGEPAGE
  424. /*
  425. * This is called when relaxing access to a hugepage. It's also called in the page
  426. * fault path when we don't hit any of the major fault cases, ie, a minor
  427. * update of _PAGE_ACCESSED, _PAGE_DIRTY, etc... The generic code will have
  428. * handled those two for us, we additionally deal with missing execute
  429. * permission here on some processors
  430. */
  431. int pmdp_set_access_flags(struct vm_area_struct *vma, unsigned long address,
  432. pmd_t *pmdp, pmd_t entry, int dirty)
  433. {
  434. int changed;
  435. #ifdef CONFIG_DEBUG_VM
  436. WARN_ON(!pmd_trans_huge(*pmdp));
  437. assert_spin_locked(&vma->vm_mm->page_table_lock);
  438. #endif
  439. changed = !pmd_same(*(pmdp), entry);
  440. if (changed) {
  441. __ptep_set_access_flags(pmdp_ptep(pmdp), pmd_pte(entry));
  442. /*
  443. * Since we are not supporting SW TLB systems, we don't
  444. * have any thing similar to flush_tlb_page_nohash()
  445. */
  446. }
  447. return changed;
  448. }
  449. unsigned long pmd_hugepage_update(struct mm_struct *mm, unsigned long addr,
  450. pmd_t *pmdp, unsigned long clr,
  451. unsigned long set)
  452. {
  453. unsigned long old, tmp;
  454. #ifdef CONFIG_DEBUG_VM
  455. WARN_ON(!pmd_trans_huge(*pmdp));
  456. assert_spin_locked(&mm->page_table_lock);
  457. #endif
  458. #ifdef PTE_ATOMIC_UPDATES
  459. __asm__ __volatile__(
  460. "1: ldarx %0,0,%3\n\
  461. andi. %1,%0,%6\n\
  462. bne- 1b \n\
  463. andc %1,%0,%4 \n\
  464. or %1,%1,%7\n\
  465. stdcx. %1,0,%3 \n\
  466. bne- 1b"
  467. : "=&r" (old), "=&r" (tmp), "=m" (*pmdp)
  468. : "r" (pmdp), "r" (clr), "m" (*pmdp), "i" (_PAGE_BUSY), "r" (set)
  469. : "cc" );
  470. #else
  471. old = pmd_val(*pmdp);
  472. *pmdp = __pmd((old & ~clr) | set);
  473. #endif
  474. if (old & _PAGE_HASHPTE)
  475. hpte_do_hugepage_flush(mm, addr, pmdp);
  476. return old;
  477. }
  478. pmd_t pmdp_clear_flush(struct vm_area_struct *vma, unsigned long address,
  479. pmd_t *pmdp)
  480. {
  481. pmd_t pmd;
  482. VM_BUG_ON(address & ~HPAGE_PMD_MASK);
  483. if (pmd_trans_huge(*pmdp)) {
  484. pmd = pmdp_get_and_clear(vma->vm_mm, address, pmdp);
  485. } else {
  486. /*
  487. * khugepaged calls this for normal pmd
  488. */
  489. pmd = *pmdp;
  490. pmd_clear(pmdp);
  491. /*
  492. * Wait for all pending hash_page to finish. This is needed
  493. * in case of subpage collapse. When we collapse normal pages
  494. * to hugepage, we first clear the pmd, then invalidate all
  495. * the PTE entries. The assumption here is that any low level
  496. * page fault will see a none pmd and take the slow path that
  497. * will wait on mmap_sem. But we could very well be in a
  498. * hash_page with local ptep pointer value. Such a hash page
  499. * can result in adding new HPTE entries for normal subpages.
  500. * That means we could be modifying the page content as we
  501. * copy them to a huge page. So wait for parallel hash_page
  502. * to finish before invalidating HPTE entries. We can do this
  503. * by sending an IPI to all the cpus and executing a dummy
  504. * function there.
  505. */
  506. kick_all_cpus_sync();
  507. /*
  508. * Now invalidate the hpte entries in the range
  509. * covered by pmd. This make sure we take a
  510. * fault and will find the pmd as none, which will
  511. * result in a major fault which takes mmap_sem and
  512. * hence wait for collapse to complete. Without this
  513. * the __collapse_huge_page_copy can result in copying
  514. * the old content.
  515. */
  516. flush_tlb_pmd_range(vma->vm_mm, &pmd, address);
  517. }
  518. return pmd;
  519. }
  520. int pmdp_test_and_clear_young(struct vm_area_struct *vma,
  521. unsigned long address, pmd_t *pmdp)
  522. {
  523. return __pmdp_test_and_clear_young(vma->vm_mm, address, pmdp);
  524. }
  525. /*
  526. * We currently remove entries from the hashtable regardless of whether
  527. * the entry was young or dirty. The generic routines only flush if the
  528. * entry was young or dirty which is not good enough.
  529. *
  530. * We should be more intelligent about this but for the moment we override
  531. * these functions and force a tlb flush unconditionally
  532. */
  533. int pmdp_clear_flush_young(struct vm_area_struct *vma,
  534. unsigned long address, pmd_t *pmdp)
  535. {
  536. return __pmdp_test_and_clear_young(vma->vm_mm, address, pmdp);
  537. }
  538. /*
  539. * We mark the pmd splitting and invalidate all the hpte
  540. * entries for this hugepage.
  541. */
  542. void pmdp_splitting_flush(struct vm_area_struct *vma,
  543. unsigned long address, pmd_t *pmdp)
  544. {
  545. unsigned long old, tmp;
  546. VM_BUG_ON(address & ~HPAGE_PMD_MASK);
  547. #ifdef CONFIG_DEBUG_VM
  548. WARN_ON(!pmd_trans_huge(*pmdp));
  549. assert_spin_locked(&vma->vm_mm->page_table_lock);
  550. #endif
  551. #ifdef PTE_ATOMIC_UPDATES
  552. __asm__ __volatile__(
  553. "1: ldarx %0,0,%3\n\
  554. andi. %1,%0,%6\n\
  555. bne- 1b \n\
  556. ori %1,%0,%4 \n\
  557. stdcx. %1,0,%3 \n\
  558. bne- 1b"
  559. : "=&r" (old), "=&r" (tmp), "=m" (*pmdp)
  560. : "r" (pmdp), "i" (_PAGE_SPLITTING), "m" (*pmdp), "i" (_PAGE_BUSY)
  561. : "cc" );
  562. #else
  563. old = pmd_val(*pmdp);
  564. *pmdp = __pmd(old | _PAGE_SPLITTING);
  565. #endif
  566. /*
  567. * If we didn't had the splitting flag set, go and flush the
  568. * HPTE entries.
  569. */
  570. if (!(old & _PAGE_SPLITTING)) {
  571. /* We need to flush the hpte */
  572. if (old & _PAGE_HASHPTE)
  573. hpte_do_hugepage_flush(vma->vm_mm, address, pmdp);
  574. }
  575. /*
  576. * This ensures that generic code that rely on IRQ disabling
  577. * to prevent a parallel THP split work as expected.
  578. */
  579. kick_all_cpus_sync();
  580. }
  581. /*
  582. * We want to put the pgtable in pmd and use pgtable for tracking
  583. * the base page size hptes
  584. */
  585. void pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp,
  586. pgtable_t pgtable)
  587. {
  588. pgtable_t *pgtable_slot;
  589. assert_spin_locked(&mm->page_table_lock);
  590. /*
  591. * we store the pgtable in the second half of PMD
  592. */
  593. pgtable_slot = (pgtable_t *)pmdp + PTRS_PER_PMD;
  594. *pgtable_slot = pgtable;
  595. /*
  596. * expose the deposited pgtable to other cpus.
  597. * before we set the hugepage PTE at pmd level
  598. * hash fault code looks at the deposted pgtable
  599. * to store hash index values.
  600. */
  601. smp_wmb();
  602. }
  603. pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp)
  604. {
  605. pgtable_t pgtable;
  606. pgtable_t *pgtable_slot;
  607. assert_spin_locked(&mm->page_table_lock);
  608. pgtable_slot = (pgtable_t *)pmdp + PTRS_PER_PMD;
  609. pgtable = *pgtable_slot;
  610. /*
  611. * Once we withdraw, mark the entry NULL.
  612. */
  613. *pgtable_slot = NULL;
  614. /*
  615. * We store HPTE information in the deposited PTE fragment.
  616. * zero out the content on withdraw.
  617. */
  618. memset(pgtable, 0, PTE_FRAG_SIZE);
  619. return pgtable;
  620. }
  621. /*
  622. * set a new huge pmd. We should not be called for updating
  623. * an existing pmd entry. That should go via pmd_hugepage_update.
  624. */
  625. void set_pmd_at(struct mm_struct *mm, unsigned long addr,
  626. pmd_t *pmdp, pmd_t pmd)
  627. {
  628. #ifdef CONFIG_DEBUG_VM
  629. WARN_ON(pmd_val(*pmdp) & _PAGE_PRESENT);
  630. assert_spin_locked(&mm->page_table_lock);
  631. WARN_ON(!pmd_trans_huge(pmd));
  632. #endif
  633. return set_pte_at(mm, addr, pmdp_ptep(pmdp), pmd_pte(pmd));
  634. }
  635. void pmdp_invalidate(struct vm_area_struct *vma, unsigned long address,
  636. pmd_t *pmdp)
  637. {
  638. pmd_hugepage_update(vma->vm_mm, address, pmdp, _PAGE_PRESENT, 0);
  639. }
  640. /*
  641. * A linux hugepage PMD was changed and the corresponding hash table entries
  642. * neesd to be flushed.
  643. */
  644. void hpte_do_hugepage_flush(struct mm_struct *mm, unsigned long addr,
  645. pmd_t *pmdp)
  646. {
  647. int ssize, i;
  648. unsigned long s_addr;
  649. int max_hpte_count;
  650. unsigned int psize, valid;
  651. unsigned char *hpte_slot_array;
  652. unsigned long hidx, vpn, vsid, hash, shift, slot;
  653. /*
  654. * Flush all the hptes mapping this hugepage
  655. */
  656. s_addr = addr & HPAGE_PMD_MASK;
  657. hpte_slot_array = get_hpte_slot_array(pmdp);
  658. /*
  659. * IF we try to do a HUGE PTE update after a withdraw is done.
  660. * we will find the below NULL. This happens when we do
  661. * split_huge_page_pmd
  662. */
  663. if (!hpte_slot_array)
  664. return;
  665. /* get the base page size */
  666. psize = get_slice_psize(mm, s_addr);
  667. if (ppc_md.hugepage_invalidate)
  668. return ppc_md.hugepage_invalidate(mm, hpte_slot_array,
  669. s_addr, psize);
  670. /*
  671. * No bluk hpte removal support, invalidate each entry
  672. */
  673. shift = mmu_psize_defs[psize].shift;
  674. max_hpte_count = HPAGE_PMD_SIZE >> shift;
  675. for (i = 0; i < max_hpte_count; i++) {
  676. /*
  677. * 8 bits per each hpte entries
  678. * 000| [ secondary group (one bit) | hidx (3 bits) | valid bit]
  679. */
  680. valid = hpte_valid(hpte_slot_array, i);
  681. if (!valid)
  682. continue;
  683. hidx = hpte_hash_index(hpte_slot_array, i);
  684. /* get the vpn */
  685. addr = s_addr + (i * (1ul << shift));
  686. if (!is_kernel_addr(addr)) {
  687. ssize = user_segment_size(addr);
  688. vsid = get_vsid(mm->context.id, addr, ssize);
  689. WARN_ON(vsid == 0);
  690. } else {
  691. vsid = get_kernel_vsid(addr, mmu_kernel_ssize);
  692. ssize = mmu_kernel_ssize;
  693. }
  694. vpn = hpt_vpn(addr, vsid, ssize);
  695. hash = hpt_hash(vpn, shift, ssize);
  696. if (hidx & _PTEIDX_SECONDARY)
  697. hash = ~hash;
  698. slot = (hash & htab_hash_mask) * HPTES_PER_GROUP;
  699. slot += hidx & _PTEIDX_GROUP_IX;
  700. ppc_md.hpte_invalidate(slot, vpn, psize,
  701. MMU_PAGE_16M, ssize, 0);
  702. }
  703. }
  704. static pmd_t pmd_set_protbits(pmd_t pmd, pgprot_t pgprot)
  705. {
  706. pmd_val(pmd) |= pgprot_val(pgprot);
  707. return pmd;
  708. }
  709. pmd_t pfn_pmd(unsigned long pfn, pgprot_t pgprot)
  710. {
  711. pmd_t pmd;
  712. /*
  713. * For a valid pte, we would have _PAGE_PRESENT or _PAGE_FILE always
  714. * set. We use this to check THP page at pmd level.
  715. * leaf pte for huge page, bottom two bits != 00
  716. */
  717. pmd_val(pmd) = pfn << PTE_RPN_SHIFT;
  718. pmd_val(pmd) |= _PAGE_THP_HUGE;
  719. pmd = pmd_set_protbits(pmd, pgprot);
  720. return pmd;
  721. }
  722. pmd_t mk_pmd(struct page *page, pgprot_t pgprot)
  723. {
  724. return pfn_pmd(page_to_pfn(page), pgprot);
  725. }
  726. pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
  727. {
  728. pmd_val(pmd) &= _HPAGE_CHG_MASK;
  729. pmd = pmd_set_protbits(pmd, newprot);
  730. return pmd;
  731. }
  732. /*
  733. * This is called at the end of handling a user page fault, when the
  734. * fault has been handled by updating a HUGE PMD entry in the linux page tables.
  735. * We use it to preload an HPTE into the hash table corresponding to
  736. * the updated linux HUGE PMD entry.
  737. */
  738. void update_mmu_cache_pmd(struct vm_area_struct *vma, unsigned long addr,
  739. pmd_t *pmd)
  740. {
  741. return;
  742. }
  743. pmd_t pmdp_get_and_clear(struct mm_struct *mm,
  744. unsigned long addr, pmd_t *pmdp)
  745. {
  746. pmd_t old_pmd;
  747. pgtable_t pgtable;
  748. unsigned long old;
  749. pgtable_t *pgtable_slot;
  750. old = pmd_hugepage_update(mm, addr, pmdp, ~0UL, 0);
  751. old_pmd = __pmd(old);
  752. /*
  753. * We have pmd == none and we are holding page_table_lock.
  754. * So we can safely go and clear the pgtable hash
  755. * index info.
  756. */
  757. pgtable_slot = (pgtable_t *)pmdp + PTRS_PER_PMD;
  758. pgtable = *pgtable_slot;
  759. /*
  760. * Let's zero out old valid and hash index details
  761. * hash fault look at them.
  762. */
  763. memset(pgtable, 0, PTE_FRAG_SIZE);
  764. return old_pmd;
  765. }
  766. int has_transparent_hugepage(void)
  767. {
  768. if (!mmu_has_feature(MMU_FTR_16M_PAGE))
  769. return 0;
  770. /*
  771. * We support THP only if PMD_SIZE is 16MB.
  772. */
  773. if (mmu_psize_defs[MMU_PAGE_16M].shift != PMD_SHIFT)
  774. return 0;
  775. /*
  776. * We need to make sure that we support 16MB hugepage in a segement
  777. * with base page size 64K or 4K. We only enable THP with a PAGE_SIZE
  778. * of 64K.
  779. */
  780. /*
  781. * If we have 64K HPTE, we will be using that by default
  782. */
  783. if (mmu_psize_defs[MMU_PAGE_64K].shift &&
  784. (mmu_psize_defs[MMU_PAGE_64K].penc[MMU_PAGE_16M] == -1))
  785. return 0;
  786. /*
  787. * Ok we only have 4K HPTE
  788. */
  789. if (mmu_psize_defs[MMU_PAGE_4K].penc[MMU_PAGE_16M] == -1)
  790. return 0;
  791. return 1;
  792. }
  793. #endif /* CONFIG_TRANSPARENT_HUGEPAGE */