kvm_tlb.c 20 KB

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  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * KVM/MIPS TLB handling, this file is part of the Linux host kernel so that
  7. * TLB handlers run from KSEG0
  8. *
  9. * Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
  10. * Authors: Sanjay Lal <sanjayl@kymasys.com>
  11. */
  12. #include <linux/sched.h>
  13. #include <linux/smp.h>
  14. #include <linux/mm.h>
  15. #include <linux/delay.h>
  16. #include <linux/module.h>
  17. #include <linux/kvm_host.h>
  18. #include <linux/srcu.h>
  19. #include <asm/cpu.h>
  20. #include <asm/bootinfo.h>
  21. #include <asm/mmu_context.h>
  22. #include <asm/pgtable.h>
  23. #include <asm/cacheflush.h>
  24. #include <asm/tlb.h>
  25. #undef CONFIG_MIPS_MT
  26. #include <asm/r4kcache.h>
  27. #define CONFIG_MIPS_MT
  28. #define KVM_GUEST_PC_TLB 0
  29. #define KVM_GUEST_SP_TLB 1
  30. #define PRIx64 "llx"
  31. atomic_t kvm_mips_instance;
  32. EXPORT_SYMBOL(kvm_mips_instance);
  33. /* These function pointers are initialized once the KVM module is loaded */
  34. pfn_t(*kvm_mips_gfn_to_pfn) (struct kvm *kvm, gfn_t gfn);
  35. EXPORT_SYMBOL(kvm_mips_gfn_to_pfn);
  36. void (*kvm_mips_release_pfn_clean) (pfn_t pfn);
  37. EXPORT_SYMBOL(kvm_mips_release_pfn_clean);
  38. bool(*kvm_mips_is_error_pfn) (pfn_t pfn);
  39. EXPORT_SYMBOL(kvm_mips_is_error_pfn);
  40. uint32_t kvm_mips_get_kernel_asid(struct kvm_vcpu *vcpu)
  41. {
  42. return vcpu->arch.guest_kernel_asid[smp_processor_id()] & ASID_MASK;
  43. }
  44. uint32_t kvm_mips_get_user_asid(struct kvm_vcpu *vcpu)
  45. {
  46. return vcpu->arch.guest_user_asid[smp_processor_id()] & ASID_MASK;
  47. }
  48. inline uint32_t kvm_mips_get_commpage_asid (struct kvm_vcpu *vcpu)
  49. {
  50. return vcpu->kvm->arch.commpage_tlb;
  51. }
  52. /*
  53. * Structure defining an tlb entry data set.
  54. */
  55. void kvm_mips_dump_host_tlbs(void)
  56. {
  57. unsigned long old_entryhi;
  58. unsigned long old_pagemask;
  59. struct kvm_mips_tlb tlb;
  60. unsigned long flags;
  61. int i;
  62. local_irq_save(flags);
  63. old_entryhi = read_c0_entryhi();
  64. old_pagemask = read_c0_pagemask();
  65. printk("HOST TLBs:\n");
  66. printk("ASID: %#lx\n", read_c0_entryhi() & ASID_MASK);
  67. for (i = 0; i < current_cpu_data.tlbsize; i++) {
  68. write_c0_index(i);
  69. mtc0_tlbw_hazard();
  70. tlb_read();
  71. tlbw_use_hazard();
  72. tlb.tlb_hi = read_c0_entryhi();
  73. tlb.tlb_lo0 = read_c0_entrylo0();
  74. tlb.tlb_lo1 = read_c0_entrylo1();
  75. tlb.tlb_mask = read_c0_pagemask();
  76. printk("TLB%c%3d Hi 0x%08lx ",
  77. (tlb.tlb_lo0 | tlb.tlb_lo1) & MIPS3_PG_V ? ' ' : '*',
  78. i, tlb.tlb_hi);
  79. printk("Lo0=0x%09" PRIx64 " %c%c attr %lx ",
  80. (uint64_t) mips3_tlbpfn_to_paddr(tlb.tlb_lo0),
  81. (tlb.tlb_lo0 & MIPS3_PG_D) ? 'D' : ' ',
  82. (tlb.tlb_lo0 & MIPS3_PG_G) ? 'G' : ' ',
  83. (tlb.tlb_lo0 >> 3) & 7);
  84. printk("Lo1=0x%09" PRIx64 " %c%c attr %lx sz=%lx\n",
  85. (uint64_t) mips3_tlbpfn_to_paddr(tlb.tlb_lo1),
  86. (tlb.tlb_lo1 & MIPS3_PG_D) ? 'D' : ' ',
  87. (tlb.tlb_lo1 & MIPS3_PG_G) ? 'G' : ' ',
  88. (tlb.tlb_lo1 >> 3) & 7, tlb.tlb_mask);
  89. }
  90. write_c0_entryhi(old_entryhi);
  91. write_c0_pagemask(old_pagemask);
  92. mtc0_tlbw_hazard();
  93. local_irq_restore(flags);
  94. }
  95. void kvm_mips_dump_guest_tlbs(struct kvm_vcpu *vcpu)
  96. {
  97. struct mips_coproc *cop0 = vcpu->arch.cop0;
  98. struct kvm_mips_tlb tlb;
  99. int i;
  100. printk("Guest TLBs:\n");
  101. printk("Guest EntryHi: %#lx\n", kvm_read_c0_guest_entryhi(cop0));
  102. for (i = 0; i < KVM_MIPS_GUEST_TLB_SIZE; i++) {
  103. tlb = vcpu->arch.guest_tlb[i];
  104. printk("TLB%c%3d Hi 0x%08lx ",
  105. (tlb.tlb_lo0 | tlb.tlb_lo1) & MIPS3_PG_V ? ' ' : '*',
  106. i, tlb.tlb_hi);
  107. printk("Lo0=0x%09" PRIx64 " %c%c attr %lx ",
  108. (uint64_t) mips3_tlbpfn_to_paddr(tlb.tlb_lo0),
  109. (tlb.tlb_lo0 & MIPS3_PG_D) ? 'D' : ' ',
  110. (tlb.tlb_lo0 & MIPS3_PG_G) ? 'G' : ' ',
  111. (tlb.tlb_lo0 >> 3) & 7);
  112. printk("Lo1=0x%09" PRIx64 " %c%c attr %lx sz=%lx\n",
  113. (uint64_t) mips3_tlbpfn_to_paddr(tlb.tlb_lo1),
  114. (tlb.tlb_lo1 & MIPS3_PG_D) ? 'D' : ' ',
  115. (tlb.tlb_lo1 & MIPS3_PG_G) ? 'G' : ' ',
  116. (tlb.tlb_lo1 >> 3) & 7, tlb.tlb_mask);
  117. }
  118. }
  119. static int kvm_mips_map_page(struct kvm *kvm, gfn_t gfn)
  120. {
  121. int srcu_idx, err = 0;
  122. pfn_t pfn;
  123. if (kvm->arch.guest_pmap[gfn] != KVM_INVALID_PAGE)
  124. return 0;
  125. srcu_idx = srcu_read_lock(&kvm->srcu);
  126. pfn = kvm_mips_gfn_to_pfn(kvm, gfn);
  127. if (kvm_mips_is_error_pfn(pfn)) {
  128. kvm_err("Couldn't get pfn for gfn %#" PRIx64 "!\n", gfn);
  129. err = -EFAULT;
  130. goto out;
  131. }
  132. kvm->arch.guest_pmap[gfn] = pfn;
  133. out:
  134. srcu_read_unlock(&kvm->srcu, srcu_idx);
  135. return err;
  136. }
  137. /* Translate guest KSEG0 addresses to Host PA */
  138. unsigned long kvm_mips_translate_guest_kseg0_to_hpa(struct kvm_vcpu *vcpu,
  139. unsigned long gva)
  140. {
  141. gfn_t gfn;
  142. uint32_t offset = gva & ~PAGE_MASK;
  143. struct kvm *kvm = vcpu->kvm;
  144. if (KVM_GUEST_KSEGX(gva) != KVM_GUEST_KSEG0) {
  145. kvm_err("%s/%p: Invalid gva: %#lx\n", __func__,
  146. __builtin_return_address(0), gva);
  147. return KVM_INVALID_PAGE;
  148. }
  149. gfn = (KVM_GUEST_CPHYSADDR(gva) >> PAGE_SHIFT);
  150. if (gfn >= kvm->arch.guest_pmap_npages) {
  151. kvm_err("%s: Invalid gfn: %#llx, GVA: %#lx\n", __func__, gfn,
  152. gva);
  153. return KVM_INVALID_PAGE;
  154. }
  155. if (kvm_mips_map_page(vcpu->kvm, gfn) < 0)
  156. return KVM_INVALID_ADDR;
  157. return (kvm->arch.guest_pmap[gfn] << PAGE_SHIFT) + offset;
  158. }
  159. /* XXXKYMA: Must be called with interrupts disabled */
  160. /* set flush_dcache_mask == 0 if no dcache flush required */
  161. int
  162. kvm_mips_host_tlb_write(struct kvm_vcpu *vcpu, unsigned long entryhi,
  163. unsigned long entrylo0, unsigned long entrylo1, int flush_dcache_mask)
  164. {
  165. unsigned long flags;
  166. unsigned long old_entryhi;
  167. volatile int idx;
  168. local_irq_save(flags);
  169. old_entryhi = read_c0_entryhi();
  170. write_c0_entryhi(entryhi);
  171. mtc0_tlbw_hazard();
  172. tlb_probe();
  173. tlb_probe_hazard();
  174. idx = read_c0_index();
  175. if (idx > current_cpu_data.tlbsize) {
  176. kvm_err("%s: Invalid Index: %d\n", __func__, idx);
  177. kvm_mips_dump_host_tlbs();
  178. return -1;
  179. }
  180. write_c0_entrylo0(entrylo0);
  181. write_c0_entrylo1(entrylo1);
  182. mtc0_tlbw_hazard();
  183. if (idx < 0)
  184. tlb_write_random();
  185. else
  186. tlb_write_indexed();
  187. tlbw_use_hazard();
  188. kvm_debug("@ %#lx idx: %2d [entryhi(R): %#lx] entrylo0(R): 0x%08lx, entrylo1(R): 0x%08lx\n",
  189. vcpu->arch.pc, idx, read_c0_entryhi(),
  190. read_c0_entrylo0(), read_c0_entrylo1());
  191. /* Flush D-cache */
  192. if (flush_dcache_mask) {
  193. if (entrylo0 & MIPS3_PG_V) {
  194. ++vcpu->stat.flush_dcache_exits;
  195. flush_data_cache_page((entryhi & VPN2_MASK) & ~flush_dcache_mask);
  196. }
  197. if (entrylo1 & MIPS3_PG_V) {
  198. ++vcpu->stat.flush_dcache_exits;
  199. flush_data_cache_page(((entryhi & VPN2_MASK) & ~flush_dcache_mask) |
  200. (0x1 << PAGE_SHIFT));
  201. }
  202. }
  203. /* Restore old ASID */
  204. write_c0_entryhi(old_entryhi);
  205. mtc0_tlbw_hazard();
  206. tlbw_use_hazard();
  207. local_irq_restore(flags);
  208. return 0;
  209. }
  210. /* XXXKYMA: Must be called with interrupts disabled */
  211. int kvm_mips_handle_kseg0_tlb_fault(unsigned long badvaddr,
  212. struct kvm_vcpu *vcpu)
  213. {
  214. gfn_t gfn;
  215. pfn_t pfn0, pfn1;
  216. unsigned long vaddr = 0;
  217. unsigned long entryhi = 0, entrylo0 = 0, entrylo1 = 0;
  218. int even;
  219. struct kvm *kvm = vcpu->kvm;
  220. const int flush_dcache_mask = 0;
  221. if (KVM_GUEST_KSEGX(badvaddr) != KVM_GUEST_KSEG0) {
  222. kvm_err("%s: Invalid BadVaddr: %#lx\n", __func__, badvaddr);
  223. kvm_mips_dump_host_tlbs();
  224. return -1;
  225. }
  226. gfn = (KVM_GUEST_CPHYSADDR(badvaddr) >> PAGE_SHIFT);
  227. if (gfn >= kvm->arch.guest_pmap_npages) {
  228. kvm_err("%s: Invalid gfn: %#llx, BadVaddr: %#lx\n", __func__,
  229. gfn, badvaddr);
  230. kvm_mips_dump_host_tlbs();
  231. return -1;
  232. }
  233. even = !(gfn & 0x1);
  234. vaddr = badvaddr & (PAGE_MASK << 1);
  235. if (kvm_mips_map_page(vcpu->kvm, gfn) < 0)
  236. return -1;
  237. if (kvm_mips_map_page(vcpu->kvm, gfn ^ 0x1) < 0)
  238. return -1;
  239. if (even) {
  240. pfn0 = kvm->arch.guest_pmap[gfn];
  241. pfn1 = kvm->arch.guest_pmap[gfn ^ 0x1];
  242. } else {
  243. pfn0 = kvm->arch.guest_pmap[gfn ^ 0x1];
  244. pfn1 = kvm->arch.guest_pmap[gfn];
  245. }
  246. entryhi = (vaddr | kvm_mips_get_kernel_asid(vcpu));
  247. entrylo0 = mips3_paddr_to_tlbpfn(pfn0 << PAGE_SHIFT) | (0x3 << 3) | (1 << 2) |
  248. (0x1 << 1);
  249. entrylo1 = mips3_paddr_to_tlbpfn(pfn1 << PAGE_SHIFT) | (0x3 << 3) | (1 << 2) |
  250. (0x1 << 1);
  251. return kvm_mips_host_tlb_write(vcpu, entryhi, entrylo0, entrylo1,
  252. flush_dcache_mask);
  253. }
  254. int kvm_mips_handle_commpage_tlb_fault(unsigned long badvaddr,
  255. struct kvm_vcpu *vcpu)
  256. {
  257. pfn_t pfn0, pfn1;
  258. unsigned long flags, old_entryhi = 0, vaddr = 0;
  259. unsigned long entrylo0 = 0, entrylo1 = 0;
  260. pfn0 = CPHYSADDR(vcpu->arch.kseg0_commpage) >> PAGE_SHIFT;
  261. pfn1 = 0;
  262. entrylo0 = mips3_paddr_to_tlbpfn(pfn0 << PAGE_SHIFT) | (0x3 << 3) | (1 << 2) |
  263. (0x1 << 1);
  264. entrylo1 = 0;
  265. local_irq_save(flags);
  266. old_entryhi = read_c0_entryhi();
  267. vaddr = badvaddr & (PAGE_MASK << 1);
  268. write_c0_entryhi(vaddr | kvm_mips_get_kernel_asid(vcpu));
  269. mtc0_tlbw_hazard();
  270. write_c0_entrylo0(entrylo0);
  271. mtc0_tlbw_hazard();
  272. write_c0_entrylo1(entrylo1);
  273. mtc0_tlbw_hazard();
  274. write_c0_index(kvm_mips_get_commpage_asid(vcpu));
  275. mtc0_tlbw_hazard();
  276. tlb_write_indexed();
  277. mtc0_tlbw_hazard();
  278. tlbw_use_hazard();
  279. kvm_debug ("@ %#lx idx: %2d [entryhi(R): %#lx] entrylo0 (R): 0x%08lx, entrylo1(R): 0x%08lx\n",
  280. vcpu->arch.pc, read_c0_index(), read_c0_entryhi(),
  281. read_c0_entrylo0(), read_c0_entrylo1());
  282. /* Restore old ASID */
  283. write_c0_entryhi(old_entryhi);
  284. mtc0_tlbw_hazard();
  285. tlbw_use_hazard();
  286. local_irq_restore(flags);
  287. return 0;
  288. }
  289. int
  290. kvm_mips_handle_mapped_seg_tlb_fault(struct kvm_vcpu *vcpu,
  291. struct kvm_mips_tlb *tlb, unsigned long *hpa0, unsigned long *hpa1)
  292. {
  293. unsigned long entryhi = 0, entrylo0 = 0, entrylo1 = 0;
  294. struct kvm *kvm = vcpu->kvm;
  295. pfn_t pfn0, pfn1;
  296. if ((tlb->tlb_hi & VPN2_MASK) == 0) {
  297. pfn0 = 0;
  298. pfn1 = 0;
  299. } else {
  300. if (kvm_mips_map_page(kvm, mips3_tlbpfn_to_paddr(tlb->tlb_lo0) >> PAGE_SHIFT) < 0)
  301. return -1;
  302. if (kvm_mips_map_page(kvm, mips3_tlbpfn_to_paddr(tlb->tlb_lo1) >> PAGE_SHIFT) < 0)
  303. return -1;
  304. pfn0 = kvm->arch.guest_pmap[mips3_tlbpfn_to_paddr(tlb->tlb_lo0) >> PAGE_SHIFT];
  305. pfn1 = kvm->arch.guest_pmap[mips3_tlbpfn_to_paddr(tlb->tlb_lo1) >> PAGE_SHIFT];
  306. }
  307. if (hpa0)
  308. *hpa0 = pfn0 << PAGE_SHIFT;
  309. if (hpa1)
  310. *hpa1 = pfn1 << PAGE_SHIFT;
  311. /* Get attributes from the Guest TLB */
  312. entryhi = (tlb->tlb_hi & VPN2_MASK) | (KVM_GUEST_KERNEL_MODE(vcpu) ?
  313. kvm_mips_get_kernel_asid(vcpu) : kvm_mips_get_user_asid(vcpu));
  314. entrylo0 = mips3_paddr_to_tlbpfn(pfn0 << PAGE_SHIFT) | (0x3 << 3) |
  315. (tlb->tlb_lo0 & MIPS3_PG_D) | (tlb->tlb_lo0 & MIPS3_PG_V);
  316. entrylo1 = mips3_paddr_to_tlbpfn(pfn1 << PAGE_SHIFT) | (0x3 << 3) |
  317. (tlb->tlb_lo1 & MIPS3_PG_D) | (tlb->tlb_lo1 & MIPS3_PG_V);
  318. kvm_debug("@ %#lx tlb_lo0: 0x%08lx tlb_lo1: 0x%08lx\n", vcpu->arch.pc,
  319. tlb->tlb_lo0, tlb->tlb_lo1);
  320. return kvm_mips_host_tlb_write(vcpu, entryhi, entrylo0, entrylo1,
  321. tlb->tlb_mask);
  322. }
  323. int kvm_mips_guest_tlb_lookup(struct kvm_vcpu *vcpu, unsigned long entryhi)
  324. {
  325. int i;
  326. int index = -1;
  327. struct kvm_mips_tlb *tlb = vcpu->arch.guest_tlb;
  328. for (i = 0; i < KVM_MIPS_GUEST_TLB_SIZE; i++) {
  329. if (((TLB_VPN2(tlb[i]) & ~tlb[i].tlb_mask) == ((entryhi & VPN2_MASK) & ~tlb[i].tlb_mask)) &&
  330. (TLB_IS_GLOBAL(tlb[i]) || (TLB_ASID(tlb[i]) == (entryhi & ASID_MASK)))) {
  331. index = i;
  332. break;
  333. }
  334. }
  335. kvm_debug("%s: entryhi: %#lx, index: %d lo0: %#lx, lo1: %#lx\n",
  336. __func__, entryhi, index, tlb[i].tlb_lo0, tlb[i].tlb_lo1);
  337. return index;
  338. }
  339. int kvm_mips_host_tlb_lookup(struct kvm_vcpu *vcpu, unsigned long vaddr)
  340. {
  341. unsigned long old_entryhi, flags;
  342. volatile int idx;
  343. local_irq_save(flags);
  344. old_entryhi = read_c0_entryhi();
  345. if (KVM_GUEST_KERNEL_MODE(vcpu))
  346. write_c0_entryhi((vaddr & VPN2_MASK) | kvm_mips_get_kernel_asid(vcpu));
  347. else {
  348. write_c0_entryhi((vaddr & VPN2_MASK) | kvm_mips_get_user_asid(vcpu));
  349. }
  350. mtc0_tlbw_hazard();
  351. tlb_probe();
  352. tlb_probe_hazard();
  353. idx = read_c0_index();
  354. /* Restore old ASID */
  355. write_c0_entryhi(old_entryhi);
  356. mtc0_tlbw_hazard();
  357. tlbw_use_hazard();
  358. local_irq_restore(flags);
  359. kvm_debug("Host TLB lookup, %#lx, idx: %2d\n", vaddr, idx);
  360. return idx;
  361. }
  362. int kvm_mips_host_tlb_inv(struct kvm_vcpu *vcpu, unsigned long va)
  363. {
  364. int idx;
  365. unsigned long flags, old_entryhi;
  366. local_irq_save(flags);
  367. old_entryhi = read_c0_entryhi();
  368. write_c0_entryhi((va & VPN2_MASK) | kvm_mips_get_user_asid(vcpu));
  369. mtc0_tlbw_hazard();
  370. tlb_probe();
  371. tlb_probe_hazard();
  372. idx = read_c0_index();
  373. if (idx >= current_cpu_data.tlbsize)
  374. BUG();
  375. if (idx > 0) {
  376. write_c0_entryhi(UNIQUE_ENTRYHI(idx));
  377. mtc0_tlbw_hazard();
  378. write_c0_entrylo0(0);
  379. mtc0_tlbw_hazard();
  380. write_c0_entrylo1(0);
  381. mtc0_tlbw_hazard();
  382. tlb_write_indexed();
  383. mtc0_tlbw_hazard();
  384. }
  385. write_c0_entryhi(old_entryhi);
  386. mtc0_tlbw_hazard();
  387. tlbw_use_hazard();
  388. local_irq_restore(flags);
  389. if (idx > 0)
  390. kvm_debug("%s: Invalidated entryhi %#lx @ idx %d\n", __func__,
  391. (va & VPN2_MASK) | kvm_mips_get_user_asid(vcpu), idx);
  392. return 0;
  393. }
  394. /* XXXKYMA: Fix Guest USER/KERNEL no longer share the same ASID*/
  395. int kvm_mips_host_tlb_inv_index(struct kvm_vcpu *vcpu, int index)
  396. {
  397. unsigned long flags, old_entryhi;
  398. if (index >= current_cpu_data.tlbsize)
  399. BUG();
  400. local_irq_save(flags);
  401. old_entryhi = read_c0_entryhi();
  402. write_c0_entryhi(UNIQUE_ENTRYHI(index));
  403. mtc0_tlbw_hazard();
  404. write_c0_index(index);
  405. mtc0_tlbw_hazard();
  406. write_c0_entrylo0(0);
  407. mtc0_tlbw_hazard();
  408. write_c0_entrylo1(0);
  409. mtc0_tlbw_hazard();
  410. tlb_write_indexed();
  411. mtc0_tlbw_hazard();
  412. tlbw_use_hazard();
  413. write_c0_entryhi(old_entryhi);
  414. mtc0_tlbw_hazard();
  415. tlbw_use_hazard();
  416. local_irq_restore(flags);
  417. return 0;
  418. }
  419. void kvm_mips_flush_host_tlb(int skip_kseg0)
  420. {
  421. unsigned long flags;
  422. unsigned long old_entryhi, entryhi;
  423. unsigned long old_pagemask;
  424. int entry = 0;
  425. int maxentry = current_cpu_data.tlbsize;
  426. local_irq_save(flags);
  427. old_entryhi = read_c0_entryhi();
  428. old_pagemask = read_c0_pagemask();
  429. /* Blast 'em all away. */
  430. for (entry = 0; entry < maxentry; entry++) {
  431. write_c0_index(entry);
  432. mtc0_tlbw_hazard();
  433. if (skip_kseg0) {
  434. tlb_read();
  435. tlbw_use_hazard();
  436. entryhi = read_c0_entryhi();
  437. /* Don't blow away guest kernel entries */
  438. if (KVM_GUEST_KSEGX(entryhi) == KVM_GUEST_KSEG0) {
  439. continue;
  440. }
  441. }
  442. /* Make sure all entries differ. */
  443. write_c0_entryhi(UNIQUE_ENTRYHI(entry));
  444. mtc0_tlbw_hazard();
  445. write_c0_entrylo0(0);
  446. mtc0_tlbw_hazard();
  447. write_c0_entrylo1(0);
  448. mtc0_tlbw_hazard();
  449. tlb_write_indexed();
  450. mtc0_tlbw_hazard();
  451. }
  452. tlbw_use_hazard();
  453. write_c0_entryhi(old_entryhi);
  454. write_c0_pagemask(old_pagemask);
  455. mtc0_tlbw_hazard();
  456. tlbw_use_hazard();
  457. local_irq_restore(flags);
  458. }
  459. void
  460. kvm_get_new_mmu_context(struct mm_struct *mm, unsigned long cpu,
  461. struct kvm_vcpu *vcpu)
  462. {
  463. unsigned long asid = asid_cache(cpu);
  464. if (!((asid += ASID_INC) & ASID_MASK)) {
  465. if (cpu_has_vtag_icache) {
  466. flush_icache_all();
  467. }
  468. kvm_local_flush_tlb_all(); /* start new asid cycle */
  469. if (!asid) /* fix version if needed */
  470. asid = ASID_FIRST_VERSION;
  471. }
  472. cpu_context(cpu, mm) = asid_cache(cpu) = asid;
  473. }
  474. void kvm_local_flush_tlb_all(void)
  475. {
  476. unsigned long flags;
  477. unsigned long old_ctx;
  478. int entry = 0;
  479. local_irq_save(flags);
  480. /* Save old context and create impossible VPN2 value */
  481. old_ctx = read_c0_entryhi();
  482. write_c0_entrylo0(0);
  483. write_c0_entrylo1(0);
  484. /* Blast 'em all away. */
  485. while (entry < current_cpu_data.tlbsize) {
  486. /* Make sure all entries differ. */
  487. write_c0_entryhi(UNIQUE_ENTRYHI(entry));
  488. write_c0_index(entry);
  489. mtc0_tlbw_hazard();
  490. tlb_write_indexed();
  491. entry++;
  492. }
  493. tlbw_use_hazard();
  494. write_c0_entryhi(old_ctx);
  495. mtc0_tlbw_hazard();
  496. local_irq_restore(flags);
  497. }
  498. /**
  499. * kvm_mips_migrate_count() - Migrate timer.
  500. * @vcpu: Virtual CPU.
  501. *
  502. * Migrate CP0_Count hrtimer to the current CPU by cancelling and restarting it
  503. * if it was running prior to being cancelled.
  504. *
  505. * Must be called when the VCPU is migrated to a different CPU to ensure that
  506. * timer expiry during guest execution interrupts the guest and causes the
  507. * interrupt to be delivered in a timely manner.
  508. */
  509. static void kvm_mips_migrate_count(struct kvm_vcpu *vcpu)
  510. {
  511. if (hrtimer_cancel(&vcpu->arch.comparecount_timer))
  512. hrtimer_restart(&vcpu->arch.comparecount_timer);
  513. }
  514. /* Restore ASID once we are scheduled back after preemption */
  515. void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
  516. {
  517. unsigned long flags;
  518. int newasid = 0;
  519. kvm_debug("%s: vcpu %p, cpu: %d\n", __func__, vcpu, cpu);
  520. /* Alocate new kernel and user ASIDs if needed */
  521. local_irq_save(flags);
  522. if (((vcpu->arch.
  523. guest_kernel_asid[cpu] ^ asid_cache(cpu)) & ASID_VERSION_MASK)) {
  524. kvm_get_new_mmu_context(&vcpu->arch.guest_kernel_mm, cpu, vcpu);
  525. vcpu->arch.guest_kernel_asid[cpu] =
  526. vcpu->arch.guest_kernel_mm.context.asid[cpu];
  527. kvm_get_new_mmu_context(&vcpu->arch.guest_user_mm, cpu, vcpu);
  528. vcpu->arch.guest_user_asid[cpu] =
  529. vcpu->arch.guest_user_mm.context.asid[cpu];
  530. newasid++;
  531. kvm_debug("[%d]: cpu_context: %#lx\n", cpu,
  532. cpu_context(cpu, current->mm));
  533. kvm_debug("[%d]: Allocated new ASID for Guest Kernel: %#x\n",
  534. cpu, vcpu->arch.guest_kernel_asid[cpu]);
  535. kvm_debug("[%d]: Allocated new ASID for Guest User: %#x\n", cpu,
  536. vcpu->arch.guest_user_asid[cpu]);
  537. }
  538. if (vcpu->arch.last_sched_cpu != cpu) {
  539. kvm_debug("[%d->%d]KVM VCPU[%d] switch\n",
  540. vcpu->arch.last_sched_cpu, cpu, vcpu->vcpu_id);
  541. /*
  542. * Migrate the timer interrupt to the current CPU so that it
  543. * always interrupts the guest and synchronously triggers a
  544. * guest timer interrupt.
  545. */
  546. kvm_mips_migrate_count(vcpu);
  547. }
  548. if (!newasid) {
  549. /* If we preempted while the guest was executing, then reload the pre-empted ASID */
  550. if (current->flags & PF_VCPU) {
  551. write_c0_entryhi(vcpu->arch.
  552. preempt_entryhi & ASID_MASK);
  553. ehb();
  554. }
  555. } else {
  556. /* New ASIDs were allocated for the VM */
  557. /* Were we in guest context? If so then the pre-empted ASID is no longer
  558. * valid, we need to set it to what it should be based on the mode of
  559. * the Guest (Kernel/User)
  560. */
  561. if (current->flags & PF_VCPU) {
  562. if (KVM_GUEST_KERNEL_MODE(vcpu))
  563. write_c0_entryhi(vcpu->arch.
  564. guest_kernel_asid[cpu] &
  565. ASID_MASK);
  566. else
  567. write_c0_entryhi(vcpu->arch.
  568. guest_user_asid[cpu] &
  569. ASID_MASK);
  570. ehb();
  571. }
  572. }
  573. local_irq_restore(flags);
  574. }
  575. /* ASID can change if another task is scheduled during preemption */
  576. void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
  577. {
  578. unsigned long flags;
  579. uint32_t cpu;
  580. local_irq_save(flags);
  581. cpu = smp_processor_id();
  582. vcpu->arch.preempt_entryhi = read_c0_entryhi();
  583. vcpu->arch.last_sched_cpu = cpu;
  584. if (((cpu_context(cpu, current->mm) ^ asid_cache(cpu)) &
  585. ASID_VERSION_MASK)) {
  586. kvm_debug("%s: Dropping MMU Context: %#lx\n", __func__,
  587. cpu_context(cpu, current->mm));
  588. drop_mmu_context(current->mm, cpu);
  589. }
  590. write_c0_entryhi(cpu_asid(cpu, current->mm));
  591. ehb();
  592. local_irq_restore(flags);
  593. }
  594. uint32_t kvm_get_inst(uint32_t *opc, struct kvm_vcpu *vcpu)
  595. {
  596. struct mips_coproc *cop0 = vcpu->arch.cop0;
  597. unsigned long paddr, flags;
  598. uint32_t inst;
  599. int index;
  600. if (KVM_GUEST_KSEGX((unsigned long) opc) < KVM_GUEST_KSEG0 ||
  601. KVM_GUEST_KSEGX((unsigned long) opc) == KVM_GUEST_KSEG23) {
  602. local_irq_save(flags);
  603. index = kvm_mips_host_tlb_lookup(vcpu, (unsigned long) opc);
  604. if (index >= 0) {
  605. inst = *(opc);
  606. } else {
  607. index =
  608. kvm_mips_guest_tlb_lookup(vcpu,
  609. ((unsigned long) opc & VPN2_MASK)
  610. |
  611. (kvm_read_c0_guest_entryhi
  612. (cop0) & ASID_MASK));
  613. if (index < 0) {
  614. kvm_err
  615. ("%s: get_user_failed for %p, vcpu: %p, ASID: %#lx\n",
  616. __func__, opc, vcpu, read_c0_entryhi());
  617. kvm_mips_dump_host_tlbs();
  618. local_irq_restore(flags);
  619. return KVM_INVALID_INST;
  620. }
  621. kvm_mips_handle_mapped_seg_tlb_fault(vcpu,
  622. &vcpu->arch.
  623. guest_tlb[index],
  624. NULL, NULL);
  625. inst = *(opc);
  626. }
  627. local_irq_restore(flags);
  628. } else if (KVM_GUEST_KSEGX(opc) == KVM_GUEST_KSEG0) {
  629. paddr =
  630. kvm_mips_translate_guest_kseg0_to_hpa(vcpu,
  631. (unsigned long) opc);
  632. inst = *(uint32_t *) CKSEG0ADDR(paddr);
  633. } else {
  634. kvm_err("%s: illegal address: %p\n", __func__, opc);
  635. return KVM_INVALID_INST;
  636. }
  637. return inst;
  638. }
  639. EXPORT_SYMBOL(kvm_local_flush_tlb_all);
  640. EXPORT_SYMBOL(kvm_mips_handle_mapped_seg_tlb_fault);
  641. EXPORT_SYMBOL(kvm_mips_handle_commpage_tlb_fault);
  642. EXPORT_SYMBOL(kvm_mips_dump_host_tlbs);
  643. EXPORT_SYMBOL(kvm_mips_handle_kseg0_tlb_fault);
  644. EXPORT_SYMBOL(kvm_mips_host_tlb_lookup);
  645. EXPORT_SYMBOL(kvm_mips_flush_host_tlb);
  646. EXPORT_SYMBOL(kvm_mips_guest_tlb_lookup);
  647. EXPORT_SYMBOL(kvm_mips_host_tlb_inv);
  648. EXPORT_SYMBOL(kvm_mips_translate_guest_kseg0_to_hpa);
  649. EXPORT_SYMBOL(kvm_mips_dump_guest_tlbs);
  650. EXPORT_SYMBOL(kvm_get_inst);
  651. EXPORT_SYMBOL(kvm_arch_vcpu_load);
  652. EXPORT_SYMBOL(kvm_arch_vcpu_put);