atomic.h 6.9 KB

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  1. #ifndef _ASM_M32R_ATOMIC_H
  2. #define _ASM_M32R_ATOMIC_H
  3. /*
  4. * linux/include/asm-m32r/atomic.h
  5. *
  6. * M32R version:
  7. * Copyright (C) 2001, 2002 Hitoshi Yamamoto
  8. * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org>
  9. */
  10. #include <linux/types.h>
  11. #include <asm/assembler.h>
  12. #include <asm/cmpxchg.h>
  13. #include <asm/dcache_clear.h>
  14. #include <asm/barrier.h>
  15. /*
  16. * Atomic operations that C can't guarantee us. Useful for
  17. * resource counting etc..
  18. */
  19. #define ATOMIC_INIT(i) { (i) }
  20. /**
  21. * atomic_read - read atomic variable
  22. * @v: pointer of type atomic_t
  23. *
  24. * Atomically reads the value of @v.
  25. */
  26. #define atomic_read(v) (*(volatile int *)&(v)->counter)
  27. /**
  28. * atomic_set - set atomic variable
  29. * @v: pointer of type atomic_t
  30. * @i: required value
  31. *
  32. * Atomically sets the value of @v to @i.
  33. */
  34. #define atomic_set(v,i) (((v)->counter) = (i))
  35. /**
  36. * atomic_add_return - add integer to atomic variable and return it
  37. * @i: integer value to add
  38. * @v: pointer of type atomic_t
  39. *
  40. * Atomically adds @i to @v and return (@i + @v).
  41. */
  42. static __inline__ int atomic_add_return(int i, atomic_t *v)
  43. {
  44. unsigned long flags;
  45. int result;
  46. local_irq_save(flags);
  47. __asm__ __volatile__ (
  48. "# atomic_add_return \n\t"
  49. DCACHE_CLEAR("%0", "r4", "%1")
  50. M32R_LOCK" %0, @%1; \n\t"
  51. "add %0, %2; \n\t"
  52. M32R_UNLOCK" %0, @%1; \n\t"
  53. : "=&r" (result)
  54. : "r" (&v->counter), "r" (i)
  55. : "memory"
  56. #ifdef CONFIG_CHIP_M32700_TS1
  57. , "r4"
  58. #endif /* CONFIG_CHIP_M32700_TS1 */
  59. );
  60. local_irq_restore(flags);
  61. return result;
  62. }
  63. /**
  64. * atomic_sub_return - subtract integer from atomic variable and return it
  65. * @i: integer value to subtract
  66. * @v: pointer of type atomic_t
  67. *
  68. * Atomically subtracts @i from @v and return (@v - @i).
  69. */
  70. static __inline__ int atomic_sub_return(int i, atomic_t *v)
  71. {
  72. unsigned long flags;
  73. int result;
  74. local_irq_save(flags);
  75. __asm__ __volatile__ (
  76. "# atomic_sub_return \n\t"
  77. DCACHE_CLEAR("%0", "r4", "%1")
  78. M32R_LOCK" %0, @%1; \n\t"
  79. "sub %0, %2; \n\t"
  80. M32R_UNLOCK" %0, @%1; \n\t"
  81. : "=&r" (result)
  82. : "r" (&v->counter), "r" (i)
  83. : "memory"
  84. #ifdef CONFIG_CHIP_M32700_TS1
  85. , "r4"
  86. #endif /* CONFIG_CHIP_M32700_TS1 */
  87. );
  88. local_irq_restore(flags);
  89. return result;
  90. }
  91. /**
  92. * atomic_add - add integer to atomic variable
  93. * @i: integer value to add
  94. * @v: pointer of type atomic_t
  95. *
  96. * Atomically adds @i to @v.
  97. */
  98. #define atomic_add(i,v) ((void) atomic_add_return((i), (v)))
  99. /**
  100. * atomic_sub - subtract the atomic variable
  101. * @i: integer value to subtract
  102. * @v: pointer of type atomic_t
  103. *
  104. * Atomically subtracts @i from @v.
  105. */
  106. #define atomic_sub(i,v) ((void) atomic_sub_return((i), (v)))
  107. /**
  108. * atomic_sub_and_test - subtract value from variable and test result
  109. * @i: integer value to subtract
  110. * @v: pointer of type atomic_t
  111. *
  112. * Atomically subtracts @i from @v and returns
  113. * true if the result is zero, or false for all
  114. * other cases.
  115. */
  116. #define atomic_sub_and_test(i,v) (atomic_sub_return((i), (v)) == 0)
  117. /**
  118. * atomic_inc_return - increment atomic variable and return it
  119. * @v: pointer of type atomic_t
  120. *
  121. * Atomically increments @v by 1 and returns the result.
  122. */
  123. static __inline__ int atomic_inc_return(atomic_t *v)
  124. {
  125. unsigned long flags;
  126. int result;
  127. local_irq_save(flags);
  128. __asm__ __volatile__ (
  129. "# atomic_inc_return \n\t"
  130. DCACHE_CLEAR("%0", "r4", "%1")
  131. M32R_LOCK" %0, @%1; \n\t"
  132. "addi %0, #1; \n\t"
  133. M32R_UNLOCK" %0, @%1; \n\t"
  134. : "=&r" (result)
  135. : "r" (&v->counter)
  136. : "memory"
  137. #ifdef CONFIG_CHIP_M32700_TS1
  138. , "r4"
  139. #endif /* CONFIG_CHIP_M32700_TS1 */
  140. );
  141. local_irq_restore(flags);
  142. return result;
  143. }
  144. /**
  145. * atomic_dec_return - decrement atomic variable and return it
  146. * @v: pointer of type atomic_t
  147. *
  148. * Atomically decrements @v by 1 and returns the result.
  149. */
  150. static __inline__ int atomic_dec_return(atomic_t *v)
  151. {
  152. unsigned long flags;
  153. int result;
  154. local_irq_save(flags);
  155. __asm__ __volatile__ (
  156. "# atomic_dec_return \n\t"
  157. DCACHE_CLEAR("%0", "r4", "%1")
  158. M32R_LOCK" %0, @%1; \n\t"
  159. "addi %0, #-1; \n\t"
  160. M32R_UNLOCK" %0, @%1; \n\t"
  161. : "=&r" (result)
  162. : "r" (&v->counter)
  163. : "memory"
  164. #ifdef CONFIG_CHIP_M32700_TS1
  165. , "r4"
  166. #endif /* CONFIG_CHIP_M32700_TS1 */
  167. );
  168. local_irq_restore(flags);
  169. return result;
  170. }
  171. /**
  172. * atomic_inc - increment atomic variable
  173. * @v: pointer of type atomic_t
  174. *
  175. * Atomically increments @v by 1.
  176. */
  177. #define atomic_inc(v) ((void)atomic_inc_return(v))
  178. /**
  179. * atomic_dec - decrement atomic variable
  180. * @v: pointer of type atomic_t
  181. *
  182. * Atomically decrements @v by 1.
  183. */
  184. #define atomic_dec(v) ((void)atomic_dec_return(v))
  185. /**
  186. * atomic_inc_and_test - increment and test
  187. * @v: pointer of type atomic_t
  188. *
  189. * Atomically increments @v by 1
  190. * and returns true if the result is zero, or false for all
  191. * other cases.
  192. */
  193. #define atomic_inc_and_test(v) (atomic_inc_return(v) == 0)
  194. /**
  195. * atomic_dec_and_test - decrement and test
  196. * @v: pointer of type atomic_t
  197. *
  198. * Atomically decrements @v by 1 and
  199. * returns true if the result is 0, or false for all
  200. * other cases.
  201. */
  202. #define atomic_dec_and_test(v) (atomic_dec_return(v) == 0)
  203. /**
  204. * atomic_add_negative - add and test if negative
  205. * @v: pointer of type atomic_t
  206. * @i: integer value to add
  207. *
  208. * Atomically adds @i to @v and returns true
  209. * if the result is negative, or false when
  210. * result is greater than or equal to zero.
  211. */
  212. #define atomic_add_negative(i,v) (atomic_add_return((i), (v)) < 0)
  213. #define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n)))
  214. #define atomic_xchg(v, new) (xchg(&((v)->counter), new))
  215. /**
  216. * __atomic_add_unless - add unless the number is a given value
  217. * @v: pointer of type atomic_t
  218. * @a: the amount to add to v...
  219. * @u: ...unless v is equal to u.
  220. *
  221. * Atomically adds @a to @v, so long as it was not @u.
  222. * Returns the old value of @v.
  223. */
  224. static __inline__ int __atomic_add_unless(atomic_t *v, int a, int u)
  225. {
  226. int c, old;
  227. c = atomic_read(v);
  228. for (;;) {
  229. if (unlikely(c == (u)))
  230. break;
  231. old = atomic_cmpxchg((v), c, c + (a));
  232. if (likely(old == c))
  233. break;
  234. c = old;
  235. }
  236. return c;
  237. }
  238. static __inline__ void atomic_clear_mask(unsigned long mask, atomic_t *addr)
  239. {
  240. unsigned long flags;
  241. unsigned long tmp;
  242. local_irq_save(flags);
  243. __asm__ __volatile__ (
  244. "# atomic_clear_mask \n\t"
  245. DCACHE_CLEAR("%0", "r5", "%1")
  246. M32R_LOCK" %0, @%1; \n\t"
  247. "and %0, %2; \n\t"
  248. M32R_UNLOCK" %0, @%1; \n\t"
  249. : "=&r" (tmp)
  250. : "r" (addr), "r" (~mask)
  251. : "memory"
  252. #ifdef CONFIG_CHIP_M32700_TS1
  253. , "r5"
  254. #endif /* CONFIG_CHIP_M32700_TS1 */
  255. );
  256. local_irq_restore(flags);
  257. }
  258. static __inline__ void atomic_set_mask(unsigned long mask, atomic_t *addr)
  259. {
  260. unsigned long flags;
  261. unsigned long tmp;
  262. local_irq_save(flags);
  263. __asm__ __volatile__ (
  264. "# atomic_set_mask \n\t"
  265. DCACHE_CLEAR("%0", "r5", "%1")
  266. M32R_LOCK" %0, @%1; \n\t"
  267. "or %0, %2; \n\t"
  268. M32R_UNLOCK" %0, @%1; \n\t"
  269. : "=&r" (tmp)
  270. : "r" (addr), "r" (mask)
  271. : "memory"
  272. #ifdef CONFIG_CHIP_M32700_TS1
  273. , "r5"
  274. #endif /* CONFIG_CHIP_M32700_TS1 */
  275. );
  276. local_irq_restore(flags);
  277. }
  278. #endif /* _ASM_M32R_ATOMIC_H */