barrier.h 872 B

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * Tony Kou (tonyko@lineo.ca)
  4. *
  5. * Licensed under the GPL-2 or later
  6. */
  7. #ifndef _BLACKFIN_BARRIER_H
  8. #define _BLACKFIN_BARRIER_H
  9. #include <asm/cache.h>
  10. #define nop() __asm__ __volatile__ ("nop;\n\t" : : )
  11. /*
  12. * Force strict CPU ordering.
  13. */
  14. #ifdef CONFIG_SMP
  15. #ifdef __ARCH_SYNC_CORE_DCACHE
  16. /* Force Core data cache coherence */
  17. # define mb() do { barrier(); smp_check_barrier(); smp_mark_barrier(); } while (0)
  18. # define rmb() do { barrier(); smp_check_barrier(); } while (0)
  19. # define wmb() do { barrier(); smp_mark_barrier(); } while (0)
  20. # define read_barrier_depends() do { barrier(); smp_check_barrier(); } while (0)
  21. #endif
  22. #endif /* !CONFIG_SMP */
  23. #define smp_mb__before_atomic() barrier()
  24. #define smp_mb__after_atomic() barrier()
  25. #include <asm-generic/barrier.h>
  26. #endif /* _BLACKFIN_BARRIER_H */