smp.c 14 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645
  1. /*
  2. * SMP initialisation and IPI support
  3. * Based on arch/arm/kernel/smp.c
  4. *
  5. * Copyright (C) 2012 ARM Ltd.
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  18. */
  19. #include <linux/delay.h>
  20. #include <linux/init.h>
  21. #include <linux/spinlock.h>
  22. #include <linux/sched.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/cache.h>
  25. #include <linux/profile.h>
  26. #include <linux/errno.h>
  27. #include <linux/mm.h>
  28. #include <linux/err.h>
  29. #include <linux/cpu.h>
  30. #include <linux/smp.h>
  31. #include <linux/seq_file.h>
  32. #include <linux/irq.h>
  33. #include <linux/percpu.h>
  34. #include <linux/clockchips.h>
  35. #include <linux/completion.h>
  36. #include <linux/of.h>
  37. #include <linux/irq_work.h>
  38. #include <asm/atomic.h>
  39. #include <asm/cacheflush.h>
  40. #include <asm/cputype.h>
  41. #include <asm/cpu_ops.h>
  42. #include <asm/mmu_context.h>
  43. #include <asm/pgtable.h>
  44. #include <asm/pgalloc.h>
  45. #include <asm/processor.h>
  46. #include <asm/smp_plat.h>
  47. #include <asm/sections.h>
  48. #include <asm/tlbflush.h>
  49. #include <asm/ptrace.h>
  50. /*
  51. * as from 2.5, kernels no longer have an init_tasks structure
  52. * so we need some other way of telling a new secondary core
  53. * where to place its SVC stack
  54. */
  55. struct secondary_data secondary_data;
  56. enum ipi_msg_type {
  57. IPI_RESCHEDULE,
  58. IPI_CALL_FUNC,
  59. IPI_CALL_FUNC_SINGLE,
  60. IPI_CPU_STOP,
  61. IPI_TIMER,
  62. IPI_IRQ_WORK,
  63. };
  64. /*
  65. * Boot a secondary CPU, and assign it the specified idle task.
  66. * This also gives us the initial stack to use for this CPU.
  67. */
  68. static int boot_secondary(unsigned int cpu, struct task_struct *idle)
  69. {
  70. if (cpu_ops[cpu]->cpu_boot)
  71. return cpu_ops[cpu]->cpu_boot(cpu);
  72. return -EOPNOTSUPP;
  73. }
  74. static DECLARE_COMPLETION(cpu_running);
  75. int __cpu_up(unsigned int cpu, struct task_struct *idle)
  76. {
  77. int ret;
  78. /*
  79. * We need to tell the secondary core where to find its stack and the
  80. * page tables.
  81. */
  82. secondary_data.stack = task_stack_page(idle) + THREAD_START_SP;
  83. __flush_dcache_area(&secondary_data, sizeof(secondary_data));
  84. /*
  85. * Now bring the CPU into our world.
  86. */
  87. ret = boot_secondary(cpu, idle);
  88. if (ret == 0) {
  89. /*
  90. * CPU was successfully started, wait for it to come online or
  91. * time out.
  92. */
  93. wait_for_completion_timeout(&cpu_running,
  94. msecs_to_jiffies(1000));
  95. if (!cpu_online(cpu)) {
  96. pr_crit("CPU%u: failed to come online\n", cpu);
  97. ret = -EIO;
  98. }
  99. } else {
  100. pr_err("CPU%u: failed to boot: %d\n", cpu, ret);
  101. }
  102. secondary_data.stack = NULL;
  103. return ret;
  104. }
  105. static void smp_store_cpu_info(unsigned int cpuid)
  106. {
  107. store_cpu_topology(cpuid);
  108. }
  109. /*
  110. * This is the secondary CPU boot entry. We're using this CPUs
  111. * idle thread stack, but a set of temporary page tables.
  112. */
  113. asmlinkage void secondary_start_kernel(void)
  114. {
  115. struct mm_struct *mm = &init_mm;
  116. unsigned int cpu = smp_processor_id();
  117. /*
  118. * All kernel threads share the same mm context; grab a
  119. * reference and switch to it.
  120. */
  121. atomic_inc(&mm->mm_count);
  122. current->active_mm = mm;
  123. cpumask_set_cpu(cpu, mm_cpumask(mm));
  124. set_my_cpu_offset(per_cpu_offset(smp_processor_id()));
  125. printk("CPU%u: Booted secondary processor\n", cpu);
  126. /*
  127. * TTBR0 is only used for the identity mapping at this stage. Make it
  128. * point to zero page to avoid speculatively fetching new entries.
  129. */
  130. cpu_set_reserved_ttbr0();
  131. flush_tlb_all();
  132. preempt_disable();
  133. trace_hardirqs_off();
  134. if (cpu_ops[cpu]->cpu_postboot)
  135. cpu_ops[cpu]->cpu_postboot();
  136. /*
  137. * Enable GIC and timers.
  138. */
  139. notify_cpu_starting(cpu);
  140. smp_store_cpu_info(cpu);
  141. /*
  142. * OK, now it's safe to let the boot CPU continue. Wait for
  143. * the CPU migration code to notice that the CPU is online
  144. * before we continue.
  145. */
  146. set_cpu_online(cpu, true);
  147. complete(&cpu_running);
  148. local_dbg_enable();
  149. local_irq_enable();
  150. local_async_enable();
  151. /*
  152. * OK, it's off to the idle thread for us
  153. */
  154. cpu_startup_entry(CPUHP_ONLINE);
  155. }
  156. #ifdef CONFIG_HOTPLUG_CPU
  157. static int op_cpu_disable(unsigned int cpu)
  158. {
  159. /*
  160. * If we don't have a cpu_die method, abort before we reach the point
  161. * of no return. CPU0 may not have an cpu_ops, so test for it.
  162. */
  163. if (!cpu_ops[cpu] || !cpu_ops[cpu]->cpu_die)
  164. return -EOPNOTSUPP;
  165. /*
  166. * We may need to abort a hot unplug for some other mechanism-specific
  167. * reason.
  168. */
  169. if (cpu_ops[cpu]->cpu_disable)
  170. return cpu_ops[cpu]->cpu_disable(cpu);
  171. return 0;
  172. }
  173. /*
  174. * __cpu_disable runs on the processor to be shutdown.
  175. */
  176. int __cpu_disable(void)
  177. {
  178. unsigned int cpu = smp_processor_id();
  179. int ret;
  180. ret = op_cpu_disable(cpu);
  181. if (ret)
  182. return ret;
  183. /*
  184. * Take this CPU offline. Once we clear this, we can't return,
  185. * and we must not schedule until we're ready to give up the cpu.
  186. */
  187. set_cpu_online(cpu, false);
  188. /*
  189. * OK - migrate IRQs away from this CPU
  190. */
  191. migrate_irqs();
  192. /*
  193. * Remove this CPU from the vm mask set of all processes.
  194. */
  195. clear_tasks_mm_cpumask(cpu);
  196. return 0;
  197. }
  198. static int op_cpu_kill(unsigned int cpu)
  199. {
  200. /*
  201. * If we have no means of synchronising with the dying CPU, then assume
  202. * that it is really dead. We can only wait for an arbitrary length of
  203. * time and hope that it's dead, so let's skip the wait and just hope.
  204. */
  205. if (!cpu_ops[cpu]->cpu_kill)
  206. return 1;
  207. return cpu_ops[cpu]->cpu_kill(cpu);
  208. }
  209. static DECLARE_COMPLETION(cpu_died);
  210. /*
  211. * called on the thread which is asking for a CPU to be shutdown -
  212. * waits until shutdown has completed, or it is timed out.
  213. */
  214. void __cpu_die(unsigned int cpu)
  215. {
  216. if (!wait_for_completion_timeout(&cpu_died, msecs_to_jiffies(5000))) {
  217. pr_crit("CPU%u: cpu didn't die\n", cpu);
  218. return;
  219. }
  220. pr_notice("CPU%u: shutdown\n", cpu);
  221. /*
  222. * Now that the dying CPU is beyond the point of no return w.r.t.
  223. * in-kernel synchronisation, try to get the firwmare to help us to
  224. * verify that it has really left the kernel before we consider
  225. * clobbering anything it might still be using.
  226. */
  227. if (!op_cpu_kill(cpu))
  228. pr_warn("CPU%d may not have shut down cleanly\n", cpu);
  229. }
  230. /*
  231. * Called from the idle thread for the CPU which has been shutdown.
  232. *
  233. * Note that we disable IRQs here, but do not re-enable them
  234. * before returning to the caller. This is also the behaviour
  235. * of the other hotplug-cpu capable cores, so presumably coming
  236. * out of idle fixes this.
  237. */
  238. void cpu_die(void)
  239. {
  240. unsigned int cpu = smp_processor_id();
  241. idle_task_exit();
  242. local_irq_disable();
  243. /* Tell __cpu_die() that this CPU is now safe to dispose of */
  244. complete(&cpu_died);
  245. /*
  246. * Actually shutdown the CPU. This must never fail. The specific hotplug
  247. * mechanism must perform all required cache maintenance to ensure that
  248. * no dirty lines are lost in the process of shutting down the CPU.
  249. */
  250. cpu_ops[cpu]->cpu_die(cpu);
  251. BUG();
  252. }
  253. #endif
  254. void __init smp_cpus_done(unsigned int max_cpus)
  255. {
  256. pr_info("SMP: Total of %d processors activated.\n", num_online_cpus());
  257. }
  258. void __init smp_prepare_boot_cpu(void)
  259. {
  260. set_my_cpu_offset(per_cpu_offset(smp_processor_id()));
  261. }
  262. static void (*smp_cross_call)(const struct cpumask *, unsigned int);
  263. /*
  264. * Enumerate the possible CPU set from the device tree and build the
  265. * cpu logical map array containing MPIDR values related to logical
  266. * cpus. Assumes that cpu_logical_map(0) has already been initialized.
  267. */
  268. void __init smp_init_cpus(void)
  269. {
  270. struct device_node *dn = NULL;
  271. unsigned int i, cpu = 1;
  272. bool bootcpu_valid = false;
  273. while ((dn = of_find_node_by_type(dn, "cpu"))) {
  274. const u32 *cell;
  275. u64 hwid;
  276. /*
  277. * A cpu node with missing "reg" property is
  278. * considered invalid to build a cpu_logical_map
  279. * entry.
  280. */
  281. cell = of_get_property(dn, "reg", NULL);
  282. if (!cell) {
  283. pr_err("%s: missing reg property\n", dn->full_name);
  284. goto next;
  285. }
  286. hwid = of_read_number(cell, of_n_addr_cells(dn));
  287. /*
  288. * Non affinity bits must be set to 0 in the DT
  289. */
  290. if (hwid & ~MPIDR_HWID_BITMASK) {
  291. pr_err("%s: invalid reg property\n", dn->full_name);
  292. goto next;
  293. }
  294. /*
  295. * Duplicate MPIDRs are a recipe for disaster. Scan
  296. * all initialized entries and check for
  297. * duplicates. If any is found just ignore the cpu.
  298. * cpu_logical_map was initialized to INVALID_HWID to
  299. * avoid matching valid MPIDR values.
  300. */
  301. for (i = 1; (i < cpu) && (i < NR_CPUS); i++) {
  302. if (cpu_logical_map(i) == hwid) {
  303. pr_err("%s: duplicate cpu reg properties in the DT\n",
  304. dn->full_name);
  305. goto next;
  306. }
  307. }
  308. /*
  309. * The numbering scheme requires that the boot CPU
  310. * must be assigned logical id 0. Record it so that
  311. * the logical map built from DT is validated and can
  312. * be used.
  313. */
  314. if (hwid == cpu_logical_map(0)) {
  315. if (bootcpu_valid) {
  316. pr_err("%s: duplicate boot cpu reg property in DT\n",
  317. dn->full_name);
  318. goto next;
  319. }
  320. bootcpu_valid = true;
  321. /*
  322. * cpu_logical_map has already been
  323. * initialized and the boot cpu doesn't need
  324. * the enable-method so continue without
  325. * incrementing cpu.
  326. */
  327. continue;
  328. }
  329. if (cpu >= NR_CPUS)
  330. goto next;
  331. if (cpu_read_ops(dn, cpu) != 0)
  332. goto next;
  333. if (cpu_ops[cpu]->cpu_init(dn, cpu))
  334. goto next;
  335. pr_debug("cpu logical map 0x%llx\n", hwid);
  336. cpu_logical_map(cpu) = hwid;
  337. next:
  338. cpu++;
  339. }
  340. /* sanity check */
  341. if (cpu > NR_CPUS)
  342. pr_warning("no. of cores (%d) greater than configured maximum of %d - clipping\n",
  343. cpu, NR_CPUS);
  344. if (!bootcpu_valid) {
  345. pr_err("DT missing boot CPU MPIDR, not enabling secondaries\n");
  346. return;
  347. }
  348. /*
  349. * All the cpus that made it to the cpu_logical_map have been
  350. * validated so set them as possible cpus.
  351. */
  352. for (i = 0; i < NR_CPUS; i++)
  353. if (cpu_logical_map(i) != INVALID_HWID)
  354. set_cpu_possible(i, true);
  355. }
  356. void __init smp_prepare_cpus(unsigned int max_cpus)
  357. {
  358. int err;
  359. unsigned int cpu, ncores = num_possible_cpus();
  360. init_cpu_topology();
  361. smp_store_cpu_info(smp_processor_id());
  362. /*
  363. * are we trying to boot more cores than exist?
  364. */
  365. if (max_cpus > ncores)
  366. max_cpus = ncores;
  367. /* Don't bother if we're effectively UP */
  368. if (max_cpus <= 1)
  369. return;
  370. /*
  371. * Initialise the present map (which describes the set of CPUs
  372. * actually populated at the present time) and release the
  373. * secondaries from the bootloader.
  374. *
  375. * Make sure we online at most (max_cpus - 1) additional CPUs.
  376. */
  377. max_cpus--;
  378. for_each_possible_cpu(cpu) {
  379. if (max_cpus == 0)
  380. break;
  381. if (cpu == smp_processor_id())
  382. continue;
  383. if (!cpu_ops[cpu])
  384. continue;
  385. err = cpu_ops[cpu]->cpu_prepare(cpu);
  386. if (err)
  387. continue;
  388. set_cpu_present(cpu, true);
  389. max_cpus--;
  390. }
  391. }
  392. void __init set_smp_cross_call(void (*fn)(const struct cpumask *, unsigned int))
  393. {
  394. smp_cross_call = fn;
  395. }
  396. void arch_send_call_function_ipi_mask(const struct cpumask *mask)
  397. {
  398. smp_cross_call(mask, IPI_CALL_FUNC);
  399. }
  400. void arch_send_call_function_single_ipi(int cpu)
  401. {
  402. smp_cross_call(cpumask_of(cpu), IPI_CALL_FUNC_SINGLE);
  403. }
  404. #ifdef CONFIG_IRQ_WORK
  405. void arch_irq_work_raise(void)
  406. {
  407. if (smp_cross_call)
  408. smp_cross_call(cpumask_of(smp_processor_id()), IPI_IRQ_WORK);
  409. }
  410. #endif
  411. static const char *ipi_types[NR_IPI] = {
  412. #define S(x,s) [x - IPI_RESCHEDULE] = s
  413. S(IPI_RESCHEDULE, "Rescheduling interrupts"),
  414. S(IPI_CALL_FUNC, "Function call interrupts"),
  415. S(IPI_CALL_FUNC_SINGLE, "Single function call interrupts"),
  416. S(IPI_CPU_STOP, "CPU stop interrupts"),
  417. S(IPI_TIMER, "Timer broadcast interrupts"),
  418. S(IPI_IRQ_WORK, "IRQ work interrupts"),
  419. };
  420. void show_ipi_list(struct seq_file *p, int prec)
  421. {
  422. unsigned int cpu, i;
  423. for (i = 0; i < NR_IPI; i++) {
  424. seq_printf(p, "%*s%u:%s", prec - 1, "IPI", i + IPI_RESCHEDULE,
  425. prec >= 4 ? " " : "");
  426. for_each_online_cpu(cpu)
  427. seq_printf(p, "%10u ",
  428. __get_irq_stat(cpu, ipi_irqs[i]));
  429. seq_printf(p, " %s\n", ipi_types[i]);
  430. }
  431. }
  432. u64 smp_irq_stat_cpu(unsigned int cpu)
  433. {
  434. u64 sum = 0;
  435. int i;
  436. for (i = 0; i < NR_IPI; i++)
  437. sum += __get_irq_stat(cpu, ipi_irqs[i]);
  438. return sum;
  439. }
  440. static DEFINE_RAW_SPINLOCK(stop_lock);
  441. /*
  442. * ipi_cpu_stop - handle IPI from smp_send_stop()
  443. */
  444. static void ipi_cpu_stop(unsigned int cpu)
  445. {
  446. if (system_state == SYSTEM_BOOTING ||
  447. system_state == SYSTEM_RUNNING) {
  448. raw_spin_lock(&stop_lock);
  449. pr_crit("CPU%u: stopping\n", cpu);
  450. dump_stack();
  451. raw_spin_unlock(&stop_lock);
  452. }
  453. set_cpu_online(cpu, false);
  454. local_irq_disable();
  455. while (1)
  456. cpu_relax();
  457. }
  458. /*
  459. * Main handler for inter-processor interrupts
  460. */
  461. void handle_IPI(int ipinr, struct pt_regs *regs)
  462. {
  463. unsigned int cpu = smp_processor_id();
  464. struct pt_regs *old_regs = set_irq_regs(regs);
  465. if (ipinr >= IPI_RESCHEDULE && ipinr < IPI_RESCHEDULE + NR_IPI)
  466. __inc_irq_stat(cpu, ipi_irqs[ipinr - IPI_RESCHEDULE]);
  467. switch (ipinr) {
  468. case IPI_RESCHEDULE:
  469. scheduler_ipi();
  470. break;
  471. case IPI_CALL_FUNC:
  472. irq_enter();
  473. generic_smp_call_function_interrupt();
  474. irq_exit();
  475. break;
  476. case IPI_CALL_FUNC_SINGLE:
  477. irq_enter();
  478. generic_smp_call_function_single_interrupt();
  479. irq_exit();
  480. break;
  481. case IPI_CPU_STOP:
  482. irq_enter();
  483. ipi_cpu_stop(cpu);
  484. irq_exit();
  485. break;
  486. #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
  487. case IPI_TIMER:
  488. irq_enter();
  489. tick_receive_broadcast();
  490. irq_exit();
  491. break;
  492. #endif
  493. #ifdef CONFIG_IRQ_WORK
  494. case IPI_IRQ_WORK:
  495. irq_enter();
  496. irq_work_run();
  497. irq_exit();
  498. break;
  499. #endif
  500. default:
  501. pr_crit("CPU%u: Unknown IPI message 0x%x\n", cpu, ipinr);
  502. break;
  503. }
  504. set_irq_regs(old_regs);
  505. }
  506. void smp_send_reschedule(int cpu)
  507. {
  508. smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE);
  509. }
  510. #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
  511. void tick_broadcast(const struct cpumask *mask)
  512. {
  513. smp_cross_call(mask, IPI_TIMER);
  514. }
  515. #endif
  516. void smp_send_stop(void)
  517. {
  518. unsigned long timeout;
  519. if (num_online_cpus() > 1) {
  520. cpumask_t mask;
  521. cpumask_copy(&mask, cpu_online_mask);
  522. cpu_clear(smp_processor_id(), mask);
  523. smp_cross_call(&mask, IPI_CPU_STOP);
  524. }
  525. /* Wait up to one second for other CPUs to stop */
  526. timeout = USEC_PER_SEC;
  527. while (num_online_cpus() > 1 && timeout--)
  528. udelay(1);
  529. if (num_online_cpus() > 1)
  530. pr_warning("SMP: failed to stop secondary CPUs\n");
  531. }
  532. /*
  533. * not supported here
  534. */
  535. int setup_profiling_timer(unsigned int multiplier)
  536. {
  537. return -EINVAL;
  538. }