board-lager.c 25 KB

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  1. /*
  2. * Lager board support
  3. *
  4. * Copyright (C) 2013-2014 Renesas Solutions Corp.
  5. * Copyright (C) 2013 Magnus Damm
  6. * Copyright (C) 2014 Cogent Embedded, Inc.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; version 2 of the License.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  20. */
  21. #include <linux/gpio.h>
  22. #include <linux/gpio_keys.h>
  23. #include <linux/i2c.h>
  24. #include <linux/input.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/irq.h>
  27. #include <linux/kernel.h>
  28. #include <linux/leds.h>
  29. #include <linux/mfd/tmio.h>
  30. #include <linux/mmc/host.h>
  31. #include <linux/mmc/sh_mmcif.h>
  32. #include <linux/mmc/sh_mobile_sdhi.h>
  33. #include <linux/pinctrl/machine.h>
  34. #include <linux/platform_data/camera-rcar.h>
  35. #include <linux/platform_data/gpio-rcar.h>
  36. #include <linux/platform_data/rcar-du.h>
  37. #include <linux/platform_data/usb-rcar-gen2-phy.h>
  38. #include <linux/platform_device.h>
  39. #include <linux/phy.h>
  40. #include <linux/regulator/driver.h>
  41. #include <linux/regulator/fixed.h>
  42. #include <linux/regulator/gpio-regulator.h>
  43. #include <linux/regulator/machine.h>
  44. #include <linux/sh_eth.h>
  45. #include <linux/usb/phy.h>
  46. #include <linux/usb/renesas_usbhs.h>
  47. #include <mach/common.h>
  48. #include <mach/irqs.h>
  49. #include <mach/r8a7790.h>
  50. #include <media/soc_camera.h>
  51. #include <asm/mach-types.h>
  52. #include <asm/mach/arch.h>
  53. #include <linux/mtd/partitions.h>
  54. #include <linux/mtd/mtd.h>
  55. #include <linux/spi/flash.h>
  56. #include <linux/spi/rspi.h>
  57. #include <linux/spi/spi.h>
  58. #include <sound/rcar_snd.h>
  59. #include <sound/simple_card.h>
  60. /*
  61. * SSI-AK4643
  62. *
  63. * SW1: 1: AK4643
  64. * 2: CN22
  65. * 3: ADV7511
  66. *
  67. * this command is required when playback.
  68. *
  69. * # amixer set "LINEOUT Mixer DACL" on
  70. */
  71. /*
  72. * SDHI0 (CN8)
  73. *
  74. * JP3: pin1
  75. * SW20: pin1
  76. * GP5_24: 1: VDD 3.3V (defult)
  77. * 0: VDD 0.0V
  78. * GP5_29: 1: VccQ 3.3V (defult)
  79. * 0: VccQ 1.8V
  80. *
  81. */
  82. /* DU */
  83. static struct rcar_du_encoder_data lager_du_encoders[] = {
  84. {
  85. .type = RCAR_DU_ENCODER_VGA,
  86. .output = RCAR_DU_OUTPUT_DPAD0,
  87. }, {
  88. .type = RCAR_DU_ENCODER_NONE,
  89. .output = RCAR_DU_OUTPUT_LVDS1,
  90. .connector.lvds.panel = {
  91. .width_mm = 210,
  92. .height_mm = 158,
  93. .mode = {
  94. .clock = 65000,
  95. .hdisplay = 1024,
  96. .hsync_start = 1048,
  97. .hsync_end = 1184,
  98. .htotal = 1344,
  99. .vdisplay = 768,
  100. .vsync_start = 771,
  101. .vsync_end = 777,
  102. .vtotal = 806,
  103. .flags = 0,
  104. },
  105. },
  106. },
  107. };
  108. static const struct rcar_du_platform_data lager_du_pdata __initconst = {
  109. .encoders = lager_du_encoders,
  110. .num_encoders = ARRAY_SIZE(lager_du_encoders),
  111. };
  112. static const struct resource du_resources[] __initconst = {
  113. DEFINE_RES_MEM(0xfeb00000, 0x70000),
  114. DEFINE_RES_MEM_NAMED(0xfeb90000, 0x1c, "lvds.0"),
  115. DEFINE_RES_MEM_NAMED(0xfeb94000, 0x1c, "lvds.1"),
  116. DEFINE_RES_IRQ(gic_spi(256)),
  117. DEFINE_RES_IRQ(gic_spi(268)),
  118. DEFINE_RES_IRQ(gic_spi(269)),
  119. };
  120. static void __init lager_add_du_device(void)
  121. {
  122. struct platform_device_info info = {
  123. .name = "rcar-du-r8a7790",
  124. .id = -1,
  125. .res = du_resources,
  126. .num_res = ARRAY_SIZE(du_resources),
  127. .data = &lager_du_pdata,
  128. .size_data = sizeof(lager_du_pdata),
  129. .dma_mask = DMA_BIT_MASK(32),
  130. };
  131. platform_device_register_full(&info);
  132. }
  133. /* LEDS */
  134. static struct gpio_led lager_leds[] = {
  135. {
  136. .name = "led8",
  137. .gpio = RCAR_GP_PIN(5, 17),
  138. .default_state = LEDS_GPIO_DEFSTATE_ON,
  139. }, {
  140. .name = "led7",
  141. .gpio = RCAR_GP_PIN(4, 23),
  142. .default_state = LEDS_GPIO_DEFSTATE_ON,
  143. }, {
  144. .name = "led6",
  145. .gpio = RCAR_GP_PIN(4, 22),
  146. .default_state = LEDS_GPIO_DEFSTATE_ON,
  147. },
  148. };
  149. static const struct gpio_led_platform_data lager_leds_pdata __initconst = {
  150. .leds = lager_leds,
  151. .num_leds = ARRAY_SIZE(lager_leds),
  152. };
  153. /* GPIO KEY */
  154. #define GPIO_KEY(c, g, d, ...) \
  155. { .code = c, .gpio = g, .desc = d, .active_low = 1, \
  156. .wakeup = 1, .debounce_interval = 20 }
  157. static struct gpio_keys_button gpio_buttons[] = {
  158. GPIO_KEY(KEY_4, RCAR_GP_PIN(1, 28), "SW2-pin4"),
  159. GPIO_KEY(KEY_3, RCAR_GP_PIN(1, 26), "SW2-pin3"),
  160. GPIO_KEY(KEY_2, RCAR_GP_PIN(1, 24), "SW2-pin2"),
  161. GPIO_KEY(KEY_1, RCAR_GP_PIN(1, 14), "SW2-pin1"),
  162. };
  163. static const struct gpio_keys_platform_data lager_keys_pdata __initconst = {
  164. .buttons = gpio_buttons,
  165. .nbuttons = ARRAY_SIZE(gpio_buttons),
  166. };
  167. /* Fixed 3.3V regulator to be used by MMCIF */
  168. static struct regulator_consumer_supply fixed3v3_power_consumers[] =
  169. {
  170. REGULATOR_SUPPLY("vmmc", "sh_mmcif.1"),
  171. };
  172. /*
  173. * SDHI regulator macro
  174. *
  175. ** FIXME**
  176. * Lager board vqmmc is provided via DA9063 PMIC chip,
  177. * and we should use ${LINK}/drivers/mfd/da9063-* driver for it.
  178. * but, it doesn't have regulator support at this point.
  179. * It uses gpio-regulator for vqmmc as quick-hack.
  180. */
  181. #define SDHI_REGULATOR(idx, vdd_pin, vccq_pin) \
  182. static struct regulator_consumer_supply vcc_sdhi##idx##_consumer = \
  183. REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi." #idx); \
  184. \
  185. static struct regulator_init_data vcc_sdhi##idx##_init_data = { \
  186. .constraints = { \
  187. .valid_ops_mask = REGULATOR_CHANGE_STATUS, \
  188. }, \
  189. .consumer_supplies = &vcc_sdhi##idx##_consumer, \
  190. .num_consumer_supplies = 1, \
  191. }; \
  192. \
  193. static const struct fixed_voltage_config vcc_sdhi##idx##_info __initconst = {\
  194. .supply_name = "SDHI" #idx "Vcc", \
  195. .microvolts = 3300000, \
  196. .gpio = vdd_pin, \
  197. .enable_high = 1, \
  198. .init_data = &vcc_sdhi##idx##_init_data, \
  199. }; \
  200. \
  201. static struct regulator_consumer_supply vccq_sdhi##idx##_consumer = \
  202. REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi." #idx); \
  203. \
  204. static struct regulator_init_data vccq_sdhi##idx##_init_data = { \
  205. .constraints = { \
  206. .input_uV = 3300000, \
  207. .min_uV = 1800000, \
  208. .max_uV = 3300000, \
  209. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | \
  210. REGULATOR_CHANGE_STATUS, \
  211. }, \
  212. .consumer_supplies = &vccq_sdhi##idx##_consumer, \
  213. .num_consumer_supplies = 1, \
  214. }; \
  215. \
  216. static struct gpio vccq_sdhi##idx##_gpio = \
  217. { vccq_pin, GPIOF_OUT_INIT_HIGH, "vccq-sdhi" #idx }; \
  218. \
  219. static struct gpio_regulator_state vccq_sdhi##idx##_states[] = { \
  220. { .value = 1800000, .gpios = 0 }, \
  221. { .value = 3300000, .gpios = 1 }, \
  222. }; \
  223. \
  224. static const struct gpio_regulator_config vccq_sdhi##idx##_info __initconst = {\
  225. .supply_name = "vqmmc", \
  226. .gpios = &vccq_sdhi##idx##_gpio, \
  227. .nr_gpios = 1, \
  228. .states = vccq_sdhi##idx##_states, \
  229. .nr_states = ARRAY_SIZE(vccq_sdhi##idx##_states), \
  230. .type = REGULATOR_VOLTAGE, \
  231. .init_data = &vccq_sdhi##idx##_init_data, \
  232. };
  233. SDHI_REGULATOR(0, RCAR_GP_PIN(5, 24), RCAR_GP_PIN(5, 29));
  234. SDHI_REGULATOR(2, RCAR_GP_PIN(5, 25), RCAR_GP_PIN(5, 30));
  235. /* MMCIF */
  236. static const struct sh_mmcif_plat_data mmcif1_pdata __initconst = {
  237. .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
  238. .clk_ctrl2_present = true,
  239. .ccs_unsupported = true,
  240. };
  241. static const struct resource mmcif1_resources[] __initconst = {
  242. DEFINE_RES_MEM(0xee220000, 0x80),
  243. DEFINE_RES_IRQ(gic_spi(170)),
  244. };
  245. /* Ether */
  246. static const struct sh_eth_plat_data ether_pdata __initconst = {
  247. .phy = 0x1,
  248. .phy_irq = irq_pin(0),
  249. .edmac_endian = EDMAC_LITTLE_ENDIAN,
  250. .phy_interface = PHY_INTERFACE_MODE_RMII,
  251. .ether_link_active_low = 1,
  252. };
  253. static const struct resource ether_resources[] __initconst = {
  254. DEFINE_RES_MEM(0xee700000, 0x400),
  255. DEFINE_RES_IRQ(gic_spi(162)),
  256. };
  257. static const struct platform_device_info ether_info __initconst = {
  258. .parent = &platform_bus,
  259. .name = "r8a7790-ether",
  260. .id = -1,
  261. .res = ether_resources,
  262. .num_res = ARRAY_SIZE(ether_resources),
  263. .data = &ether_pdata,
  264. .size_data = sizeof(ether_pdata),
  265. .dma_mask = DMA_BIT_MASK(32),
  266. };
  267. /* SPI Flash memory (Spansion S25FL512SAGMFIG11 64Mb) */
  268. static struct mtd_partition spi_flash_part[] = {
  269. /* Reserved for user loader program, read-only */
  270. {
  271. .name = "loader",
  272. .offset = 0,
  273. .size = SZ_256K,
  274. .mask_flags = MTD_WRITEABLE,
  275. },
  276. /* Reserved for user program, read-only */
  277. {
  278. .name = "user",
  279. .offset = MTDPART_OFS_APPEND,
  280. .size = SZ_4M,
  281. .mask_flags = MTD_WRITEABLE,
  282. },
  283. /* All else is writable (e.g. JFFS2) */
  284. {
  285. .name = "flash",
  286. .offset = MTDPART_OFS_APPEND,
  287. .size = MTDPART_SIZ_FULL,
  288. .mask_flags = 0,
  289. },
  290. };
  291. static const struct flash_platform_data spi_flash_data = {
  292. .name = "m25p80",
  293. .parts = spi_flash_part,
  294. .nr_parts = ARRAY_SIZE(spi_flash_part),
  295. .type = "s25fl512s",
  296. };
  297. static const struct rspi_plat_data qspi_pdata __initconst = {
  298. .num_chipselect = 1,
  299. };
  300. static const struct spi_board_info spi_info[] __initconst = {
  301. {
  302. .modalias = "m25p80",
  303. .platform_data = &spi_flash_data,
  304. .mode = SPI_MODE_0 | SPI_TX_QUAD | SPI_RX_QUAD,
  305. .max_speed_hz = 30000000,
  306. .bus_num = 0,
  307. .chip_select = 0,
  308. },
  309. };
  310. /* QSPI resource */
  311. static const struct resource qspi_resources[] __initconst = {
  312. DEFINE_RES_MEM(0xe6b10000, 0x1000),
  313. DEFINE_RES_IRQ_NAMED(gic_spi(184), "mux"),
  314. };
  315. /* VIN */
  316. static const struct resource vin_resources[] __initconst = {
  317. /* VIN0 */
  318. DEFINE_RES_MEM(0xe6ef0000, 0x1000),
  319. DEFINE_RES_IRQ(gic_spi(188)),
  320. /* VIN1 */
  321. DEFINE_RES_MEM(0xe6ef1000, 0x1000),
  322. DEFINE_RES_IRQ(gic_spi(189)),
  323. };
  324. static void __init lager_add_vin_device(unsigned idx,
  325. struct rcar_vin_platform_data *pdata)
  326. {
  327. struct platform_device_info vin_info = {
  328. .parent = &platform_bus,
  329. .name = "r8a7790-vin",
  330. .id = idx,
  331. .res = &vin_resources[idx * 2],
  332. .num_res = 2,
  333. .dma_mask = DMA_BIT_MASK(32),
  334. .data = pdata,
  335. .size_data = sizeof(*pdata),
  336. };
  337. BUG_ON(idx > 1);
  338. platform_device_register_full(&vin_info);
  339. }
  340. #define LAGER_CAMERA(idx, name, addr, pdata, flag) \
  341. static struct i2c_board_info i2c_cam##idx##_device = { \
  342. I2C_BOARD_INFO(name, addr), \
  343. }; \
  344. \
  345. static struct rcar_vin_platform_data vin##idx##_pdata = { \
  346. .flags = flag, \
  347. }; \
  348. \
  349. static struct soc_camera_link cam##idx##_link = { \
  350. .bus_id = idx, \
  351. .board_info = &i2c_cam##idx##_device, \
  352. .i2c_adapter_id = 2, \
  353. .module_name = name, \
  354. .priv = pdata, \
  355. }
  356. /* Camera 0 is not currently supported due to adv7612 support missing */
  357. LAGER_CAMERA(1, "adv7180", 0x20, NULL, RCAR_VIN_BT656);
  358. static void __init lager_add_camera1_device(void)
  359. {
  360. platform_device_register_data(&platform_bus, "soc-camera-pdrv", 1,
  361. &cam1_link, sizeof(cam1_link));
  362. lager_add_vin_device(1, &vin1_pdata);
  363. }
  364. /* SATA1 */
  365. static const struct resource sata1_resources[] __initconst = {
  366. DEFINE_RES_MEM(0xee500000, 0x2000),
  367. DEFINE_RES_IRQ(gic_spi(106)),
  368. };
  369. static const struct platform_device_info sata1_info __initconst = {
  370. .parent = &platform_bus,
  371. .name = "sata-r8a7790",
  372. .id = 1,
  373. .res = sata1_resources,
  374. .num_res = ARRAY_SIZE(sata1_resources),
  375. .dma_mask = DMA_BIT_MASK(32),
  376. };
  377. /* USBHS */
  378. static const struct resource usbhs_resources[] __initconst = {
  379. DEFINE_RES_MEM(0xe6590000, 0x100),
  380. DEFINE_RES_IRQ(gic_spi(107)),
  381. };
  382. struct usbhs_private {
  383. struct renesas_usbhs_platform_info info;
  384. struct usb_phy *phy;
  385. };
  386. #define usbhs_get_priv(pdev) \
  387. container_of(renesas_usbhs_get_info(pdev), struct usbhs_private, info)
  388. static int usbhs_power_ctrl(struct platform_device *pdev,
  389. void __iomem *base, int enable)
  390. {
  391. struct usbhs_private *priv = usbhs_get_priv(pdev);
  392. if (!priv->phy)
  393. return -ENODEV;
  394. if (enable) {
  395. int retval = usb_phy_init(priv->phy);
  396. if (!retval)
  397. retval = usb_phy_set_suspend(priv->phy, 0);
  398. return retval;
  399. }
  400. usb_phy_set_suspend(priv->phy, 1);
  401. usb_phy_shutdown(priv->phy);
  402. return 0;
  403. }
  404. static int usbhs_hardware_init(struct platform_device *pdev)
  405. {
  406. struct usbhs_private *priv = usbhs_get_priv(pdev);
  407. struct usb_phy *phy;
  408. int ret;
  409. /* USB0 Function - use PWEN as GPIO input to detect DIP Switch SW5
  410. * setting to avoid VBUS short circuit due to wrong cable.
  411. * PWEN should be pulled up high if USB Function is selected by SW5
  412. */
  413. gpio_request_one(RCAR_GP_PIN(5, 18), GPIOF_IN, NULL); /* USB0_PWEN */
  414. if (!gpio_get_value(RCAR_GP_PIN(5, 18))) {
  415. pr_warn("Error: USB Function not selected - check SW5 + SW6\n");
  416. ret = -ENOTSUPP;
  417. goto error;
  418. }
  419. phy = usb_get_phy_dev(&pdev->dev, 0);
  420. if (IS_ERR(phy)) {
  421. ret = PTR_ERR(phy);
  422. goto error;
  423. }
  424. priv->phy = phy;
  425. return 0;
  426. error:
  427. gpio_free(RCAR_GP_PIN(5, 18));
  428. return ret;
  429. }
  430. static int usbhs_hardware_exit(struct platform_device *pdev)
  431. {
  432. struct usbhs_private *priv = usbhs_get_priv(pdev);
  433. if (!priv->phy)
  434. return 0;
  435. usb_put_phy(priv->phy);
  436. priv->phy = NULL;
  437. gpio_free(RCAR_GP_PIN(5, 18));
  438. return 0;
  439. }
  440. static int usbhs_get_id(struct platform_device *pdev)
  441. {
  442. return USBHS_GADGET;
  443. }
  444. static u32 lager_usbhs_pipe_type[] = {
  445. USB_ENDPOINT_XFER_CONTROL,
  446. USB_ENDPOINT_XFER_ISOC,
  447. USB_ENDPOINT_XFER_ISOC,
  448. USB_ENDPOINT_XFER_BULK,
  449. USB_ENDPOINT_XFER_BULK,
  450. USB_ENDPOINT_XFER_BULK,
  451. USB_ENDPOINT_XFER_INT,
  452. USB_ENDPOINT_XFER_INT,
  453. USB_ENDPOINT_XFER_INT,
  454. USB_ENDPOINT_XFER_BULK,
  455. USB_ENDPOINT_XFER_BULK,
  456. USB_ENDPOINT_XFER_BULK,
  457. USB_ENDPOINT_XFER_BULK,
  458. USB_ENDPOINT_XFER_BULK,
  459. USB_ENDPOINT_XFER_BULK,
  460. USB_ENDPOINT_XFER_BULK,
  461. };
  462. static struct usbhs_private usbhs_priv __initdata = {
  463. .info = {
  464. .platform_callback = {
  465. .power_ctrl = usbhs_power_ctrl,
  466. .hardware_init = usbhs_hardware_init,
  467. .hardware_exit = usbhs_hardware_exit,
  468. .get_id = usbhs_get_id,
  469. },
  470. .driver_param = {
  471. .buswait_bwait = 4,
  472. .pipe_type = lager_usbhs_pipe_type,
  473. .pipe_size = ARRAY_SIZE(lager_usbhs_pipe_type),
  474. },
  475. }
  476. };
  477. static void __init lager_register_usbhs(void)
  478. {
  479. usb_bind_phy("renesas_usbhs", 0, "usb_phy_rcar_gen2");
  480. platform_device_register_resndata(&platform_bus,
  481. "renesas_usbhs", -1,
  482. usbhs_resources,
  483. ARRAY_SIZE(usbhs_resources),
  484. &usbhs_priv.info,
  485. sizeof(usbhs_priv.info));
  486. }
  487. /* USBHS PHY */
  488. static const struct rcar_gen2_phy_platform_data usbhs_phy_pdata __initconst = {
  489. .chan0_pci = 0, /* Channel 0 is USBHS */
  490. .chan2_pci = 1, /* Channel 2 is PCI USB */
  491. };
  492. static const struct resource usbhs_phy_resources[] __initconst = {
  493. DEFINE_RES_MEM(0xe6590100, 0x100),
  494. };
  495. /* I2C */
  496. static struct i2c_board_info i2c2_devices[] = {
  497. {
  498. I2C_BOARD_INFO("ak4643", 0x12),
  499. }
  500. };
  501. /* Sound */
  502. static struct resource rsnd_resources[] __initdata = {
  503. [RSND_GEN2_SCU] = DEFINE_RES_MEM(0xec500000, 0x1000),
  504. [RSND_GEN2_ADG] = DEFINE_RES_MEM(0xec5a0000, 0x100),
  505. [RSND_GEN2_SSIU] = DEFINE_RES_MEM(0xec540000, 0x1000),
  506. [RSND_GEN2_SSI] = DEFINE_RES_MEM(0xec541000, 0x1280),
  507. };
  508. static struct rsnd_ssi_platform_info rsnd_ssi[] = {
  509. RSND_SSI(0, gic_spi(370), 0),
  510. RSND_SSI(0, gic_spi(371), RSND_SSI_CLK_PIN_SHARE),
  511. };
  512. static struct rsnd_src_platform_info rsnd_src[2] = {
  513. /* no member at this point */
  514. };
  515. static struct rsnd_dai_platform_info rsnd_dai = {
  516. .playback = { .ssi = &rsnd_ssi[0], },
  517. .capture = { .ssi = &rsnd_ssi[1], },
  518. };
  519. static struct rcar_snd_info rsnd_info = {
  520. .flags = RSND_GEN2,
  521. .ssi_info = rsnd_ssi,
  522. .ssi_info_nr = ARRAY_SIZE(rsnd_ssi),
  523. .src_info = rsnd_src,
  524. .src_info_nr = ARRAY_SIZE(rsnd_src),
  525. .dai_info = &rsnd_dai,
  526. .dai_info_nr = 1,
  527. };
  528. static struct asoc_simple_card_info rsnd_card_info = {
  529. .name = "AK4643",
  530. .card = "SSI01-AK4643",
  531. .codec = "ak4642-codec.2-0012",
  532. .platform = "rcar_sound",
  533. .daifmt = SND_SOC_DAIFMT_LEFT_J | SND_SOC_DAIFMT_CBM_CFM,
  534. .cpu_dai = {
  535. .name = "rcar_sound",
  536. },
  537. .codec_dai = {
  538. .name = "ak4642-hifi",
  539. .sysclk = 11289600,
  540. },
  541. };
  542. static void __init lager_add_rsnd_device(void)
  543. {
  544. struct platform_device_info cardinfo = {
  545. .parent = &platform_bus,
  546. .name = "asoc-simple-card",
  547. .id = -1,
  548. .data = &rsnd_card_info,
  549. .size_data = sizeof(struct asoc_simple_card_info),
  550. .dma_mask = DMA_BIT_MASK(32),
  551. };
  552. i2c_register_board_info(2, i2c2_devices,
  553. ARRAY_SIZE(i2c2_devices));
  554. platform_device_register_resndata(
  555. &platform_bus, "rcar_sound", -1,
  556. rsnd_resources, ARRAY_SIZE(rsnd_resources),
  557. &rsnd_info, sizeof(rsnd_info));
  558. platform_device_register_full(&cardinfo);
  559. }
  560. /* SDHI0 */
  561. static struct sh_mobile_sdhi_info sdhi0_info __initdata = {
  562. .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
  563. MMC_CAP_POWER_OFF_CARD,
  564. .tmio_caps2 = MMC_CAP2_NO_MULTI_READ,
  565. .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT |
  566. TMIO_MMC_WRPROTECT_DISABLE,
  567. };
  568. static struct resource sdhi0_resources[] __initdata = {
  569. DEFINE_RES_MEM(0xee100000, 0x200),
  570. DEFINE_RES_IRQ(gic_spi(165)),
  571. };
  572. /* SDHI2 */
  573. static struct sh_mobile_sdhi_info sdhi2_info __initdata = {
  574. .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
  575. MMC_CAP_POWER_OFF_CARD,
  576. .tmio_caps2 = MMC_CAP2_NO_MULTI_READ,
  577. .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT |
  578. TMIO_MMC_WRPROTECT_DISABLE,
  579. };
  580. static struct resource sdhi2_resources[] __initdata = {
  581. DEFINE_RES_MEM(0xee140000, 0x100),
  582. DEFINE_RES_IRQ(gic_spi(167)),
  583. };
  584. /* Internal PCI1 */
  585. static const struct resource pci1_resources[] __initconst = {
  586. DEFINE_RES_MEM(0xee0b0000, 0x10000), /* CFG */
  587. DEFINE_RES_MEM(0xee0a0000, 0x10000), /* MEM */
  588. DEFINE_RES_IRQ(gic_spi(112)),
  589. };
  590. static const struct platform_device_info pci1_info __initconst = {
  591. .parent = &platform_bus,
  592. .name = "pci-rcar-gen2",
  593. .id = 1,
  594. .res = pci1_resources,
  595. .num_res = ARRAY_SIZE(pci1_resources),
  596. .dma_mask = DMA_BIT_MASK(32),
  597. };
  598. static void __init lager_add_usb1_device(void)
  599. {
  600. platform_device_register_full(&pci1_info);
  601. }
  602. /* Internal PCI2 */
  603. static const struct resource pci2_resources[] __initconst = {
  604. DEFINE_RES_MEM(0xee0d0000, 0x10000), /* CFG */
  605. DEFINE_RES_MEM(0xee0c0000, 0x10000), /* MEM */
  606. DEFINE_RES_IRQ(gic_spi(113)),
  607. };
  608. static const struct platform_device_info pci2_info __initconst = {
  609. .parent = &platform_bus,
  610. .name = "pci-rcar-gen2",
  611. .id = 2,
  612. .res = pci2_resources,
  613. .num_res = ARRAY_SIZE(pci2_resources),
  614. .dma_mask = DMA_BIT_MASK(32),
  615. };
  616. static void __init lager_add_usb2_device(void)
  617. {
  618. platform_device_register_full(&pci2_info);
  619. }
  620. static const struct pinctrl_map lager_pinctrl_map[] = {
  621. /* DU (CN10: ARGB0, CN13: LVDS) */
  622. PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
  623. "du_rgb666", "du"),
  624. PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
  625. "du_sync_1", "du"),
  626. PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
  627. "du_clk_out_0", "du"),
  628. /* I2C2 */
  629. PIN_MAP_MUX_GROUP_DEFAULT("i2c-rcar.2", "pfc-r8a7790",
  630. "i2c2", "i2c2"),
  631. /* QSPI */
  632. PIN_MAP_MUX_GROUP_DEFAULT("qspi.0", "pfc-r8a7790",
  633. "qspi_ctrl", "qspi"),
  634. PIN_MAP_MUX_GROUP_DEFAULT("qspi.0", "pfc-r8a7790",
  635. "qspi_data4", "qspi"),
  636. /* SCIF0 (CN19: DEBUG SERIAL0) */
  637. PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.6", "pfc-r8a7790",
  638. "scif0_data", "scif0"),
  639. /* SCIF1 (CN20: DEBUG SERIAL1) */
  640. PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.7", "pfc-r8a7790",
  641. "scif1_data", "scif1"),
  642. /* SDHI0 */
  643. PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7790",
  644. "sdhi0_data4", "sdhi0"),
  645. PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7790",
  646. "sdhi0_ctrl", "sdhi0"),
  647. PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7790",
  648. "sdhi0_cd", "sdhi0"),
  649. /* SDHI2 */
  650. PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-r8a7790",
  651. "sdhi2_data4", "sdhi2"),
  652. PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-r8a7790",
  653. "sdhi2_ctrl", "sdhi2"),
  654. PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-r8a7790",
  655. "sdhi2_cd", "sdhi2"),
  656. /* SSI (CN17: sound) */
  657. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7790",
  658. "ssi0129_ctrl", "ssi"),
  659. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7790",
  660. "ssi0_data", "ssi"),
  661. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7790",
  662. "ssi1_data", "ssi"),
  663. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7790",
  664. "audio_clk_a", "audio_clk"),
  665. /* MMCIF1 */
  666. PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.1", "pfc-r8a7790",
  667. "mmc1_data8", "mmc1"),
  668. PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.1", "pfc-r8a7790",
  669. "mmc1_ctrl", "mmc1"),
  670. /* Ether */
  671. PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
  672. "eth_link", "eth"),
  673. PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
  674. "eth_mdio", "eth"),
  675. PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
  676. "eth_rmii", "eth"),
  677. PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
  678. "intc_irq0", "intc"),
  679. /* VIN0 */
  680. PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790",
  681. "vin0_data24", "vin0"),
  682. PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790",
  683. "vin0_sync", "vin0"),
  684. PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790",
  685. "vin0_field", "vin0"),
  686. PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790",
  687. "vin0_clkenb", "vin0"),
  688. PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790",
  689. "vin0_clk", "vin0"),
  690. /* VIN1 */
  691. PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.1", "pfc-r8a7790",
  692. "vin1_data8", "vin1"),
  693. PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.1", "pfc-r8a7790",
  694. "vin1_clk", "vin1"),
  695. /* USB0 */
  696. PIN_MAP_MUX_GROUP_DEFAULT("renesas_usbhs", "pfc-r8a7790",
  697. "usb0_ovc_vbus", "usb0"),
  698. /* USB1 */
  699. PIN_MAP_MUX_GROUP_DEFAULT("pci-rcar-gen2.1", "pfc-r8a7790",
  700. "usb1", "usb1"),
  701. /* USB2 */
  702. PIN_MAP_MUX_GROUP_DEFAULT("pci-rcar-gen2.2", "pfc-r8a7790",
  703. "usb2", "usb2"),
  704. };
  705. static void __init lager_add_standard_devices(void)
  706. {
  707. int fixed_regulator_idx = 0;
  708. int gpio_regulator_idx = 0;
  709. r8a7790_clock_init();
  710. pinctrl_register_mappings(lager_pinctrl_map,
  711. ARRAY_SIZE(lager_pinctrl_map));
  712. r8a7790_pinmux_init();
  713. r8a7790_add_standard_devices();
  714. platform_device_register_data(&platform_bus, "leds-gpio", -1,
  715. &lager_leds_pdata,
  716. sizeof(lager_leds_pdata));
  717. platform_device_register_data(&platform_bus, "gpio-keys", -1,
  718. &lager_keys_pdata,
  719. sizeof(lager_keys_pdata));
  720. regulator_register_always_on(fixed_regulator_idx++,
  721. "fixed-3.3V", fixed3v3_power_consumers,
  722. ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
  723. platform_device_register_resndata(&platform_bus, "sh_mmcif", 1,
  724. mmcif1_resources, ARRAY_SIZE(mmcif1_resources),
  725. &mmcif1_pdata, sizeof(mmcif1_pdata));
  726. platform_device_register_full(&ether_info);
  727. lager_add_du_device();
  728. platform_device_register_resndata(&platform_bus, "qspi", 0,
  729. qspi_resources,
  730. ARRAY_SIZE(qspi_resources),
  731. &qspi_pdata, sizeof(qspi_pdata));
  732. spi_register_board_info(spi_info, ARRAY_SIZE(spi_info));
  733. platform_device_register_data(&platform_bus, "reg-fixed-voltage", fixed_regulator_idx++,
  734. &vcc_sdhi0_info, sizeof(struct fixed_voltage_config));
  735. platform_device_register_data(&platform_bus, "reg-fixed-voltage", fixed_regulator_idx++,
  736. &vcc_sdhi2_info, sizeof(struct fixed_voltage_config));
  737. platform_device_register_data(&platform_bus, "gpio-regulator", gpio_regulator_idx++,
  738. &vccq_sdhi0_info, sizeof(struct gpio_regulator_config));
  739. platform_device_register_data(&platform_bus, "gpio-regulator", gpio_regulator_idx++,
  740. &vccq_sdhi2_info, sizeof(struct gpio_regulator_config));
  741. lager_add_camera1_device();
  742. platform_device_register_full(&sata1_info);
  743. platform_device_register_resndata(&platform_bus, "usb_phy_rcar_gen2",
  744. -1, usbhs_phy_resources,
  745. ARRAY_SIZE(usbhs_phy_resources),
  746. &usbhs_phy_pdata,
  747. sizeof(usbhs_phy_pdata));
  748. lager_register_usbhs();
  749. lager_add_usb1_device();
  750. lager_add_usb2_device();
  751. lager_add_rsnd_device();
  752. platform_device_register_resndata(&platform_bus, "sh_mobile_sdhi", 0,
  753. sdhi0_resources, ARRAY_SIZE(sdhi0_resources),
  754. &sdhi0_info, sizeof(struct sh_mobile_sdhi_info));
  755. platform_device_register_resndata(&platform_bus, "sh_mobile_sdhi", 2,
  756. sdhi2_resources, ARRAY_SIZE(sdhi2_resources),
  757. &sdhi2_info, sizeof(struct sh_mobile_sdhi_info));
  758. }
  759. /*
  760. * Ether LEDs on the Lager board are named LINK and ACTIVE which corresponds
  761. * to non-default 01 setting of the Micrel KSZ8041 PHY control register 1 bits
  762. * 14-15. We have to set them back to 01 from the default 00 value each time
  763. * the PHY is reset. It's also important because the PHY's LED0 signal is
  764. * connected to SoC's ETH_LINK signal and in the PHY's default mode it will
  765. * bounce on and off after each packet, which we apparently want to avoid.
  766. */
  767. static int lager_ksz8041_fixup(struct phy_device *phydev)
  768. {
  769. u16 phyctrl1 = phy_read(phydev, 0x1e);
  770. phyctrl1 &= ~0xc000;
  771. phyctrl1 |= 0x4000;
  772. return phy_write(phydev, 0x1e, phyctrl1);
  773. }
  774. static void __init lager_init(void)
  775. {
  776. lager_add_standard_devices();
  777. irq_set_irq_type(irq_pin(0), IRQ_TYPE_LEVEL_LOW);
  778. if (IS_ENABLED(CONFIG_PHYLIB))
  779. phy_register_fixup_for_id("r8a7790-ether-ff:01",
  780. lager_ksz8041_fixup);
  781. }
  782. static const char * const lager_boards_compat_dt[] __initconst = {
  783. "renesas,lager",
  784. NULL,
  785. };
  786. DT_MACHINE_START(LAGER_DT, "lager")
  787. .smp = smp_ops(r8a7790_smp_ops),
  788. .init_early = r8a7790_init_early,
  789. .init_time = rcar_gen2_timer_init,
  790. .init_machine = lager_init,
  791. .init_late = shmobile_init_late,
  792. .dt_compat = lager_boards_compat_dt,
  793. MACHINE_END