board-genmai.c 4.8 KB

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  1. /*
  2. * Genmai board support
  3. *
  4. * Copyright (C) 2013-2014 Renesas Solutions Corp.
  5. * Copyright (C) 2013 Magnus Damm
  6. * Copyright (C) 2014 Cogent Embedded, Inc.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; version 2 of the License.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  20. */
  21. #include <linux/kernel.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/serial_sci.h>
  24. #include <linux/sh_eth.h>
  25. #include <linux/spi/rspi.h>
  26. #include <linux/spi/spi.h>
  27. #include <mach/common.h>
  28. #include <mach/irqs.h>
  29. #include <mach/r7s72100.h>
  30. #include <asm/mach-types.h>
  31. #include <asm/mach/arch.h>
  32. /* Ether */
  33. static const struct sh_eth_plat_data ether_pdata __initconst = {
  34. .phy = 0x00, /* PD60610 */
  35. .edmac_endian = EDMAC_LITTLE_ENDIAN,
  36. .phy_interface = PHY_INTERFACE_MODE_MII,
  37. .no_ether_link = 1
  38. };
  39. static const struct resource ether_resources[] __initconst = {
  40. DEFINE_RES_MEM(0xe8203000, 0x800),
  41. DEFINE_RES_MEM(0xe8204800, 0x200),
  42. DEFINE_RES_IRQ(gic_iid(359)),
  43. };
  44. static const struct platform_device_info ether_info __initconst = {
  45. .parent = &platform_bus,
  46. .name = "r7s72100-ether",
  47. .id = -1,
  48. .res = ether_resources,
  49. .num_res = ARRAY_SIZE(ether_resources),
  50. .data = &ether_pdata,
  51. .size_data = sizeof(ether_pdata),
  52. .dma_mask = DMA_BIT_MASK(32),
  53. };
  54. /* RSPI */
  55. #define RSPI_RESOURCE(idx, baseaddr, irq) \
  56. static const struct resource rspi##idx##_resources[] __initconst = { \
  57. DEFINE_RES_MEM(baseaddr, 0x24), \
  58. DEFINE_RES_IRQ_NAMED(irq, "error"), \
  59. DEFINE_RES_IRQ_NAMED(irq + 1, "rx"), \
  60. DEFINE_RES_IRQ_NAMED(irq + 2, "tx"), \
  61. }
  62. RSPI_RESOURCE(0, 0xe800c800, gic_iid(270));
  63. RSPI_RESOURCE(1, 0xe800d000, gic_iid(273));
  64. RSPI_RESOURCE(2, 0xe800d800, gic_iid(276));
  65. RSPI_RESOURCE(3, 0xe800e000, gic_iid(279));
  66. RSPI_RESOURCE(4, 0xe800e800, gic_iid(282));
  67. static const struct rspi_plat_data rspi_pdata __initconst = {
  68. .num_chipselect = 1,
  69. };
  70. #define r7s72100_register_rspi(idx) \
  71. platform_device_register_resndata(&platform_bus, "rspi-rz", idx, \
  72. rspi##idx##_resources, \
  73. ARRAY_SIZE(rspi##idx##_resources), \
  74. &rspi_pdata, sizeof(rspi_pdata))
  75. static const struct spi_board_info spi_info[] __initconst = {
  76. {
  77. .modalias = "wm8978",
  78. .max_speed_hz = 5000000,
  79. .bus_num = 4,
  80. .chip_select = 0,
  81. },
  82. };
  83. /* SCIF */
  84. #define R7S72100_SCIF(index, baseaddr, irq) \
  85. static const struct plat_sci_port scif##index##_platform_data = { \
  86. .type = PORT_SCIF, \
  87. .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE, \
  88. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \
  89. .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE | \
  90. SCSCR_REIE, \
  91. }; \
  92. \
  93. static struct resource scif##index##_resources[] = { \
  94. DEFINE_RES_MEM(baseaddr, 0x100), \
  95. DEFINE_RES_IRQ(irq + 1), \
  96. DEFINE_RES_IRQ(irq + 2), \
  97. DEFINE_RES_IRQ(irq + 3), \
  98. DEFINE_RES_IRQ(irq), \
  99. } \
  100. R7S72100_SCIF(0, 0xe8007000, gic_iid(221));
  101. R7S72100_SCIF(1, 0xe8007800, gic_iid(225));
  102. R7S72100_SCIF(2, 0xe8008000, gic_iid(229));
  103. R7S72100_SCIF(3, 0xe8008800, gic_iid(233));
  104. R7S72100_SCIF(4, 0xe8009000, gic_iid(237));
  105. R7S72100_SCIF(5, 0xe8009800, gic_iid(241));
  106. R7S72100_SCIF(6, 0xe800a000, gic_iid(245));
  107. R7S72100_SCIF(7, 0xe800a800, gic_iid(249));
  108. #define r7s72100_register_scif(index) \
  109. platform_device_register_resndata(&platform_bus, "sh-sci", index, \
  110. scif##index##_resources, \
  111. ARRAY_SIZE(scif##index##_resources), \
  112. &scif##index##_platform_data, \
  113. sizeof(scif##index##_platform_data))
  114. static void __init genmai_add_standard_devices(void)
  115. {
  116. r7s72100_clock_init();
  117. r7s72100_add_dt_devices();
  118. platform_device_register_full(&ether_info);
  119. r7s72100_register_rspi(0);
  120. r7s72100_register_rspi(1);
  121. r7s72100_register_rspi(2);
  122. r7s72100_register_rspi(3);
  123. r7s72100_register_rspi(4);
  124. spi_register_board_info(spi_info, ARRAY_SIZE(spi_info));
  125. r7s72100_register_scif(0);
  126. r7s72100_register_scif(1);
  127. r7s72100_register_scif(2);
  128. r7s72100_register_scif(3);
  129. r7s72100_register_scif(4);
  130. r7s72100_register_scif(5);
  131. r7s72100_register_scif(6);
  132. r7s72100_register_scif(7);
  133. }
  134. static const char * const genmai_boards_compat_dt[] __initconst = {
  135. "renesas,genmai",
  136. NULL,
  137. };
  138. DT_MACHINE_START(GENMAI_DT, "genmai")
  139. .init_early = r7s72100_init_early,
  140. .init_machine = genmai_add_standard_devices,
  141. .dt_compat = genmai_boards_compat_dt,
  142. MACHINE_END