clock.c 2.1 KB

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  1. /*
  2. * linux/arch/arm/mach-sa1100/clock.c
  3. */
  4. #include <linux/module.h>
  5. #include <linux/kernel.h>
  6. #include <linux/device.h>
  7. #include <linux/list.h>
  8. #include <linux/errno.h>
  9. #include <linux/err.h>
  10. #include <linux/string.h>
  11. #include <linux/clk.h>
  12. #include <linux/spinlock.h>
  13. #include <linux/mutex.h>
  14. #include <linux/io.h>
  15. #include <linux/clkdev.h>
  16. #include <mach/hardware.h>
  17. struct clkops {
  18. void (*enable)(struct clk *);
  19. void (*disable)(struct clk *);
  20. };
  21. struct clk {
  22. const struct clkops *ops;
  23. unsigned int enabled;
  24. };
  25. #define DEFINE_CLK(_name, _ops) \
  26. struct clk clk_##_name = { \
  27. .ops = _ops, \
  28. }
  29. static DEFINE_SPINLOCK(clocks_lock);
  30. /* Dummy clk routine to build generic kernel parts that may be using them */
  31. unsigned long clk_get_rate(struct clk *clk)
  32. {
  33. return 0;
  34. }
  35. EXPORT_SYMBOL(clk_get_rate);
  36. static void clk_gpio27_enable(struct clk *clk)
  37. {
  38. /*
  39. * First, set up the 3.6864MHz clock on GPIO 27 for the SA-1111:
  40. * (SA-1110 Developer's Manual, section 9.1.2.1)
  41. */
  42. GAFR |= GPIO_32_768kHz;
  43. GPDR |= GPIO_32_768kHz;
  44. TUCR = TUCR_3_6864MHz;
  45. }
  46. static void clk_gpio27_disable(struct clk *clk)
  47. {
  48. TUCR = 0;
  49. GPDR &= ~GPIO_32_768kHz;
  50. GAFR &= ~GPIO_32_768kHz;
  51. }
  52. int clk_enable(struct clk *clk)
  53. {
  54. unsigned long flags;
  55. if (clk) {
  56. spin_lock_irqsave(&clocks_lock, flags);
  57. if (clk->enabled++ == 0)
  58. clk->ops->enable(clk);
  59. spin_unlock_irqrestore(&clocks_lock, flags);
  60. }
  61. return 0;
  62. }
  63. EXPORT_SYMBOL(clk_enable);
  64. void clk_disable(struct clk *clk)
  65. {
  66. unsigned long flags;
  67. if (clk) {
  68. WARN_ON(clk->enabled == 0);
  69. spin_lock_irqsave(&clocks_lock, flags);
  70. if (--clk->enabled == 0)
  71. clk->ops->disable(clk);
  72. spin_unlock_irqrestore(&clocks_lock, flags);
  73. }
  74. }
  75. EXPORT_SYMBOL(clk_disable);
  76. const struct clkops clk_gpio27_ops = {
  77. .enable = clk_gpio27_enable,
  78. .disable = clk_gpio27_disable,
  79. };
  80. static DEFINE_CLK(gpio27, &clk_gpio27_ops);
  81. static struct clk_lookup sa11xx_clkregs[] = {
  82. CLKDEV_INIT("sa1111.0", NULL, &clk_gpio27),
  83. CLKDEV_INIT("sa1100-rtc", NULL, NULL),
  84. };
  85. static int __init sa11xx_clk_init(void)
  86. {
  87. clkdev_add_table(sa11xx_clkregs, ARRAY_SIZE(sa11xx_clkregs));
  88. return 0;
  89. }
  90. core_initcall(sa11xx_clk_init);