core.c 10.0 KB

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  1. /*
  2. * linux/arch/arm/mach-realview/core.c
  3. *
  4. * Copyright (C) 1999 - 2003 ARM Limited
  5. * Copyright (C) 2000 Deep Blue Solutions Ltd
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  20. */
  21. #include <linux/init.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/dma-mapping.h>
  24. #include <linux/device.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/amba/bus.h>
  27. #include <linux/amba/clcd.h>
  28. #include <linux/io.h>
  29. #include <linux/smsc911x.h>
  30. #include <linux/ata_platform.h>
  31. #include <linux/amba/mmci.h>
  32. #include <linux/gfp.h>
  33. #include <linux/mtd/physmap.h>
  34. #include <linux/memblock.h>
  35. #include <mach/hardware.h>
  36. #include <asm/irq.h>
  37. #include <asm/mach-types.h>
  38. #include <asm/hardware/arm_timer.h>
  39. #include <asm/hardware/icst.h>
  40. #include <asm/mach/arch.h>
  41. #include <asm/mach/irq.h>
  42. #include <asm/mach/map.h>
  43. #include <mach/platform.h>
  44. #include <mach/irqs.h>
  45. #include <asm/hardware/timer-sp.h>
  46. #include <plat/clcd.h>
  47. #include <plat/sched_clock.h>
  48. #include "core.h"
  49. #define REALVIEW_FLASHCTRL (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_FLASH_OFFSET)
  50. static void realview_flash_set_vpp(struct platform_device *pdev, int on)
  51. {
  52. u32 val;
  53. val = __raw_readl(REALVIEW_FLASHCTRL);
  54. if (on)
  55. val |= REALVIEW_FLASHPROG_FLVPPEN;
  56. else
  57. val &= ~REALVIEW_FLASHPROG_FLVPPEN;
  58. __raw_writel(val, REALVIEW_FLASHCTRL);
  59. }
  60. static struct physmap_flash_data realview_flash_data = {
  61. .width = 4,
  62. .set_vpp = realview_flash_set_vpp,
  63. };
  64. struct platform_device realview_flash_device = {
  65. .name = "physmap-flash",
  66. .id = 0,
  67. .dev = {
  68. .platform_data = &realview_flash_data,
  69. },
  70. };
  71. int realview_flash_register(struct resource *res, u32 num)
  72. {
  73. realview_flash_device.resource = res;
  74. realview_flash_device.num_resources = num;
  75. return platform_device_register(&realview_flash_device);
  76. }
  77. static struct smsc911x_platform_config smsc911x_config = {
  78. .flags = SMSC911X_USE_32BIT,
  79. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
  80. .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
  81. .phy_interface = PHY_INTERFACE_MODE_MII,
  82. };
  83. static struct platform_device realview_eth_device = {
  84. .name = "smsc911x",
  85. .id = 0,
  86. .num_resources = 2,
  87. };
  88. int realview_eth_register(const char *name, struct resource *res)
  89. {
  90. if (name)
  91. realview_eth_device.name = name;
  92. realview_eth_device.resource = res;
  93. if (strcmp(realview_eth_device.name, "smsc911x") == 0)
  94. realview_eth_device.dev.platform_data = &smsc911x_config;
  95. return platform_device_register(&realview_eth_device);
  96. }
  97. struct platform_device realview_usb_device = {
  98. .name = "isp1760",
  99. .num_resources = 2,
  100. };
  101. int realview_usb_register(struct resource *res)
  102. {
  103. realview_usb_device.resource = res;
  104. return platform_device_register(&realview_usb_device);
  105. }
  106. static struct pata_platform_info pata_platform_data = {
  107. .ioport_shift = 1,
  108. };
  109. static struct resource pata_resources[] = {
  110. [0] = {
  111. .start = REALVIEW_CF_BASE,
  112. .end = REALVIEW_CF_BASE + 0xff,
  113. .flags = IORESOURCE_MEM,
  114. },
  115. [1] = {
  116. .start = REALVIEW_CF_BASE + 0x100,
  117. .end = REALVIEW_CF_BASE + SZ_4K - 1,
  118. .flags = IORESOURCE_MEM,
  119. },
  120. };
  121. struct platform_device realview_cf_device = {
  122. .name = "pata_platform",
  123. .id = -1,
  124. .num_resources = ARRAY_SIZE(pata_resources),
  125. .resource = pata_resources,
  126. .dev = {
  127. .platform_data = &pata_platform_data,
  128. },
  129. };
  130. static struct resource realview_leds_resources[] = {
  131. {
  132. .start = REALVIEW_SYS_BASE + REALVIEW_SYS_LED_OFFSET,
  133. .end = REALVIEW_SYS_BASE + REALVIEW_SYS_LED_OFFSET + 4,
  134. .flags = IORESOURCE_MEM,
  135. },
  136. };
  137. struct platform_device realview_leds_device = {
  138. .name = "versatile-leds",
  139. .id = -1,
  140. .num_resources = ARRAY_SIZE(realview_leds_resources),
  141. .resource = realview_leds_resources,
  142. };
  143. static struct resource realview_i2c_resource = {
  144. .start = REALVIEW_I2C_BASE,
  145. .end = REALVIEW_I2C_BASE + SZ_4K - 1,
  146. .flags = IORESOURCE_MEM,
  147. };
  148. struct platform_device realview_i2c_device = {
  149. .name = "versatile-i2c",
  150. .id = 0,
  151. .num_resources = 1,
  152. .resource = &realview_i2c_resource,
  153. };
  154. static struct i2c_board_info realview_i2c_board_info[] = {
  155. {
  156. I2C_BOARD_INFO("ds1338", 0xd0 >> 1),
  157. },
  158. };
  159. static int __init realview_i2c_init(void)
  160. {
  161. return i2c_register_board_info(0, realview_i2c_board_info,
  162. ARRAY_SIZE(realview_i2c_board_info));
  163. }
  164. arch_initcall(realview_i2c_init);
  165. #define REALVIEW_SYSMCI (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_MCI_OFFSET)
  166. /*
  167. * This is only used if GPIOLIB support is disabled
  168. */
  169. static unsigned int realview_mmc_status(struct device *dev)
  170. {
  171. struct amba_device *adev = container_of(dev, struct amba_device, dev);
  172. u32 mask;
  173. if (machine_is_realview_pb1176()) {
  174. static bool inserted = false;
  175. /*
  176. * The PB1176 does not have the status register,
  177. * assume it is inserted at startup, then invert
  178. * for each call so card insertion/removal will
  179. * be detected anyway. This will not be called if
  180. * GPIO on PL061 is active, which is the proper
  181. * way to do this on the PB1176.
  182. */
  183. inserted = !inserted;
  184. return inserted ? 0 : 1;
  185. }
  186. if (adev->res.start == REALVIEW_MMCI0_BASE)
  187. mask = 1;
  188. else
  189. mask = 2;
  190. return readl(REALVIEW_SYSMCI) & mask;
  191. }
  192. struct mmci_platform_data realview_mmc0_plat_data = {
  193. .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
  194. .status = realview_mmc_status,
  195. .gpio_wp = 17,
  196. .gpio_cd = 16,
  197. .cd_invert = true,
  198. };
  199. struct mmci_platform_data realview_mmc1_plat_data = {
  200. .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
  201. .status = realview_mmc_status,
  202. .gpio_wp = 19,
  203. .gpio_cd = 18,
  204. .cd_invert = true,
  205. };
  206. void __init realview_init_early(void)
  207. {
  208. void __iomem *sys = __io_address(REALVIEW_SYS_BASE);
  209. versatile_sched_clock_init(sys + REALVIEW_SYS_24MHz_OFFSET, 24000000);
  210. }
  211. /*
  212. * CLCD support.
  213. */
  214. #define SYS_CLCD_NLCDIOON (1 << 2)
  215. #define SYS_CLCD_VDDPOSSWITCH (1 << 3)
  216. #define SYS_CLCD_PWR3V5SWITCH (1 << 4)
  217. #define SYS_CLCD_ID_MASK (0x1f << 8)
  218. #define SYS_CLCD_ID_SANYO_3_8 (0x00 << 8)
  219. #define SYS_CLCD_ID_UNKNOWN_8_4 (0x01 << 8)
  220. #define SYS_CLCD_ID_EPSON_2_2 (0x02 << 8)
  221. #define SYS_CLCD_ID_SANYO_2_5 (0x07 << 8)
  222. #define SYS_CLCD_ID_VGA (0x1f << 8)
  223. /*
  224. * Disable all display connectors on the interface module.
  225. */
  226. static void realview_clcd_disable(struct clcd_fb *fb)
  227. {
  228. void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET;
  229. u32 val;
  230. val = readl(sys_clcd);
  231. val &= ~SYS_CLCD_NLCDIOON | SYS_CLCD_PWR3V5SWITCH;
  232. writel(val, sys_clcd);
  233. }
  234. /*
  235. * Enable the relevant connector on the interface module.
  236. */
  237. static void realview_clcd_enable(struct clcd_fb *fb)
  238. {
  239. void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET;
  240. u32 val;
  241. /*
  242. * Enable the PSUs
  243. */
  244. val = readl(sys_clcd);
  245. val |= SYS_CLCD_NLCDIOON | SYS_CLCD_PWR3V5SWITCH;
  246. writel(val, sys_clcd);
  247. }
  248. /*
  249. * Detect which LCD panel is connected, and return the appropriate
  250. * clcd_panel structure. Note: we do not have any information on
  251. * the required timings for the 8.4in panel, so we presently assume
  252. * VGA timings.
  253. */
  254. static int realview_clcd_setup(struct clcd_fb *fb)
  255. {
  256. void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET;
  257. const char *panel_name, *vga_panel_name;
  258. unsigned long framesize;
  259. u32 val;
  260. if (machine_is_realview_eb()) {
  261. /* VGA, 16bpp */
  262. framesize = 640 * 480 * 2;
  263. vga_panel_name = "VGA";
  264. } else {
  265. /* XVGA, 16bpp */
  266. framesize = 1024 * 768 * 2;
  267. vga_panel_name = "XVGA";
  268. }
  269. val = readl(sys_clcd) & SYS_CLCD_ID_MASK;
  270. if (val == SYS_CLCD_ID_SANYO_3_8)
  271. panel_name = "Sanyo TM38QV67A02A";
  272. else if (val == SYS_CLCD_ID_SANYO_2_5)
  273. panel_name = "Sanyo QVGA Portrait";
  274. else if (val == SYS_CLCD_ID_EPSON_2_2)
  275. panel_name = "Epson L2F50113T00";
  276. else if (val == SYS_CLCD_ID_VGA)
  277. panel_name = vga_panel_name;
  278. else {
  279. pr_err("CLCD: unknown LCD panel ID 0x%08x, using VGA\n", val);
  280. panel_name = vga_panel_name;
  281. }
  282. fb->panel = versatile_clcd_get_panel(panel_name);
  283. if (!fb->panel)
  284. return -EINVAL;
  285. return versatile_clcd_setup_dma(fb, framesize);
  286. }
  287. struct clcd_board clcd_plat_data = {
  288. .name = "RealView",
  289. .caps = CLCD_CAP_ALL,
  290. .check = clcdfb_check,
  291. .decode = clcdfb_decode,
  292. .disable = realview_clcd_disable,
  293. .enable = realview_clcd_enable,
  294. .setup = realview_clcd_setup,
  295. .mmap = versatile_clcd_mmap_dma,
  296. .remove = versatile_clcd_remove_dma,
  297. };
  298. /*
  299. * Where is the timer (VA)?
  300. */
  301. void __iomem *timer0_va_base;
  302. void __iomem *timer1_va_base;
  303. void __iomem *timer2_va_base;
  304. void __iomem *timer3_va_base;
  305. /*
  306. * Set up the clock source and clock events devices
  307. */
  308. void __init realview_timer_init(unsigned int timer_irq)
  309. {
  310. u32 val;
  311. /*
  312. * set clock frequency:
  313. * REALVIEW_REFCLK is 32KHz
  314. * REALVIEW_TIMCLK is 1MHz
  315. */
  316. val = readl(__io_address(REALVIEW_SCTL_BASE));
  317. writel((REALVIEW_TIMCLK << REALVIEW_TIMER1_EnSel) |
  318. (REALVIEW_TIMCLK << REALVIEW_TIMER2_EnSel) |
  319. (REALVIEW_TIMCLK << REALVIEW_TIMER3_EnSel) |
  320. (REALVIEW_TIMCLK << REALVIEW_TIMER4_EnSel) | val,
  321. __io_address(REALVIEW_SCTL_BASE));
  322. /*
  323. * Initialise to a known state (all timers off)
  324. */
  325. writel(0, timer0_va_base + TIMER_CTRL);
  326. writel(0, timer1_va_base + TIMER_CTRL);
  327. writel(0, timer2_va_base + TIMER_CTRL);
  328. writel(0, timer3_va_base + TIMER_CTRL);
  329. sp804_clocksource_init(timer3_va_base, "timer3");
  330. sp804_clockevents_init(timer0_va_base, timer_irq, "timer0");
  331. }
  332. /*
  333. * Setup the memory banks.
  334. */
  335. void realview_fixup(struct tag *tags, char **from)
  336. {
  337. /*
  338. * Most RealView platforms have 512MB contiguous RAM at 0x70000000.
  339. * Half of this is mirrored at 0.
  340. */
  341. #ifdef CONFIG_REALVIEW_HIGH_PHYS_OFFSET
  342. memblock_add(0x70000000, SZ_512M);
  343. #else
  344. memblock_add(0, SZ_256M);
  345. #endif
  346. }