smp.c 16 KB

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  1. /*
  2. * linux/arch/arm/kernel/smp.c
  3. *
  4. * Copyright (C) 2002 ARM Limited, All Rights Reserved.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/module.h>
  11. #include <linux/delay.h>
  12. #include <linux/init.h>
  13. #include <linux/spinlock.h>
  14. #include <linux/sched.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/cache.h>
  17. #include <linux/profile.h>
  18. #include <linux/errno.h>
  19. #include <linux/mm.h>
  20. #include <linux/err.h>
  21. #include <linux/cpu.h>
  22. #include <linux/seq_file.h>
  23. #include <linux/irq.h>
  24. #include <linux/percpu.h>
  25. #include <linux/clockchips.h>
  26. #include <linux/completion.h>
  27. #include <linux/cpufreq.h>
  28. #include <linux/irq_work.h>
  29. #include <linux/atomic.h>
  30. #include <asm/smp.h>
  31. #include <asm/cacheflush.h>
  32. #include <asm/cpu.h>
  33. #include <asm/cputype.h>
  34. #include <asm/exception.h>
  35. #include <asm/idmap.h>
  36. #include <asm/topology.h>
  37. #include <asm/mmu_context.h>
  38. #include <asm/pgtable.h>
  39. #include <asm/pgalloc.h>
  40. #include <asm/processor.h>
  41. #include <asm/sections.h>
  42. #include <asm/tlbflush.h>
  43. #include <asm/ptrace.h>
  44. #include <asm/smp_plat.h>
  45. #include <asm/virt.h>
  46. #include <asm/mach/arch.h>
  47. #include <asm/mpu.h>
  48. /*
  49. * as from 2.5, kernels no longer have an init_tasks structure
  50. * so we need some other way of telling a new secondary core
  51. * where to place its SVC stack
  52. */
  53. struct secondary_data secondary_data;
  54. /*
  55. * control for which core is the next to come out of the secondary
  56. * boot "holding pen"
  57. */
  58. volatile int pen_release = -1;
  59. enum ipi_msg_type {
  60. IPI_WAKEUP,
  61. IPI_TIMER,
  62. IPI_RESCHEDULE,
  63. IPI_CALL_FUNC,
  64. IPI_CALL_FUNC_SINGLE,
  65. IPI_CPU_STOP,
  66. IPI_IRQ_WORK,
  67. IPI_COMPLETION,
  68. };
  69. static DECLARE_COMPLETION(cpu_running);
  70. static struct smp_operations smp_ops;
  71. void __init smp_set_ops(struct smp_operations *ops)
  72. {
  73. if (ops)
  74. smp_ops = *ops;
  75. };
  76. static unsigned long get_arch_pgd(pgd_t *pgd)
  77. {
  78. phys_addr_t pgdir = virt_to_idmap(pgd);
  79. BUG_ON(pgdir & ARCH_PGD_MASK);
  80. return pgdir >> ARCH_PGD_SHIFT;
  81. }
  82. int __cpu_up(unsigned int cpu, struct task_struct *idle)
  83. {
  84. int ret;
  85. /*
  86. * We need to tell the secondary core where to find
  87. * its stack and the page tables.
  88. */
  89. secondary_data.stack = task_stack_page(idle) + THREAD_START_SP;
  90. #ifdef CONFIG_ARM_MPU
  91. secondary_data.mpu_rgn_szr = mpu_rgn_info.rgns[MPU_RAM_REGION].drsr;
  92. #endif
  93. #ifdef CONFIG_MMU
  94. secondary_data.pgdir = get_arch_pgd(idmap_pgd);
  95. secondary_data.swapper_pg_dir = get_arch_pgd(swapper_pg_dir);
  96. #endif
  97. sync_cache_w(&secondary_data);
  98. /*
  99. * Now bring the CPU into our world.
  100. */
  101. ret = boot_secondary(cpu, idle);
  102. if (ret == 0) {
  103. /*
  104. * CPU was successfully started, wait for it
  105. * to come online or time out.
  106. */
  107. wait_for_completion_timeout(&cpu_running,
  108. msecs_to_jiffies(1000));
  109. if (!cpu_online(cpu)) {
  110. pr_crit("CPU%u: failed to come online\n", cpu);
  111. ret = -EIO;
  112. }
  113. } else {
  114. pr_err("CPU%u: failed to boot: %d\n", cpu, ret);
  115. }
  116. memset(&secondary_data, 0, sizeof(secondary_data));
  117. return ret;
  118. }
  119. /* platform specific SMP operations */
  120. void __init smp_init_cpus(void)
  121. {
  122. if (smp_ops.smp_init_cpus)
  123. smp_ops.smp_init_cpus();
  124. }
  125. int boot_secondary(unsigned int cpu, struct task_struct *idle)
  126. {
  127. if (smp_ops.smp_boot_secondary)
  128. return smp_ops.smp_boot_secondary(cpu, idle);
  129. return -ENOSYS;
  130. }
  131. int platform_can_cpu_hotplug(void)
  132. {
  133. #ifdef CONFIG_HOTPLUG_CPU
  134. if (smp_ops.cpu_kill)
  135. return 1;
  136. #endif
  137. return 0;
  138. }
  139. #ifdef CONFIG_HOTPLUG_CPU
  140. static int platform_cpu_kill(unsigned int cpu)
  141. {
  142. if (smp_ops.cpu_kill)
  143. return smp_ops.cpu_kill(cpu);
  144. return 1;
  145. }
  146. static int platform_cpu_disable(unsigned int cpu)
  147. {
  148. if (smp_ops.cpu_disable)
  149. return smp_ops.cpu_disable(cpu);
  150. /*
  151. * By default, allow disabling all CPUs except the first one,
  152. * since this is special on a lot of platforms, e.g. because
  153. * of clock tick interrupts.
  154. */
  155. return cpu == 0 ? -EPERM : 0;
  156. }
  157. /*
  158. * __cpu_disable runs on the processor to be shutdown.
  159. */
  160. int __cpu_disable(void)
  161. {
  162. unsigned int cpu = smp_processor_id();
  163. int ret;
  164. ret = platform_cpu_disable(cpu);
  165. if (ret)
  166. return ret;
  167. /*
  168. * Take this CPU offline. Once we clear this, we can't return,
  169. * and we must not schedule until we're ready to give up the cpu.
  170. */
  171. set_cpu_online(cpu, false);
  172. /*
  173. * OK - migrate IRQs away from this CPU
  174. */
  175. migrate_irqs();
  176. /*
  177. * Flush user cache and TLB mappings, and then remove this CPU
  178. * from the vm mask set of all processes.
  179. *
  180. * Caches are flushed to the Level of Unification Inner Shareable
  181. * to write-back dirty lines to unified caches shared by all CPUs.
  182. */
  183. flush_cache_louis();
  184. local_flush_tlb_all();
  185. clear_tasks_mm_cpumask(cpu);
  186. return 0;
  187. }
  188. static DECLARE_COMPLETION(cpu_died);
  189. /*
  190. * called on the thread which is asking for a CPU to be shutdown -
  191. * waits until shutdown has completed, or it is timed out.
  192. */
  193. void __cpu_die(unsigned int cpu)
  194. {
  195. if (!wait_for_completion_timeout(&cpu_died, msecs_to_jiffies(5000))) {
  196. pr_err("CPU%u: cpu didn't die\n", cpu);
  197. return;
  198. }
  199. printk(KERN_NOTICE "CPU%u: shutdown\n", cpu);
  200. /*
  201. * platform_cpu_kill() is generally expected to do the powering off
  202. * and/or cutting of clocks to the dying CPU. Optionally, this may
  203. * be done by the CPU which is dying in preference to supporting
  204. * this call, but that means there is _no_ synchronisation between
  205. * the requesting CPU and the dying CPU actually losing power.
  206. */
  207. if (!platform_cpu_kill(cpu))
  208. printk("CPU%u: unable to kill\n", cpu);
  209. }
  210. /*
  211. * Called from the idle thread for the CPU which has been shutdown.
  212. *
  213. * Note that we disable IRQs here, but do not re-enable them
  214. * before returning to the caller. This is also the behaviour
  215. * of the other hotplug-cpu capable cores, so presumably coming
  216. * out of idle fixes this.
  217. */
  218. void __ref cpu_die(void)
  219. {
  220. unsigned int cpu = smp_processor_id();
  221. idle_task_exit();
  222. local_irq_disable();
  223. /*
  224. * Flush the data out of the L1 cache for this CPU. This must be
  225. * before the completion to ensure that data is safely written out
  226. * before platform_cpu_kill() gets called - which may disable
  227. * *this* CPU and power down its cache.
  228. */
  229. flush_cache_louis();
  230. /*
  231. * Tell __cpu_die() that this CPU is now safe to dispose of. Once
  232. * this returns, power and/or clocks can be removed at any point
  233. * from this CPU and its cache by platform_cpu_kill().
  234. */
  235. complete(&cpu_died);
  236. /*
  237. * Ensure that the cache lines associated with that completion are
  238. * written out. This covers the case where _this_ CPU is doing the
  239. * powering down, to ensure that the completion is visible to the
  240. * CPU waiting for this one.
  241. */
  242. flush_cache_louis();
  243. /*
  244. * The actual CPU shutdown procedure is at least platform (if not
  245. * CPU) specific. This may remove power, or it may simply spin.
  246. *
  247. * Platforms are generally expected *NOT* to return from this call,
  248. * although there are some which do because they have no way to
  249. * power down the CPU. These platforms are the _only_ reason we
  250. * have a return path which uses the fragment of assembly below.
  251. *
  252. * The return path should not be used for platforms which can
  253. * power off the CPU.
  254. */
  255. if (smp_ops.cpu_die)
  256. smp_ops.cpu_die(cpu);
  257. pr_warn("CPU%u: smp_ops.cpu_die() returned, trying to resuscitate\n",
  258. cpu);
  259. /*
  260. * Do not return to the idle loop - jump back to the secondary
  261. * cpu initialisation. There's some initialisation which needs
  262. * to be repeated to undo the effects of taking the CPU offline.
  263. */
  264. __asm__("mov sp, %0\n"
  265. " mov fp, #0\n"
  266. " b secondary_start_kernel"
  267. :
  268. : "r" (task_stack_page(current) + THREAD_SIZE - 8));
  269. }
  270. #endif /* CONFIG_HOTPLUG_CPU */
  271. /*
  272. * Called by both boot and secondaries to move global data into
  273. * per-processor storage.
  274. */
  275. static void smp_store_cpu_info(unsigned int cpuid)
  276. {
  277. struct cpuinfo_arm *cpu_info = &per_cpu(cpu_data, cpuid);
  278. cpu_info->loops_per_jiffy = loops_per_jiffy;
  279. cpu_info->cpuid = read_cpuid_id();
  280. store_cpu_topology(cpuid);
  281. }
  282. /*
  283. * This is the secondary CPU boot entry. We're using this CPUs
  284. * idle thread stack, but a set of temporary page tables.
  285. */
  286. asmlinkage void secondary_start_kernel(void)
  287. {
  288. struct mm_struct *mm = &init_mm;
  289. unsigned int cpu;
  290. /*
  291. * The identity mapping is uncached (strongly ordered), so
  292. * switch away from it before attempting any exclusive accesses.
  293. */
  294. cpu_switch_mm(mm->pgd, mm);
  295. local_flush_bp_all();
  296. enter_lazy_tlb(mm, current);
  297. local_flush_tlb_all();
  298. /*
  299. * All kernel threads share the same mm context; grab a
  300. * reference and switch to it.
  301. */
  302. cpu = smp_processor_id();
  303. atomic_inc(&mm->mm_count);
  304. current->active_mm = mm;
  305. cpumask_set_cpu(cpu, mm_cpumask(mm));
  306. cpu_init();
  307. printk("CPU%u: Booted secondary processor\n", cpu);
  308. preempt_disable();
  309. trace_hardirqs_off();
  310. /*
  311. * Give the platform a chance to do its own initialisation.
  312. */
  313. if (smp_ops.smp_secondary_init)
  314. smp_ops.smp_secondary_init(cpu);
  315. notify_cpu_starting(cpu);
  316. calibrate_delay();
  317. smp_store_cpu_info(cpu);
  318. /*
  319. * OK, now it's safe to let the boot CPU continue. Wait for
  320. * the CPU migration code to notice that the CPU is online
  321. * before we continue - which happens after __cpu_up returns.
  322. */
  323. set_cpu_online(cpu, true);
  324. complete(&cpu_running);
  325. local_irq_enable();
  326. local_fiq_enable();
  327. /*
  328. * OK, it's off to the idle thread for us
  329. */
  330. cpu_startup_entry(CPUHP_ONLINE);
  331. }
  332. void __init smp_cpus_done(unsigned int max_cpus)
  333. {
  334. printk(KERN_INFO "SMP: Total of %d processors activated.\n",
  335. num_online_cpus());
  336. hyp_mode_check();
  337. }
  338. void __init smp_prepare_boot_cpu(void)
  339. {
  340. set_my_cpu_offset(per_cpu_offset(smp_processor_id()));
  341. }
  342. void __init smp_prepare_cpus(unsigned int max_cpus)
  343. {
  344. unsigned int ncores = num_possible_cpus();
  345. init_cpu_topology();
  346. smp_store_cpu_info(smp_processor_id());
  347. /*
  348. * are we trying to boot more cores than exist?
  349. */
  350. if (max_cpus > ncores)
  351. max_cpus = ncores;
  352. if (ncores > 1 && max_cpus) {
  353. /*
  354. * Initialise the present map, which describes the set of CPUs
  355. * actually populated at the present time. A platform should
  356. * re-initialize the map in the platforms smp_prepare_cpus()
  357. * if present != possible (e.g. physical hotplug).
  358. */
  359. init_cpu_present(cpu_possible_mask);
  360. /*
  361. * Initialise the SCU if there are more than one CPU
  362. * and let them know where to start.
  363. */
  364. if (smp_ops.smp_prepare_cpus)
  365. smp_ops.smp_prepare_cpus(max_cpus);
  366. }
  367. }
  368. static void (*smp_cross_call)(const struct cpumask *, unsigned int);
  369. void __init set_smp_cross_call(void (*fn)(const struct cpumask *, unsigned int))
  370. {
  371. if (!smp_cross_call)
  372. smp_cross_call = fn;
  373. }
  374. void arch_send_call_function_ipi_mask(const struct cpumask *mask)
  375. {
  376. smp_cross_call(mask, IPI_CALL_FUNC);
  377. }
  378. void arch_send_wakeup_ipi_mask(const struct cpumask *mask)
  379. {
  380. smp_cross_call(mask, IPI_WAKEUP);
  381. }
  382. void arch_send_call_function_single_ipi(int cpu)
  383. {
  384. smp_cross_call(cpumask_of(cpu), IPI_CALL_FUNC_SINGLE);
  385. }
  386. #ifdef CONFIG_IRQ_WORK
  387. void arch_irq_work_raise(void)
  388. {
  389. if (is_smp())
  390. smp_cross_call(cpumask_of(smp_processor_id()), IPI_IRQ_WORK);
  391. }
  392. #endif
  393. static const char *ipi_types[NR_IPI] = {
  394. #define S(x,s) [x] = s
  395. S(IPI_WAKEUP, "CPU wakeup interrupts"),
  396. S(IPI_TIMER, "Timer broadcast interrupts"),
  397. S(IPI_RESCHEDULE, "Rescheduling interrupts"),
  398. S(IPI_CALL_FUNC, "Function call interrupts"),
  399. S(IPI_CALL_FUNC_SINGLE, "Single function call interrupts"),
  400. S(IPI_CPU_STOP, "CPU stop interrupts"),
  401. S(IPI_IRQ_WORK, "IRQ work interrupts"),
  402. S(IPI_COMPLETION, "completion interrupts"),
  403. };
  404. void show_ipi_list(struct seq_file *p, int prec)
  405. {
  406. unsigned int cpu, i;
  407. for (i = 0; i < NR_IPI; i++) {
  408. seq_printf(p, "%*s%u: ", prec - 1, "IPI", i);
  409. for_each_online_cpu(cpu)
  410. seq_printf(p, "%10u ",
  411. __get_irq_stat(cpu, ipi_irqs[i]));
  412. seq_printf(p, " %s\n", ipi_types[i]);
  413. }
  414. }
  415. u64 smp_irq_stat_cpu(unsigned int cpu)
  416. {
  417. u64 sum = 0;
  418. int i;
  419. for (i = 0; i < NR_IPI; i++)
  420. sum += __get_irq_stat(cpu, ipi_irqs[i]);
  421. return sum;
  422. }
  423. #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
  424. void tick_broadcast(const struct cpumask *mask)
  425. {
  426. smp_cross_call(mask, IPI_TIMER);
  427. }
  428. #endif
  429. static DEFINE_RAW_SPINLOCK(stop_lock);
  430. /*
  431. * ipi_cpu_stop - handle IPI from smp_send_stop()
  432. */
  433. static void ipi_cpu_stop(unsigned int cpu)
  434. {
  435. if (system_state == SYSTEM_BOOTING ||
  436. system_state == SYSTEM_RUNNING) {
  437. raw_spin_lock(&stop_lock);
  438. printk(KERN_CRIT "CPU%u: stopping\n", cpu);
  439. dump_stack();
  440. raw_spin_unlock(&stop_lock);
  441. }
  442. set_cpu_online(cpu, false);
  443. local_fiq_disable();
  444. local_irq_disable();
  445. while (1)
  446. cpu_relax();
  447. }
  448. static DEFINE_PER_CPU(struct completion *, cpu_completion);
  449. int register_ipi_completion(struct completion *completion, int cpu)
  450. {
  451. per_cpu(cpu_completion, cpu) = completion;
  452. return IPI_COMPLETION;
  453. }
  454. static void ipi_complete(unsigned int cpu)
  455. {
  456. complete(per_cpu(cpu_completion, cpu));
  457. }
  458. /*
  459. * Main handler for inter-processor interrupts
  460. */
  461. asmlinkage void __exception_irq_entry do_IPI(int ipinr, struct pt_regs *regs)
  462. {
  463. handle_IPI(ipinr, regs);
  464. }
  465. void handle_IPI(int ipinr, struct pt_regs *regs)
  466. {
  467. unsigned int cpu = smp_processor_id();
  468. struct pt_regs *old_regs = set_irq_regs(regs);
  469. if (ipinr < NR_IPI)
  470. __inc_irq_stat(cpu, ipi_irqs[ipinr]);
  471. switch (ipinr) {
  472. case IPI_WAKEUP:
  473. break;
  474. #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
  475. case IPI_TIMER:
  476. irq_enter();
  477. tick_receive_broadcast();
  478. irq_exit();
  479. break;
  480. #endif
  481. case IPI_RESCHEDULE:
  482. scheduler_ipi();
  483. break;
  484. case IPI_CALL_FUNC:
  485. irq_enter();
  486. generic_smp_call_function_interrupt();
  487. irq_exit();
  488. break;
  489. case IPI_CALL_FUNC_SINGLE:
  490. irq_enter();
  491. generic_smp_call_function_single_interrupt();
  492. irq_exit();
  493. break;
  494. case IPI_CPU_STOP:
  495. irq_enter();
  496. ipi_cpu_stop(cpu);
  497. irq_exit();
  498. break;
  499. #ifdef CONFIG_IRQ_WORK
  500. case IPI_IRQ_WORK:
  501. irq_enter();
  502. irq_work_run();
  503. irq_exit();
  504. break;
  505. #endif
  506. case IPI_COMPLETION:
  507. irq_enter();
  508. ipi_complete(cpu);
  509. irq_exit();
  510. break;
  511. default:
  512. printk(KERN_CRIT "CPU%u: Unknown IPI message 0x%x\n",
  513. cpu, ipinr);
  514. break;
  515. }
  516. set_irq_regs(old_regs);
  517. }
  518. void smp_send_reschedule(int cpu)
  519. {
  520. smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE);
  521. }
  522. void smp_send_stop(void)
  523. {
  524. unsigned long timeout;
  525. struct cpumask mask;
  526. cpumask_copy(&mask, cpu_online_mask);
  527. cpumask_clear_cpu(smp_processor_id(), &mask);
  528. if (!cpumask_empty(&mask))
  529. smp_cross_call(&mask, IPI_CPU_STOP);
  530. /* Wait up to one second for other CPUs to stop */
  531. timeout = USEC_PER_SEC;
  532. while (num_online_cpus() > 1 && timeout--)
  533. udelay(1);
  534. if (num_online_cpus() > 1)
  535. pr_warning("SMP: failed to stop secondary CPUs\n");
  536. }
  537. /*
  538. * not supported here
  539. */
  540. int setup_profiling_timer(unsigned int multiplier)
  541. {
  542. return -EINVAL;
  543. }
  544. #ifdef CONFIG_CPU_FREQ
  545. static DEFINE_PER_CPU(unsigned long, l_p_j_ref);
  546. static DEFINE_PER_CPU(unsigned long, l_p_j_ref_freq);
  547. static unsigned long global_l_p_j_ref;
  548. static unsigned long global_l_p_j_ref_freq;
  549. static int cpufreq_callback(struct notifier_block *nb,
  550. unsigned long val, void *data)
  551. {
  552. struct cpufreq_freqs *freq = data;
  553. int cpu = freq->cpu;
  554. if (freq->flags & CPUFREQ_CONST_LOOPS)
  555. return NOTIFY_OK;
  556. if (!per_cpu(l_p_j_ref, cpu)) {
  557. per_cpu(l_p_j_ref, cpu) =
  558. per_cpu(cpu_data, cpu).loops_per_jiffy;
  559. per_cpu(l_p_j_ref_freq, cpu) = freq->old;
  560. if (!global_l_p_j_ref) {
  561. global_l_p_j_ref = loops_per_jiffy;
  562. global_l_p_j_ref_freq = freq->old;
  563. }
  564. }
  565. if ((val == CPUFREQ_PRECHANGE && freq->old < freq->new) ||
  566. (val == CPUFREQ_POSTCHANGE && freq->old > freq->new)) {
  567. loops_per_jiffy = cpufreq_scale(global_l_p_j_ref,
  568. global_l_p_j_ref_freq,
  569. freq->new);
  570. per_cpu(cpu_data, cpu).loops_per_jiffy =
  571. cpufreq_scale(per_cpu(l_p_j_ref, cpu),
  572. per_cpu(l_p_j_ref_freq, cpu),
  573. freq->new);
  574. }
  575. return NOTIFY_OK;
  576. }
  577. static struct notifier_block cpufreq_notifier = {
  578. .notifier_call = cpufreq_callback,
  579. };
  580. static int __init register_cpufreq_notifier(void)
  581. {
  582. return cpufreq_register_notifier(&cpufreq_notifier,
  583. CPUFREQ_TRANSITION_NOTIFIER);
  584. }
  585. core_initcall(register_cpufreq_notifier);
  586. #endif