r8a7794-clock.h 2.2 KB

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  1. /*
  2. * Copyright (C) 2014 Renesas Electronics Corporation
  3. * Copyright 2013 Ideas On Board SPRL
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; either version 2 of the License, or
  8. * (at your option) any later version.
  9. */
  10. #ifndef __DT_BINDINGS_CLOCK_R8A7794_H__
  11. #define __DT_BINDINGS_CLOCK_R8A7794_H__
  12. /* CPG */
  13. #define R8A7794_CLK_MAIN 0
  14. #define R8A7794_CLK_PLL0 1
  15. #define R8A7794_CLK_PLL1 2
  16. #define R8A7794_CLK_PLL3 3
  17. #define R8A7794_CLK_LB 4
  18. #define R8A7794_CLK_QSPI 5
  19. #define R8A7794_CLK_SDH 6
  20. #define R8A7794_CLK_SD0 7
  21. #define R8A7794_CLK_Z 8
  22. /* MSTP0 */
  23. #define R8A7794_CLK_MSIOF0 0
  24. /* MSTP1 */
  25. #define R8A7794_CLK_VCP0 1
  26. #define R8A7794_CLK_VPC0 3
  27. #define R8A7794_CLK_TMU1 11
  28. #define R8A7794_CLK_3DG 12
  29. #define R8A7794_CLK_2DDMAC 15
  30. #define R8A7794_CLK_FDP1_0 19
  31. #define R8A7794_CLK_TMU3 21
  32. #define R8A7794_CLK_TMU2 22
  33. #define R8A7794_CLK_CMT0 24
  34. #define R8A7794_CLK_TMU0 25
  35. #define R8A7794_CLK_VSP1_DU0 28
  36. #define R8A7794_CLK_VSP1_S 31
  37. /* MSTP2 */
  38. #define R8A7794_CLK_SCIFA2 2
  39. #define R8A7794_CLK_SCIFA1 3
  40. #define R8A7794_CLK_SCIFA0 4
  41. #define R8A7794_CLK_MSIOF2 5
  42. #define R8A7794_CLK_SCIFB0 6
  43. #define R8A7794_CLK_SCIFB1 7
  44. #define R8A7794_CLK_MSIOF1 8
  45. #define R8A7794_CLK_SCIFB2 16
  46. /* MSTP3 */
  47. #define R8A7794_CLK_CMT1 29
  48. /* MSTP5 */
  49. #define R8A7794_CLK_THERMAL 22
  50. #define R8A7794_CLK_PWM 23
  51. /* MSTP7 */
  52. #define R8A7794_CLK_HSCIF2 13
  53. #define R8A7794_CLK_SCIF5 14
  54. #define R8A7794_CLK_SCIF4 15
  55. #define R8A7794_CLK_HSCIF1 16
  56. #define R8A7794_CLK_HSCIF0 17
  57. #define R8A7794_CLK_SCIF3 18
  58. #define R8A7794_CLK_SCIF2 19
  59. #define R8A7794_CLK_SCIF1 20
  60. #define R8A7794_CLK_SCIF0 21
  61. /* MSTP8 */
  62. #define R8A7794_CLK_VIN1 10
  63. #define R8A7794_CLK_VIN0 11
  64. #define R8A7794_CLK_ETHER 13
  65. /* MSTP9 */
  66. #define R8A7794_CLK_GPIO6 5
  67. #define R8A7794_CLK_GPIO5 7
  68. #define R8A7794_CLK_GPIO4 8
  69. #define R8A7794_CLK_GPIO3 9
  70. #define R8A7794_CLK_GPIO2 10
  71. #define R8A7794_CLK_GPIO1 11
  72. #define R8A7794_CLK_GPIO0 12
  73. /* MSTP11 */
  74. #define R8A7794_CLK_SCIFA3 6
  75. #define R8A7794_CLK_SCIFA4 7
  76. #define R8A7794_CLK_SCIFA5 8
  77. #endif /* __DT_BINDINGS_CLOCK_R8A7794_H__ */