dwc3-pci.c 6.3 KB

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  1. /**
  2. * dwc3-pci.c - PCI Specific glue layer
  3. *
  4. * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com
  5. *
  6. * Authors: Felipe Balbi <balbi@ti.com>,
  7. * Sebastian Andrzej Siewior <bigeasy@linutronix.de>
  8. *
  9. * This program is free software: you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 of
  11. * the License as published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. */
  18. #include <linux/kernel.h>
  19. #include <linux/module.h>
  20. #include <linux/slab.h>
  21. #include <linux/pci.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/usb/otg.h>
  24. #include <linux/usb/usb_phy_generic.h>
  25. #include "platform_data.h"
  26. /* FIXME define these in <linux/pci_ids.h> */
  27. #define PCI_VENDOR_ID_SYNOPSYS 0x16c3
  28. #define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3 0xabcd
  29. #define PCI_DEVICE_ID_INTEL_BYT 0x0f37
  30. #define PCI_DEVICE_ID_INTEL_MRFLD 0x119e
  31. #define PCI_DEVICE_ID_INTEL_BSW 0x22B7
  32. struct dwc3_pci {
  33. struct device *dev;
  34. struct platform_device *dwc3;
  35. struct platform_device *usb2_phy;
  36. struct platform_device *usb3_phy;
  37. };
  38. static int dwc3_pci_register_phys(struct dwc3_pci *glue)
  39. {
  40. struct usb_phy_generic_platform_data pdata;
  41. struct platform_device *pdev;
  42. int ret;
  43. memset(&pdata, 0x00, sizeof(pdata));
  44. pdev = platform_device_alloc("usb_phy_generic", 0);
  45. if (!pdev)
  46. return -ENOMEM;
  47. glue->usb2_phy = pdev;
  48. pdata.type = USB_PHY_TYPE_USB2;
  49. pdata.gpio_reset = -1;
  50. ret = platform_device_add_data(glue->usb2_phy, &pdata, sizeof(pdata));
  51. if (ret)
  52. goto err1;
  53. pdev = platform_device_alloc("usb_phy_generic", 1);
  54. if (!pdev) {
  55. ret = -ENOMEM;
  56. goto err1;
  57. }
  58. glue->usb3_phy = pdev;
  59. pdata.type = USB_PHY_TYPE_USB3;
  60. ret = platform_device_add_data(glue->usb3_phy, &pdata, sizeof(pdata));
  61. if (ret)
  62. goto err2;
  63. ret = platform_device_add(glue->usb2_phy);
  64. if (ret)
  65. goto err2;
  66. ret = platform_device_add(glue->usb3_phy);
  67. if (ret)
  68. goto err3;
  69. return 0;
  70. err3:
  71. platform_device_del(glue->usb2_phy);
  72. err2:
  73. platform_device_put(glue->usb3_phy);
  74. err1:
  75. platform_device_put(glue->usb2_phy);
  76. return ret;
  77. }
  78. static int dwc3_pci_probe(struct pci_dev *pci,
  79. const struct pci_device_id *id)
  80. {
  81. struct resource res[2];
  82. struct platform_device *dwc3;
  83. struct dwc3_pci *glue;
  84. int ret;
  85. struct device *dev = &pci->dev;
  86. struct dwc3_platform_data dwc3_pdata;
  87. memset(&dwc3_pdata, 0x00, sizeof(dwc3_pdata));
  88. glue = devm_kzalloc(dev, sizeof(*glue), GFP_KERNEL);
  89. if (!glue)
  90. return -ENOMEM;
  91. glue->dev = dev;
  92. ret = pcim_enable_device(pci);
  93. if (ret) {
  94. dev_err(dev, "failed to enable pci device\n");
  95. return -ENODEV;
  96. }
  97. pci_set_master(pci);
  98. ret = dwc3_pci_register_phys(glue);
  99. if (ret) {
  100. dev_err(dev, "couldn't register PHYs\n");
  101. return ret;
  102. }
  103. dwc3 = platform_device_alloc("dwc3", PLATFORM_DEVID_AUTO);
  104. if (!dwc3) {
  105. dev_err(dev, "couldn't allocate dwc3 device\n");
  106. return -ENOMEM;
  107. }
  108. memset(res, 0x00, sizeof(struct resource) * ARRAY_SIZE(res));
  109. res[0].start = pci_resource_start(pci, 0);
  110. res[0].end = pci_resource_end(pci, 0);
  111. res[0].name = "dwc_usb3";
  112. res[0].flags = IORESOURCE_MEM;
  113. res[1].start = pci->irq;
  114. res[1].name = "dwc_usb3";
  115. res[1].flags = IORESOURCE_IRQ;
  116. if (pci->vendor == PCI_VENDOR_ID_AMD &&
  117. pci->device == PCI_DEVICE_ID_AMD_NL_USB) {
  118. dwc3_pdata.has_lpm_erratum = true;
  119. dwc3_pdata.lpm_nyet_threshold = 0xf;
  120. dwc3_pdata.u2exit_lfps_quirk = true;
  121. dwc3_pdata.u2ss_inp3_quirk = true;
  122. dwc3_pdata.req_p1p2p3_quirk = true;
  123. dwc3_pdata.del_p1p2p3_quirk = true;
  124. dwc3_pdata.del_phy_power_chg_quirk = true;
  125. dwc3_pdata.lfps_filter_quirk = true;
  126. dwc3_pdata.rx_detect_poll_quirk = true;
  127. dwc3_pdata.tx_de_emphasis_quirk = true;
  128. dwc3_pdata.tx_de_emphasis = 1;
  129. /*
  130. * FIXME these quirks should be removed when AMD NL
  131. * taps out
  132. */
  133. dwc3_pdata.disable_scramble_quirk = true;
  134. dwc3_pdata.dis_u3_susphy_quirk = true;
  135. dwc3_pdata.dis_u2_susphy_quirk = true;
  136. }
  137. ret = platform_device_add_resources(dwc3, res, ARRAY_SIZE(res));
  138. if (ret) {
  139. dev_err(dev, "couldn't add resources to dwc3 device\n");
  140. return ret;
  141. }
  142. pci_set_drvdata(pci, glue);
  143. ret = platform_device_add_data(dwc3, &dwc3_pdata, sizeof(dwc3_pdata));
  144. if (ret)
  145. goto err3;
  146. dma_set_coherent_mask(&dwc3->dev, dev->coherent_dma_mask);
  147. dwc3->dev.dma_mask = dev->dma_mask;
  148. dwc3->dev.dma_parms = dev->dma_parms;
  149. dwc3->dev.parent = dev;
  150. glue->dwc3 = dwc3;
  151. ret = platform_device_add(dwc3);
  152. if (ret) {
  153. dev_err(dev, "failed to register dwc3 device\n");
  154. goto err3;
  155. }
  156. return 0;
  157. err3:
  158. platform_device_put(dwc3);
  159. return ret;
  160. }
  161. static void dwc3_pci_remove(struct pci_dev *pci)
  162. {
  163. struct dwc3_pci *glue = pci_get_drvdata(pci);
  164. platform_device_unregister(glue->dwc3);
  165. platform_device_unregister(glue->usb2_phy);
  166. platform_device_unregister(glue->usb3_phy);
  167. }
  168. static const struct pci_device_id dwc3_pci_id_table[] = {
  169. {
  170. PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS,
  171. PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3),
  172. },
  173. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BSW), },
  174. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT), },
  175. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_MRFLD), },
  176. { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_NL_USB), },
  177. { } /* Terminating Entry */
  178. };
  179. MODULE_DEVICE_TABLE(pci, dwc3_pci_id_table);
  180. #ifdef CONFIG_PM_SLEEP
  181. static int dwc3_pci_suspend(struct device *dev)
  182. {
  183. struct pci_dev *pci = to_pci_dev(dev);
  184. pci_disable_device(pci);
  185. return 0;
  186. }
  187. static int dwc3_pci_resume(struct device *dev)
  188. {
  189. struct pci_dev *pci = to_pci_dev(dev);
  190. int ret;
  191. ret = pci_enable_device(pci);
  192. if (ret) {
  193. dev_err(dev, "can't re-enable device --> %d\n", ret);
  194. return ret;
  195. }
  196. pci_set_master(pci);
  197. return 0;
  198. }
  199. #endif /* CONFIG_PM_SLEEP */
  200. static const struct dev_pm_ops dwc3_pci_dev_pm_ops = {
  201. SET_SYSTEM_SLEEP_PM_OPS(dwc3_pci_suspend, dwc3_pci_resume)
  202. };
  203. static struct pci_driver dwc3_pci_driver = {
  204. .name = "dwc3-pci",
  205. .id_table = dwc3_pci_id_table,
  206. .probe = dwc3_pci_probe,
  207. .remove = dwc3_pci_remove,
  208. .driver = {
  209. .pm = &dwc3_pci_dev_pm_ops,
  210. },
  211. };
  212. MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
  213. MODULE_LICENSE("GPL v2");
  214. MODULE_DESCRIPTION("DesignWare USB3 PCI Glue Layer");
  215. module_pci_driver(dwc3_pci_driver);