qeth_core_main.c 163 KB

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  1. /*
  2. * Copyright IBM Corp. 2007, 2009
  3. * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
  4. * Frank Pavlic <fpavlic@de.ibm.com>,
  5. * Thomas Spatzier <tspat@de.ibm.com>,
  6. * Frank Blaschka <frank.blaschka@de.ibm.com>
  7. */
  8. #define KMSG_COMPONENT "qeth"
  9. #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
  10. #include <linux/module.h>
  11. #include <linux/moduleparam.h>
  12. #include <linux/string.h>
  13. #include <linux/errno.h>
  14. #include <linux/kernel.h>
  15. #include <linux/ip.h>
  16. #include <linux/tcp.h>
  17. #include <linux/mii.h>
  18. #include <linux/kthread.h>
  19. #include <linux/slab.h>
  20. #include <net/iucv/af_iucv.h>
  21. #include <net/dsfield.h>
  22. #include <asm/ebcdic.h>
  23. #include <asm/chpid.h>
  24. #include <asm/io.h>
  25. #include <asm/sysinfo.h>
  26. #include <asm/compat.h>
  27. #include "qeth_core.h"
  28. struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
  29. /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
  30. /* N P A M L V H */
  31. [QETH_DBF_SETUP] = {"qeth_setup",
  32. 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
  33. [QETH_DBF_MSG] = {"qeth_msg", 8, 1, 11 * sizeof(long), 3,
  34. &debug_sprintf_view, NULL},
  35. [QETH_DBF_CTRL] = {"qeth_control",
  36. 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
  37. };
  38. EXPORT_SYMBOL_GPL(qeth_dbf);
  39. struct qeth_card_list_struct qeth_core_card_list;
  40. EXPORT_SYMBOL_GPL(qeth_core_card_list);
  41. struct kmem_cache *qeth_core_header_cache;
  42. EXPORT_SYMBOL_GPL(qeth_core_header_cache);
  43. static struct kmem_cache *qeth_qdio_outbuf_cache;
  44. static struct device *qeth_core_root_dev;
  45. static unsigned int known_devices[][6] = QETH_MODELLIST_ARRAY;
  46. static struct lock_class_key qdio_out_skb_queue_key;
  47. static struct mutex qeth_mod_mutex;
  48. static void qeth_send_control_data_cb(struct qeth_channel *,
  49. struct qeth_cmd_buffer *);
  50. static int qeth_issue_next_read(struct qeth_card *);
  51. static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
  52. static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
  53. static void qeth_free_buffer_pool(struct qeth_card *);
  54. static int qeth_qdio_establish(struct qeth_card *);
  55. static void qeth_free_qdio_buffers(struct qeth_card *);
  56. static void qeth_notify_skbs(struct qeth_qdio_out_q *queue,
  57. struct qeth_qdio_out_buffer *buf,
  58. enum iucv_tx_notify notification);
  59. static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf);
  60. static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
  61. struct qeth_qdio_out_buffer *buf,
  62. enum qeth_qdio_buffer_states newbufstate);
  63. static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *, int);
  64. struct workqueue_struct *qeth_wq;
  65. EXPORT_SYMBOL_GPL(qeth_wq);
  66. int qeth_card_hw_is_reachable(struct qeth_card *card)
  67. {
  68. return (card->state == CARD_STATE_SOFTSETUP) ||
  69. (card->state == CARD_STATE_UP);
  70. }
  71. EXPORT_SYMBOL_GPL(qeth_card_hw_is_reachable);
  72. static void qeth_close_dev_handler(struct work_struct *work)
  73. {
  74. struct qeth_card *card;
  75. card = container_of(work, struct qeth_card, close_dev_work);
  76. QETH_CARD_TEXT(card, 2, "cldevhdl");
  77. rtnl_lock();
  78. dev_close(card->dev);
  79. rtnl_unlock();
  80. ccwgroup_set_offline(card->gdev);
  81. }
  82. void qeth_close_dev(struct qeth_card *card)
  83. {
  84. QETH_CARD_TEXT(card, 2, "cldevsubm");
  85. queue_work(qeth_wq, &card->close_dev_work);
  86. }
  87. EXPORT_SYMBOL_GPL(qeth_close_dev);
  88. static inline const char *qeth_get_cardname(struct qeth_card *card)
  89. {
  90. if (card->info.guestlan) {
  91. switch (card->info.type) {
  92. case QETH_CARD_TYPE_OSD:
  93. return " Virtual NIC QDIO";
  94. case QETH_CARD_TYPE_IQD:
  95. return " Virtual NIC Hiper";
  96. case QETH_CARD_TYPE_OSM:
  97. return " Virtual NIC QDIO - OSM";
  98. case QETH_CARD_TYPE_OSX:
  99. return " Virtual NIC QDIO - OSX";
  100. default:
  101. return " unknown";
  102. }
  103. } else {
  104. switch (card->info.type) {
  105. case QETH_CARD_TYPE_OSD:
  106. return " OSD Express";
  107. case QETH_CARD_TYPE_IQD:
  108. return " HiperSockets";
  109. case QETH_CARD_TYPE_OSN:
  110. return " OSN QDIO";
  111. case QETH_CARD_TYPE_OSM:
  112. return " OSM QDIO";
  113. case QETH_CARD_TYPE_OSX:
  114. return " OSX QDIO";
  115. default:
  116. return " unknown";
  117. }
  118. }
  119. return " n/a";
  120. }
  121. /* max length to be returned: 14 */
  122. const char *qeth_get_cardname_short(struct qeth_card *card)
  123. {
  124. if (card->info.guestlan) {
  125. switch (card->info.type) {
  126. case QETH_CARD_TYPE_OSD:
  127. return "Virt.NIC QDIO";
  128. case QETH_CARD_TYPE_IQD:
  129. return "Virt.NIC Hiper";
  130. case QETH_CARD_TYPE_OSM:
  131. return "Virt.NIC OSM";
  132. case QETH_CARD_TYPE_OSX:
  133. return "Virt.NIC OSX";
  134. default:
  135. return "unknown";
  136. }
  137. } else {
  138. switch (card->info.type) {
  139. case QETH_CARD_TYPE_OSD:
  140. switch (card->info.link_type) {
  141. case QETH_LINK_TYPE_FAST_ETH:
  142. return "OSD_100";
  143. case QETH_LINK_TYPE_HSTR:
  144. return "HSTR";
  145. case QETH_LINK_TYPE_GBIT_ETH:
  146. return "OSD_1000";
  147. case QETH_LINK_TYPE_10GBIT_ETH:
  148. return "OSD_10GIG";
  149. case QETH_LINK_TYPE_LANE_ETH100:
  150. return "OSD_FE_LANE";
  151. case QETH_LINK_TYPE_LANE_TR:
  152. return "OSD_TR_LANE";
  153. case QETH_LINK_TYPE_LANE_ETH1000:
  154. return "OSD_GbE_LANE";
  155. case QETH_LINK_TYPE_LANE:
  156. return "OSD_ATM_LANE";
  157. default:
  158. return "OSD_Express";
  159. }
  160. case QETH_CARD_TYPE_IQD:
  161. return "HiperSockets";
  162. case QETH_CARD_TYPE_OSN:
  163. return "OSN";
  164. case QETH_CARD_TYPE_OSM:
  165. return "OSM_1000";
  166. case QETH_CARD_TYPE_OSX:
  167. return "OSX_10GIG";
  168. default:
  169. return "unknown";
  170. }
  171. }
  172. return "n/a";
  173. }
  174. void qeth_set_recovery_task(struct qeth_card *card)
  175. {
  176. card->recovery_task = current;
  177. }
  178. EXPORT_SYMBOL_GPL(qeth_set_recovery_task);
  179. void qeth_clear_recovery_task(struct qeth_card *card)
  180. {
  181. card->recovery_task = NULL;
  182. }
  183. EXPORT_SYMBOL_GPL(qeth_clear_recovery_task);
  184. static bool qeth_is_recovery_task(const struct qeth_card *card)
  185. {
  186. return card->recovery_task == current;
  187. }
  188. void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
  189. int clear_start_mask)
  190. {
  191. unsigned long flags;
  192. spin_lock_irqsave(&card->thread_mask_lock, flags);
  193. card->thread_allowed_mask = threads;
  194. if (clear_start_mask)
  195. card->thread_start_mask &= threads;
  196. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  197. wake_up(&card->wait_q);
  198. }
  199. EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
  200. int qeth_threads_running(struct qeth_card *card, unsigned long threads)
  201. {
  202. unsigned long flags;
  203. int rc = 0;
  204. spin_lock_irqsave(&card->thread_mask_lock, flags);
  205. rc = (card->thread_running_mask & threads);
  206. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  207. return rc;
  208. }
  209. EXPORT_SYMBOL_GPL(qeth_threads_running);
  210. int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
  211. {
  212. if (qeth_is_recovery_task(card))
  213. return 0;
  214. return wait_event_interruptible(card->wait_q,
  215. qeth_threads_running(card, threads) == 0);
  216. }
  217. EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
  218. void qeth_clear_working_pool_list(struct qeth_card *card)
  219. {
  220. struct qeth_buffer_pool_entry *pool_entry, *tmp;
  221. QETH_CARD_TEXT(card, 5, "clwrklst");
  222. list_for_each_entry_safe(pool_entry, tmp,
  223. &card->qdio.in_buf_pool.entry_list, list){
  224. list_del(&pool_entry->list);
  225. }
  226. }
  227. EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
  228. static int qeth_alloc_buffer_pool(struct qeth_card *card)
  229. {
  230. struct qeth_buffer_pool_entry *pool_entry;
  231. void *ptr;
  232. int i, j;
  233. QETH_CARD_TEXT(card, 5, "alocpool");
  234. for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
  235. pool_entry = kzalloc(sizeof(*pool_entry), GFP_KERNEL);
  236. if (!pool_entry) {
  237. qeth_free_buffer_pool(card);
  238. return -ENOMEM;
  239. }
  240. for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
  241. ptr = (void *) __get_free_page(GFP_KERNEL);
  242. if (!ptr) {
  243. while (j > 0)
  244. free_page((unsigned long)
  245. pool_entry->elements[--j]);
  246. kfree(pool_entry);
  247. qeth_free_buffer_pool(card);
  248. return -ENOMEM;
  249. }
  250. pool_entry->elements[j] = ptr;
  251. }
  252. list_add(&pool_entry->init_list,
  253. &card->qdio.init_pool.entry_list);
  254. }
  255. return 0;
  256. }
  257. int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
  258. {
  259. QETH_CARD_TEXT(card, 2, "realcbp");
  260. if ((card->state != CARD_STATE_DOWN) &&
  261. (card->state != CARD_STATE_RECOVER))
  262. return -EPERM;
  263. /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
  264. qeth_clear_working_pool_list(card);
  265. qeth_free_buffer_pool(card);
  266. card->qdio.in_buf_pool.buf_count = bufcnt;
  267. card->qdio.init_pool.buf_count = bufcnt;
  268. return qeth_alloc_buffer_pool(card);
  269. }
  270. EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool);
  271. static void qeth_free_qdio_queue(struct qeth_qdio_q *q)
  272. {
  273. if (!q)
  274. return;
  275. qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
  276. kfree(q);
  277. }
  278. static struct qeth_qdio_q *qeth_alloc_qdio_queue(void)
  279. {
  280. struct qeth_qdio_q *q = kzalloc(sizeof(*q), GFP_KERNEL);
  281. int i;
  282. if (!q)
  283. return NULL;
  284. if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) {
  285. kfree(q);
  286. return NULL;
  287. }
  288. for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
  289. q->bufs[i].buffer = q->qdio_bufs[i];
  290. QETH_DBF_HEX(SETUP, 2, &q, sizeof(void *));
  291. return q;
  292. }
  293. static inline int qeth_cq_init(struct qeth_card *card)
  294. {
  295. int rc;
  296. if (card->options.cq == QETH_CQ_ENABLED) {
  297. QETH_DBF_TEXT(SETUP, 2, "cqinit");
  298. qdio_reset_buffers(card->qdio.c_q->qdio_bufs,
  299. QDIO_MAX_BUFFERS_PER_Q);
  300. card->qdio.c_q->next_buf_to_init = 127;
  301. rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT,
  302. card->qdio.no_in_queues - 1, 0,
  303. 127);
  304. if (rc) {
  305. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  306. goto out;
  307. }
  308. }
  309. rc = 0;
  310. out:
  311. return rc;
  312. }
  313. static inline int qeth_alloc_cq(struct qeth_card *card)
  314. {
  315. int rc;
  316. if (card->options.cq == QETH_CQ_ENABLED) {
  317. int i;
  318. struct qdio_outbuf_state *outbuf_states;
  319. QETH_DBF_TEXT(SETUP, 2, "cqon");
  320. card->qdio.c_q = qeth_alloc_qdio_queue();
  321. if (!card->qdio.c_q) {
  322. rc = -1;
  323. goto kmsg_out;
  324. }
  325. card->qdio.no_in_queues = 2;
  326. card->qdio.out_bufstates =
  327. kzalloc(card->qdio.no_out_queues *
  328. QDIO_MAX_BUFFERS_PER_Q *
  329. sizeof(struct qdio_outbuf_state), GFP_KERNEL);
  330. outbuf_states = card->qdio.out_bufstates;
  331. if (outbuf_states == NULL) {
  332. rc = -1;
  333. goto free_cq_out;
  334. }
  335. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  336. card->qdio.out_qs[i]->bufstates = outbuf_states;
  337. outbuf_states += QDIO_MAX_BUFFERS_PER_Q;
  338. }
  339. } else {
  340. QETH_DBF_TEXT(SETUP, 2, "nocq");
  341. card->qdio.c_q = NULL;
  342. card->qdio.no_in_queues = 1;
  343. }
  344. QETH_DBF_TEXT_(SETUP, 2, "iqc%d", card->qdio.no_in_queues);
  345. rc = 0;
  346. out:
  347. return rc;
  348. free_cq_out:
  349. qeth_free_qdio_queue(card->qdio.c_q);
  350. card->qdio.c_q = NULL;
  351. kmsg_out:
  352. dev_err(&card->gdev->dev, "Failed to create completion queue\n");
  353. goto out;
  354. }
  355. static inline void qeth_free_cq(struct qeth_card *card)
  356. {
  357. if (card->qdio.c_q) {
  358. --card->qdio.no_in_queues;
  359. qeth_free_qdio_queue(card->qdio.c_q);
  360. card->qdio.c_q = NULL;
  361. }
  362. kfree(card->qdio.out_bufstates);
  363. card->qdio.out_bufstates = NULL;
  364. }
  365. static inline enum iucv_tx_notify qeth_compute_cq_notification(int sbalf15,
  366. int delayed) {
  367. enum iucv_tx_notify n;
  368. switch (sbalf15) {
  369. case 0:
  370. n = delayed ? TX_NOTIFY_DELAYED_OK : TX_NOTIFY_OK;
  371. break;
  372. case 4:
  373. case 16:
  374. case 17:
  375. case 18:
  376. n = delayed ? TX_NOTIFY_DELAYED_UNREACHABLE :
  377. TX_NOTIFY_UNREACHABLE;
  378. break;
  379. default:
  380. n = delayed ? TX_NOTIFY_DELAYED_GENERALERROR :
  381. TX_NOTIFY_GENERALERROR;
  382. break;
  383. }
  384. return n;
  385. }
  386. static inline void qeth_cleanup_handled_pending(struct qeth_qdio_out_q *q,
  387. int bidx, int forced_cleanup)
  388. {
  389. if (q->card->options.cq != QETH_CQ_ENABLED)
  390. return;
  391. if (q->bufs[bidx]->next_pending != NULL) {
  392. struct qeth_qdio_out_buffer *head = q->bufs[bidx];
  393. struct qeth_qdio_out_buffer *c = q->bufs[bidx]->next_pending;
  394. while (c) {
  395. if (forced_cleanup ||
  396. atomic_read(&c->state) ==
  397. QETH_QDIO_BUF_HANDLED_DELAYED) {
  398. struct qeth_qdio_out_buffer *f = c;
  399. QETH_CARD_TEXT(f->q->card, 5, "fp");
  400. QETH_CARD_TEXT_(f->q->card, 5, "%lx", (long) f);
  401. /* release here to avoid interleaving between
  402. outbound tasklet and inbound tasklet
  403. regarding notifications and lifecycle */
  404. qeth_release_skbs(c);
  405. c = f->next_pending;
  406. WARN_ON_ONCE(head->next_pending != f);
  407. head->next_pending = c;
  408. kmem_cache_free(qeth_qdio_outbuf_cache, f);
  409. } else {
  410. head = c;
  411. c = c->next_pending;
  412. }
  413. }
  414. }
  415. if (forced_cleanup && (atomic_read(&(q->bufs[bidx]->state)) ==
  416. QETH_QDIO_BUF_HANDLED_DELAYED)) {
  417. /* for recovery situations */
  418. q->bufs[bidx]->aob = q->bufstates[bidx].aob;
  419. qeth_init_qdio_out_buf(q, bidx);
  420. QETH_CARD_TEXT(q->card, 2, "clprecov");
  421. }
  422. }
  423. static inline void qeth_qdio_handle_aob(struct qeth_card *card,
  424. unsigned long phys_aob_addr) {
  425. struct qaob *aob;
  426. struct qeth_qdio_out_buffer *buffer;
  427. enum iucv_tx_notify notification;
  428. aob = (struct qaob *) phys_to_virt(phys_aob_addr);
  429. QETH_CARD_TEXT(card, 5, "haob");
  430. QETH_CARD_TEXT_(card, 5, "%lx", phys_aob_addr);
  431. buffer = (struct qeth_qdio_out_buffer *) aob->user1;
  432. QETH_CARD_TEXT_(card, 5, "%lx", aob->user1);
  433. if (atomic_cmpxchg(&buffer->state, QETH_QDIO_BUF_PRIMED,
  434. QETH_QDIO_BUF_IN_CQ) == QETH_QDIO_BUF_PRIMED) {
  435. notification = TX_NOTIFY_OK;
  436. } else {
  437. WARN_ON_ONCE(atomic_read(&buffer->state) !=
  438. QETH_QDIO_BUF_PENDING);
  439. atomic_set(&buffer->state, QETH_QDIO_BUF_IN_CQ);
  440. notification = TX_NOTIFY_DELAYED_OK;
  441. }
  442. if (aob->aorc != 0) {
  443. QETH_CARD_TEXT_(card, 2, "aorc%02X", aob->aorc);
  444. notification = qeth_compute_cq_notification(aob->aorc, 1);
  445. }
  446. qeth_notify_skbs(buffer->q, buffer, notification);
  447. buffer->aob = NULL;
  448. qeth_clear_output_buffer(buffer->q, buffer,
  449. QETH_QDIO_BUF_HANDLED_DELAYED);
  450. /* from here on: do not touch buffer anymore */
  451. qdio_release_aob(aob);
  452. }
  453. static inline int qeth_is_cq(struct qeth_card *card, unsigned int queue)
  454. {
  455. return card->options.cq == QETH_CQ_ENABLED &&
  456. card->qdio.c_q != NULL &&
  457. queue != 0 &&
  458. queue == card->qdio.no_in_queues - 1;
  459. }
  460. static int qeth_issue_next_read(struct qeth_card *card)
  461. {
  462. int rc;
  463. struct qeth_cmd_buffer *iob;
  464. QETH_CARD_TEXT(card, 5, "issnxrd");
  465. if (card->read.state != CH_STATE_UP)
  466. return -EIO;
  467. iob = qeth_get_buffer(&card->read);
  468. if (!iob) {
  469. dev_warn(&card->gdev->dev, "The qeth device driver "
  470. "failed to recover an error on the device\n");
  471. QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob "
  472. "available\n", dev_name(&card->gdev->dev));
  473. return -ENOMEM;
  474. }
  475. qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
  476. QETH_CARD_TEXT(card, 6, "noirqpnd");
  477. rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
  478. (addr_t) iob, 0, 0);
  479. if (rc) {
  480. QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! "
  481. "rc=%i\n", dev_name(&card->gdev->dev), rc);
  482. atomic_set(&card->read.irq_pending, 0);
  483. card->read_or_write_problem = 1;
  484. qeth_schedule_recovery(card);
  485. wake_up(&card->wait_q);
  486. }
  487. return rc;
  488. }
  489. static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
  490. {
  491. struct qeth_reply *reply;
  492. reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
  493. if (reply) {
  494. atomic_set(&reply->refcnt, 1);
  495. atomic_set(&reply->received, 0);
  496. reply->card = card;
  497. }
  498. return reply;
  499. }
  500. static void qeth_get_reply(struct qeth_reply *reply)
  501. {
  502. WARN_ON(atomic_read(&reply->refcnt) <= 0);
  503. atomic_inc(&reply->refcnt);
  504. }
  505. static void qeth_put_reply(struct qeth_reply *reply)
  506. {
  507. WARN_ON(atomic_read(&reply->refcnt) <= 0);
  508. if (atomic_dec_and_test(&reply->refcnt))
  509. kfree(reply);
  510. }
  511. static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
  512. struct qeth_card *card)
  513. {
  514. char *ipa_name;
  515. int com = cmd->hdr.command;
  516. ipa_name = qeth_get_ipa_cmd_name(com);
  517. if (rc)
  518. QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s/%s returned "
  519. "x%X \"%s\"\n",
  520. ipa_name, com, dev_name(&card->gdev->dev),
  521. QETH_CARD_IFNAME(card), rc,
  522. qeth_get_ipa_msg(rc));
  523. else
  524. QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s/%s succeeded\n",
  525. ipa_name, com, dev_name(&card->gdev->dev),
  526. QETH_CARD_IFNAME(card));
  527. }
  528. static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
  529. struct qeth_cmd_buffer *iob)
  530. {
  531. struct qeth_ipa_cmd *cmd = NULL;
  532. QETH_CARD_TEXT(card, 5, "chkipad");
  533. if (IS_IPA(iob->data)) {
  534. cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
  535. if (IS_IPA_REPLY(cmd)) {
  536. if (cmd->hdr.command != IPA_CMD_SETCCID &&
  537. cmd->hdr.command != IPA_CMD_DELCCID &&
  538. cmd->hdr.command != IPA_CMD_MODCCID &&
  539. cmd->hdr.command != IPA_CMD_SET_DIAG_ASS)
  540. qeth_issue_ipa_msg(cmd,
  541. cmd->hdr.return_code, card);
  542. return cmd;
  543. } else {
  544. switch (cmd->hdr.command) {
  545. case IPA_CMD_STOPLAN:
  546. if (cmd->hdr.return_code ==
  547. IPA_RC_VEPA_TO_VEB_TRANSITION) {
  548. dev_err(&card->gdev->dev,
  549. "Interface %s is down because the "
  550. "adjacent port is no longer in "
  551. "reflective relay mode\n",
  552. QETH_CARD_IFNAME(card));
  553. qeth_close_dev(card);
  554. } else {
  555. dev_warn(&card->gdev->dev,
  556. "The link for interface %s on CHPID"
  557. " 0x%X failed\n",
  558. QETH_CARD_IFNAME(card),
  559. card->info.chpid);
  560. qeth_issue_ipa_msg(cmd,
  561. cmd->hdr.return_code, card);
  562. }
  563. card->lan_online = 0;
  564. if (card->dev && netif_carrier_ok(card->dev))
  565. netif_carrier_off(card->dev);
  566. return NULL;
  567. case IPA_CMD_STARTLAN:
  568. dev_info(&card->gdev->dev,
  569. "The link for %s on CHPID 0x%X has"
  570. " been restored\n",
  571. QETH_CARD_IFNAME(card),
  572. card->info.chpid);
  573. netif_carrier_on(card->dev);
  574. card->lan_online = 1;
  575. if (card->info.hwtrap)
  576. card->info.hwtrap = 2;
  577. qeth_schedule_recovery(card);
  578. return NULL;
  579. case IPA_CMD_SETBRIDGEPORT:
  580. case IPA_CMD_ADDRESS_CHANGE_NOTIF:
  581. if (card->discipline->control_event_handler
  582. (card, cmd))
  583. return cmd;
  584. else
  585. return NULL;
  586. case IPA_CMD_MODCCID:
  587. return cmd;
  588. case IPA_CMD_REGISTER_LOCAL_ADDR:
  589. QETH_CARD_TEXT(card, 3, "irla");
  590. break;
  591. case IPA_CMD_UNREGISTER_LOCAL_ADDR:
  592. QETH_CARD_TEXT(card, 3, "urla");
  593. break;
  594. default:
  595. QETH_DBF_MESSAGE(2, "Received data is IPA "
  596. "but not a reply!\n");
  597. break;
  598. }
  599. }
  600. }
  601. return cmd;
  602. }
  603. void qeth_clear_ipacmd_list(struct qeth_card *card)
  604. {
  605. struct qeth_reply *reply, *r;
  606. unsigned long flags;
  607. QETH_CARD_TEXT(card, 4, "clipalst");
  608. spin_lock_irqsave(&card->lock, flags);
  609. list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
  610. qeth_get_reply(reply);
  611. reply->rc = -EIO;
  612. atomic_inc(&reply->received);
  613. list_del_init(&reply->list);
  614. wake_up(&reply->wait_q);
  615. qeth_put_reply(reply);
  616. }
  617. spin_unlock_irqrestore(&card->lock, flags);
  618. atomic_set(&card->write.irq_pending, 0);
  619. }
  620. EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
  621. static int qeth_check_idx_response(struct qeth_card *card,
  622. unsigned char *buffer)
  623. {
  624. if (!buffer)
  625. return 0;
  626. QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
  627. if ((buffer[2] & 0xc0) == 0xc0) {
  628. QETH_DBF_MESSAGE(2, "received an IDX TERMINATE "
  629. "with cause code 0x%02x%s\n",
  630. buffer[4],
  631. ((buffer[4] == 0x22) ?
  632. " -- try another portname" : ""));
  633. QETH_CARD_TEXT(card, 2, "ckidxres");
  634. QETH_CARD_TEXT(card, 2, " idxterm");
  635. QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
  636. if (buffer[4] == 0xf6) {
  637. dev_err(&card->gdev->dev,
  638. "The qeth device is not configured "
  639. "for the OSI layer required by z/VM\n");
  640. return -EPERM;
  641. }
  642. return -EIO;
  643. }
  644. return 0;
  645. }
  646. static struct qeth_card *CARD_FROM_CDEV(struct ccw_device *cdev)
  647. {
  648. struct qeth_card *card = dev_get_drvdata(&((struct ccwgroup_device *)
  649. dev_get_drvdata(&cdev->dev))->dev);
  650. return card;
  651. }
  652. static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
  653. __u32 len)
  654. {
  655. struct qeth_card *card;
  656. card = CARD_FROM_CDEV(channel->ccwdev);
  657. QETH_CARD_TEXT(card, 4, "setupccw");
  658. if (channel == &card->read)
  659. memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
  660. else
  661. memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
  662. channel->ccw.count = len;
  663. channel->ccw.cda = (__u32) __pa(iob);
  664. }
  665. static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
  666. {
  667. __u8 index;
  668. QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff");
  669. index = channel->io_buf_no;
  670. do {
  671. if (channel->iob[index].state == BUF_STATE_FREE) {
  672. channel->iob[index].state = BUF_STATE_LOCKED;
  673. channel->io_buf_no = (channel->io_buf_no + 1) %
  674. QETH_CMD_BUFFER_NO;
  675. memset(channel->iob[index].data, 0, QETH_BUFSIZE);
  676. return channel->iob + index;
  677. }
  678. index = (index + 1) % QETH_CMD_BUFFER_NO;
  679. } while (index != channel->io_buf_no);
  680. return NULL;
  681. }
  682. void qeth_release_buffer(struct qeth_channel *channel,
  683. struct qeth_cmd_buffer *iob)
  684. {
  685. unsigned long flags;
  686. QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff");
  687. spin_lock_irqsave(&channel->iob_lock, flags);
  688. memset(iob->data, 0, QETH_BUFSIZE);
  689. iob->state = BUF_STATE_FREE;
  690. iob->callback = qeth_send_control_data_cb;
  691. iob->rc = 0;
  692. spin_unlock_irqrestore(&channel->iob_lock, flags);
  693. wake_up(&channel->wait_q);
  694. }
  695. EXPORT_SYMBOL_GPL(qeth_release_buffer);
  696. static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
  697. {
  698. struct qeth_cmd_buffer *buffer = NULL;
  699. unsigned long flags;
  700. spin_lock_irqsave(&channel->iob_lock, flags);
  701. buffer = __qeth_get_buffer(channel);
  702. spin_unlock_irqrestore(&channel->iob_lock, flags);
  703. return buffer;
  704. }
  705. struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
  706. {
  707. struct qeth_cmd_buffer *buffer;
  708. wait_event(channel->wait_q,
  709. ((buffer = qeth_get_buffer(channel)) != NULL));
  710. return buffer;
  711. }
  712. EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
  713. void qeth_clear_cmd_buffers(struct qeth_channel *channel)
  714. {
  715. int cnt;
  716. for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
  717. qeth_release_buffer(channel, &channel->iob[cnt]);
  718. channel->buf_no = 0;
  719. channel->io_buf_no = 0;
  720. }
  721. EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
  722. static void qeth_send_control_data_cb(struct qeth_channel *channel,
  723. struct qeth_cmd_buffer *iob)
  724. {
  725. struct qeth_card *card;
  726. struct qeth_reply *reply, *r;
  727. struct qeth_ipa_cmd *cmd;
  728. unsigned long flags;
  729. int keep_reply;
  730. int rc = 0;
  731. card = CARD_FROM_CDEV(channel->ccwdev);
  732. QETH_CARD_TEXT(card, 4, "sndctlcb");
  733. rc = qeth_check_idx_response(card, iob->data);
  734. switch (rc) {
  735. case 0:
  736. break;
  737. case -EIO:
  738. qeth_clear_ipacmd_list(card);
  739. qeth_schedule_recovery(card);
  740. /* fall through */
  741. default:
  742. goto out;
  743. }
  744. cmd = qeth_check_ipa_data(card, iob);
  745. if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
  746. goto out;
  747. /*in case of OSN : check if cmd is set */
  748. if (card->info.type == QETH_CARD_TYPE_OSN &&
  749. cmd &&
  750. cmd->hdr.command != IPA_CMD_STARTLAN &&
  751. card->osn_info.assist_cb != NULL) {
  752. card->osn_info.assist_cb(card->dev, cmd);
  753. goto out;
  754. }
  755. spin_lock_irqsave(&card->lock, flags);
  756. list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
  757. if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
  758. ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
  759. qeth_get_reply(reply);
  760. list_del_init(&reply->list);
  761. spin_unlock_irqrestore(&card->lock, flags);
  762. keep_reply = 0;
  763. if (reply->callback != NULL) {
  764. if (cmd) {
  765. reply->offset = (__u16)((char *)cmd -
  766. (char *)iob->data);
  767. keep_reply = reply->callback(card,
  768. reply,
  769. (unsigned long)cmd);
  770. } else
  771. keep_reply = reply->callback(card,
  772. reply,
  773. (unsigned long)iob);
  774. }
  775. if (cmd)
  776. reply->rc = (u16) cmd->hdr.return_code;
  777. else if (iob->rc)
  778. reply->rc = iob->rc;
  779. if (keep_reply) {
  780. spin_lock_irqsave(&card->lock, flags);
  781. list_add_tail(&reply->list,
  782. &card->cmd_waiter_list);
  783. spin_unlock_irqrestore(&card->lock, flags);
  784. } else {
  785. atomic_inc(&reply->received);
  786. wake_up(&reply->wait_q);
  787. }
  788. qeth_put_reply(reply);
  789. goto out;
  790. }
  791. }
  792. spin_unlock_irqrestore(&card->lock, flags);
  793. out:
  794. memcpy(&card->seqno.pdu_hdr_ack,
  795. QETH_PDU_HEADER_SEQ_NO(iob->data),
  796. QETH_SEQ_NO_LENGTH);
  797. qeth_release_buffer(channel, iob);
  798. }
  799. static int qeth_setup_channel(struct qeth_channel *channel)
  800. {
  801. int cnt;
  802. QETH_DBF_TEXT(SETUP, 2, "setupch");
  803. for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
  804. channel->iob[cnt].data =
  805. kzalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
  806. if (channel->iob[cnt].data == NULL)
  807. break;
  808. channel->iob[cnt].state = BUF_STATE_FREE;
  809. channel->iob[cnt].channel = channel;
  810. channel->iob[cnt].callback = qeth_send_control_data_cb;
  811. channel->iob[cnt].rc = 0;
  812. }
  813. if (cnt < QETH_CMD_BUFFER_NO) {
  814. while (cnt-- > 0)
  815. kfree(channel->iob[cnt].data);
  816. return -ENOMEM;
  817. }
  818. channel->buf_no = 0;
  819. channel->io_buf_no = 0;
  820. atomic_set(&channel->irq_pending, 0);
  821. spin_lock_init(&channel->iob_lock);
  822. init_waitqueue_head(&channel->wait_q);
  823. return 0;
  824. }
  825. static int qeth_set_thread_start_bit(struct qeth_card *card,
  826. unsigned long thread)
  827. {
  828. unsigned long flags;
  829. spin_lock_irqsave(&card->thread_mask_lock, flags);
  830. if (!(card->thread_allowed_mask & thread) ||
  831. (card->thread_start_mask & thread)) {
  832. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  833. return -EPERM;
  834. }
  835. card->thread_start_mask |= thread;
  836. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  837. return 0;
  838. }
  839. void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
  840. {
  841. unsigned long flags;
  842. spin_lock_irqsave(&card->thread_mask_lock, flags);
  843. card->thread_start_mask &= ~thread;
  844. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  845. wake_up(&card->wait_q);
  846. }
  847. EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
  848. void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
  849. {
  850. unsigned long flags;
  851. spin_lock_irqsave(&card->thread_mask_lock, flags);
  852. card->thread_running_mask &= ~thread;
  853. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  854. wake_up(&card->wait_q);
  855. }
  856. EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
  857. static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
  858. {
  859. unsigned long flags;
  860. int rc = 0;
  861. spin_lock_irqsave(&card->thread_mask_lock, flags);
  862. if (card->thread_start_mask & thread) {
  863. if ((card->thread_allowed_mask & thread) &&
  864. !(card->thread_running_mask & thread)) {
  865. rc = 1;
  866. card->thread_start_mask &= ~thread;
  867. card->thread_running_mask |= thread;
  868. } else
  869. rc = -EPERM;
  870. }
  871. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  872. return rc;
  873. }
  874. int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
  875. {
  876. int rc = 0;
  877. wait_event(card->wait_q,
  878. (rc = __qeth_do_run_thread(card, thread)) >= 0);
  879. return rc;
  880. }
  881. EXPORT_SYMBOL_GPL(qeth_do_run_thread);
  882. void qeth_schedule_recovery(struct qeth_card *card)
  883. {
  884. QETH_CARD_TEXT(card, 2, "startrec");
  885. if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
  886. schedule_work(&card->kernel_thread_starter);
  887. }
  888. EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
  889. static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
  890. {
  891. int dstat, cstat;
  892. char *sense;
  893. struct qeth_card *card;
  894. sense = (char *) irb->ecw;
  895. cstat = irb->scsw.cmd.cstat;
  896. dstat = irb->scsw.cmd.dstat;
  897. card = CARD_FROM_CDEV(cdev);
  898. if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
  899. SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
  900. SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
  901. QETH_CARD_TEXT(card, 2, "CGENCHK");
  902. dev_warn(&cdev->dev, "The qeth device driver "
  903. "failed to recover an error on the device\n");
  904. QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n",
  905. dev_name(&cdev->dev), dstat, cstat);
  906. print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
  907. 16, 1, irb, 64, 1);
  908. return 1;
  909. }
  910. if (dstat & DEV_STAT_UNIT_CHECK) {
  911. if (sense[SENSE_RESETTING_EVENT_BYTE] &
  912. SENSE_RESETTING_EVENT_FLAG) {
  913. QETH_CARD_TEXT(card, 2, "REVIND");
  914. return 1;
  915. }
  916. if (sense[SENSE_COMMAND_REJECT_BYTE] &
  917. SENSE_COMMAND_REJECT_FLAG) {
  918. QETH_CARD_TEXT(card, 2, "CMDREJi");
  919. return 1;
  920. }
  921. if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
  922. QETH_CARD_TEXT(card, 2, "AFFE");
  923. return 1;
  924. }
  925. if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
  926. QETH_CARD_TEXT(card, 2, "ZEROSEN");
  927. return 0;
  928. }
  929. QETH_CARD_TEXT(card, 2, "DGENCHK");
  930. return 1;
  931. }
  932. return 0;
  933. }
  934. static long __qeth_check_irb_error(struct ccw_device *cdev,
  935. unsigned long intparm, struct irb *irb)
  936. {
  937. struct qeth_card *card;
  938. card = CARD_FROM_CDEV(cdev);
  939. if (!card || !IS_ERR(irb))
  940. return 0;
  941. switch (PTR_ERR(irb)) {
  942. case -EIO:
  943. QETH_DBF_MESSAGE(2, "%s i/o-error on device\n",
  944. dev_name(&cdev->dev));
  945. QETH_CARD_TEXT(card, 2, "ckirberr");
  946. QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
  947. break;
  948. case -ETIMEDOUT:
  949. dev_warn(&cdev->dev, "A hardware operation timed out"
  950. " on the device\n");
  951. QETH_CARD_TEXT(card, 2, "ckirberr");
  952. QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT);
  953. if (intparm == QETH_RCD_PARM) {
  954. if (card->data.ccwdev == cdev) {
  955. card->data.state = CH_STATE_DOWN;
  956. wake_up(&card->wait_q);
  957. }
  958. }
  959. break;
  960. default:
  961. QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n",
  962. dev_name(&cdev->dev), PTR_ERR(irb));
  963. QETH_CARD_TEXT(card, 2, "ckirberr");
  964. QETH_CARD_TEXT(card, 2, " rc???");
  965. }
  966. return PTR_ERR(irb);
  967. }
  968. static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
  969. struct irb *irb)
  970. {
  971. int rc;
  972. int cstat, dstat;
  973. struct qeth_cmd_buffer *buffer;
  974. struct qeth_channel *channel;
  975. struct qeth_card *card;
  976. struct qeth_cmd_buffer *iob;
  977. __u8 index;
  978. if (__qeth_check_irb_error(cdev, intparm, irb))
  979. return;
  980. cstat = irb->scsw.cmd.cstat;
  981. dstat = irb->scsw.cmd.dstat;
  982. card = CARD_FROM_CDEV(cdev);
  983. if (!card)
  984. return;
  985. QETH_CARD_TEXT(card, 5, "irq");
  986. if (card->read.ccwdev == cdev) {
  987. channel = &card->read;
  988. QETH_CARD_TEXT(card, 5, "read");
  989. } else if (card->write.ccwdev == cdev) {
  990. channel = &card->write;
  991. QETH_CARD_TEXT(card, 5, "write");
  992. } else {
  993. channel = &card->data;
  994. QETH_CARD_TEXT(card, 5, "data");
  995. }
  996. atomic_set(&channel->irq_pending, 0);
  997. if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
  998. channel->state = CH_STATE_STOPPED;
  999. if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
  1000. channel->state = CH_STATE_HALTED;
  1001. /*let's wake up immediately on data channel*/
  1002. if ((channel == &card->data) && (intparm != 0) &&
  1003. (intparm != QETH_RCD_PARM))
  1004. goto out;
  1005. if (intparm == QETH_CLEAR_CHANNEL_PARM) {
  1006. QETH_CARD_TEXT(card, 6, "clrchpar");
  1007. /* we don't have to handle this further */
  1008. intparm = 0;
  1009. }
  1010. if (intparm == QETH_HALT_CHANNEL_PARM) {
  1011. QETH_CARD_TEXT(card, 6, "hltchpar");
  1012. /* we don't have to handle this further */
  1013. intparm = 0;
  1014. }
  1015. if ((dstat & DEV_STAT_UNIT_EXCEP) ||
  1016. (dstat & DEV_STAT_UNIT_CHECK) ||
  1017. (cstat)) {
  1018. if (irb->esw.esw0.erw.cons) {
  1019. dev_warn(&channel->ccwdev->dev,
  1020. "The qeth device driver failed to recover "
  1021. "an error on the device\n");
  1022. QETH_DBF_MESSAGE(2, "%s sense data available. cstat "
  1023. "0x%X dstat 0x%X\n",
  1024. dev_name(&channel->ccwdev->dev), cstat, dstat);
  1025. print_hex_dump(KERN_WARNING, "qeth: irb ",
  1026. DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
  1027. print_hex_dump(KERN_WARNING, "qeth: sense data ",
  1028. DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
  1029. }
  1030. if (intparm == QETH_RCD_PARM) {
  1031. channel->state = CH_STATE_DOWN;
  1032. goto out;
  1033. }
  1034. rc = qeth_get_problem(cdev, irb);
  1035. if (rc) {
  1036. qeth_clear_ipacmd_list(card);
  1037. qeth_schedule_recovery(card);
  1038. goto out;
  1039. }
  1040. }
  1041. if (intparm == QETH_RCD_PARM) {
  1042. channel->state = CH_STATE_RCD_DONE;
  1043. goto out;
  1044. }
  1045. if (intparm) {
  1046. buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
  1047. buffer->state = BUF_STATE_PROCESSED;
  1048. }
  1049. if (channel == &card->data)
  1050. return;
  1051. if (channel == &card->read &&
  1052. channel->state == CH_STATE_UP)
  1053. qeth_issue_next_read(card);
  1054. iob = channel->iob;
  1055. index = channel->buf_no;
  1056. while (iob[index].state == BUF_STATE_PROCESSED) {
  1057. if (iob[index].callback != NULL)
  1058. iob[index].callback(channel, iob + index);
  1059. index = (index + 1) % QETH_CMD_BUFFER_NO;
  1060. }
  1061. channel->buf_no = index;
  1062. out:
  1063. wake_up(&card->wait_q);
  1064. return;
  1065. }
  1066. static void qeth_notify_skbs(struct qeth_qdio_out_q *q,
  1067. struct qeth_qdio_out_buffer *buf,
  1068. enum iucv_tx_notify notification)
  1069. {
  1070. struct sk_buff *skb;
  1071. if (skb_queue_empty(&buf->skb_list))
  1072. goto out;
  1073. skb = skb_peek(&buf->skb_list);
  1074. while (skb) {
  1075. QETH_CARD_TEXT_(q->card, 5, "skbn%d", notification);
  1076. QETH_CARD_TEXT_(q->card, 5, "%lx", (long) skb);
  1077. if (skb->protocol == ETH_P_AF_IUCV) {
  1078. if (skb->sk) {
  1079. struct iucv_sock *iucv = iucv_sk(skb->sk);
  1080. iucv->sk_txnotify(skb, notification);
  1081. }
  1082. }
  1083. if (skb_queue_is_last(&buf->skb_list, skb))
  1084. skb = NULL;
  1085. else
  1086. skb = skb_queue_next(&buf->skb_list, skb);
  1087. }
  1088. out:
  1089. return;
  1090. }
  1091. static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf)
  1092. {
  1093. struct sk_buff *skb;
  1094. struct iucv_sock *iucv;
  1095. int notify_general_error = 0;
  1096. if (atomic_read(&buf->state) == QETH_QDIO_BUF_PENDING)
  1097. notify_general_error = 1;
  1098. /* release may never happen from within CQ tasklet scope */
  1099. WARN_ON_ONCE(atomic_read(&buf->state) == QETH_QDIO_BUF_IN_CQ);
  1100. skb = skb_dequeue(&buf->skb_list);
  1101. while (skb) {
  1102. QETH_CARD_TEXT(buf->q->card, 5, "skbr");
  1103. QETH_CARD_TEXT_(buf->q->card, 5, "%lx", (long) skb);
  1104. if (notify_general_error && skb->protocol == ETH_P_AF_IUCV) {
  1105. if (skb->sk) {
  1106. iucv = iucv_sk(skb->sk);
  1107. iucv->sk_txnotify(skb, TX_NOTIFY_GENERALERROR);
  1108. }
  1109. }
  1110. atomic_dec(&skb->users);
  1111. dev_kfree_skb_any(skb);
  1112. skb = skb_dequeue(&buf->skb_list);
  1113. }
  1114. }
  1115. static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
  1116. struct qeth_qdio_out_buffer *buf,
  1117. enum qeth_qdio_buffer_states newbufstate)
  1118. {
  1119. int i;
  1120. /* is PCI flag set on buffer? */
  1121. if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ)
  1122. atomic_dec(&queue->set_pci_flags_count);
  1123. if (newbufstate == QETH_QDIO_BUF_EMPTY) {
  1124. qeth_release_skbs(buf);
  1125. }
  1126. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
  1127. if (buf->buffer->element[i].addr && buf->is_header[i])
  1128. kmem_cache_free(qeth_core_header_cache,
  1129. buf->buffer->element[i].addr);
  1130. buf->is_header[i] = 0;
  1131. buf->buffer->element[i].length = 0;
  1132. buf->buffer->element[i].addr = NULL;
  1133. buf->buffer->element[i].eflags = 0;
  1134. buf->buffer->element[i].sflags = 0;
  1135. }
  1136. buf->buffer->element[15].eflags = 0;
  1137. buf->buffer->element[15].sflags = 0;
  1138. buf->next_element_to_fill = 0;
  1139. atomic_set(&buf->state, newbufstate);
  1140. }
  1141. static void qeth_clear_outq_buffers(struct qeth_qdio_out_q *q, int free)
  1142. {
  1143. int j;
  1144. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
  1145. if (!q->bufs[j])
  1146. continue;
  1147. qeth_cleanup_handled_pending(q, j, 1);
  1148. qeth_clear_output_buffer(q, q->bufs[j], QETH_QDIO_BUF_EMPTY);
  1149. if (free) {
  1150. kmem_cache_free(qeth_qdio_outbuf_cache, q->bufs[j]);
  1151. q->bufs[j] = NULL;
  1152. }
  1153. }
  1154. }
  1155. void qeth_clear_qdio_buffers(struct qeth_card *card)
  1156. {
  1157. int i;
  1158. QETH_CARD_TEXT(card, 2, "clearqdbf");
  1159. /* clear outbound buffers to free skbs */
  1160. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  1161. if (card->qdio.out_qs[i]) {
  1162. qeth_clear_outq_buffers(card->qdio.out_qs[i], 0);
  1163. }
  1164. }
  1165. }
  1166. EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
  1167. static void qeth_free_buffer_pool(struct qeth_card *card)
  1168. {
  1169. struct qeth_buffer_pool_entry *pool_entry, *tmp;
  1170. int i = 0;
  1171. list_for_each_entry_safe(pool_entry, tmp,
  1172. &card->qdio.init_pool.entry_list, init_list){
  1173. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
  1174. free_page((unsigned long)pool_entry->elements[i]);
  1175. list_del(&pool_entry->init_list);
  1176. kfree(pool_entry);
  1177. }
  1178. }
  1179. static void qeth_clean_channel(struct qeth_channel *channel)
  1180. {
  1181. int cnt;
  1182. QETH_DBF_TEXT(SETUP, 2, "freech");
  1183. for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
  1184. kfree(channel->iob[cnt].data);
  1185. }
  1186. static void qeth_set_single_write_queues(struct qeth_card *card)
  1187. {
  1188. if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
  1189. (card->qdio.no_out_queues == 4))
  1190. qeth_free_qdio_buffers(card);
  1191. card->qdio.no_out_queues = 1;
  1192. if (card->qdio.default_out_queue != 0)
  1193. dev_info(&card->gdev->dev, "Priority Queueing not supported\n");
  1194. card->qdio.default_out_queue = 0;
  1195. }
  1196. static void qeth_set_multiple_write_queues(struct qeth_card *card)
  1197. {
  1198. if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
  1199. (card->qdio.no_out_queues == 1)) {
  1200. qeth_free_qdio_buffers(card);
  1201. card->qdio.default_out_queue = 2;
  1202. }
  1203. card->qdio.no_out_queues = 4;
  1204. }
  1205. static void qeth_update_from_chp_desc(struct qeth_card *card)
  1206. {
  1207. struct ccw_device *ccwdev;
  1208. struct channel_path_desc *chp_dsc;
  1209. QETH_DBF_TEXT(SETUP, 2, "chp_desc");
  1210. ccwdev = card->data.ccwdev;
  1211. chp_dsc = ccw_device_get_chp_desc(ccwdev, 0);
  1212. if (!chp_dsc)
  1213. goto out;
  1214. card->info.func_level = 0x4100 + chp_dsc->desc;
  1215. if (card->info.type == QETH_CARD_TYPE_IQD)
  1216. goto out;
  1217. /* CHPP field bit 6 == 1 -> single queue */
  1218. if ((chp_dsc->chpp & 0x02) == 0x02)
  1219. qeth_set_single_write_queues(card);
  1220. else
  1221. qeth_set_multiple_write_queues(card);
  1222. out:
  1223. kfree(chp_dsc);
  1224. QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues);
  1225. QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level);
  1226. }
  1227. static void qeth_init_qdio_info(struct qeth_card *card)
  1228. {
  1229. QETH_DBF_TEXT(SETUP, 4, "intqdinf");
  1230. atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
  1231. /* inbound */
  1232. card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
  1233. if (card->info.type == QETH_CARD_TYPE_IQD)
  1234. card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT;
  1235. else
  1236. card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
  1237. card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
  1238. INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
  1239. INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
  1240. }
  1241. static void qeth_set_intial_options(struct qeth_card *card)
  1242. {
  1243. card->options.route4.type = NO_ROUTER;
  1244. card->options.route6.type = NO_ROUTER;
  1245. card->options.fake_broadcast = 0;
  1246. card->options.add_hhlen = DEFAULT_ADD_HHLEN;
  1247. card->options.performance_stats = 0;
  1248. card->options.rx_sg_cb = QETH_RX_SG_CB;
  1249. card->options.isolation = ISOLATION_MODE_NONE;
  1250. card->options.cq = QETH_CQ_DISABLED;
  1251. }
  1252. static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
  1253. {
  1254. unsigned long flags;
  1255. int rc = 0;
  1256. spin_lock_irqsave(&card->thread_mask_lock, flags);
  1257. QETH_CARD_TEXT_(card, 4, " %02x%02x%02x",
  1258. (u8) card->thread_start_mask,
  1259. (u8) card->thread_allowed_mask,
  1260. (u8) card->thread_running_mask);
  1261. rc = (card->thread_start_mask & thread);
  1262. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  1263. return rc;
  1264. }
  1265. static void qeth_start_kernel_thread(struct work_struct *work)
  1266. {
  1267. struct task_struct *ts;
  1268. struct qeth_card *card = container_of(work, struct qeth_card,
  1269. kernel_thread_starter);
  1270. QETH_CARD_TEXT(card , 2, "strthrd");
  1271. if (card->read.state != CH_STATE_UP &&
  1272. card->write.state != CH_STATE_UP)
  1273. return;
  1274. if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) {
  1275. ts = kthread_run(card->discipline->recover, (void *)card,
  1276. "qeth_recover");
  1277. if (IS_ERR(ts)) {
  1278. qeth_clear_thread_start_bit(card, QETH_RECOVER_THREAD);
  1279. qeth_clear_thread_running_bit(card,
  1280. QETH_RECOVER_THREAD);
  1281. }
  1282. }
  1283. }
  1284. static void qeth_buffer_reclaim_work(struct work_struct *);
  1285. static int qeth_setup_card(struct qeth_card *card)
  1286. {
  1287. QETH_DBF_TEXT(SETUP, 2, "setupcrd");
  1288. QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
  1289. card->read.state = CH_STATE_DOWN;
  1290. card->write.state = CH_STATE_DOWN;
  1291. card->data.state = CH_STATE_DOWN;
  1292. card->state = CARD_STATE_DOWN;
  1293. card->lan_online = 0;
  1294. card->read_or_write_problem = 0;
  1295. card->dev = NULL;
  1296. spin_lock_init(&card->vlanlock);
  1297. spin_lock_init(&card->mclock);
  1298. spin_lock_init(&card->lock);
  1299. spin_lock_init(&card->ip_lock);
  1300. spin_lock_init(&card->thread_mask_lock);
  1301. mutex_init(&card->conf_mutex);
  1302. mutex_init(&card->discipline_mutex);
  1303. card->thread_start_mask = 0;
  1304. card->thread_allowed_mask = 0;
  1305. card->thread_running_mask = 0;
  1306. INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
  1307. INIT_LIST_HEAD(&card->ip_list);
  1308. INIT_LIST_HEAD(card->ip_tbd_list);
  1309. INIT_LIST_HEAD(&card->cmd_waiter_list);
  1310. init_waitqueue_head(&card->wait_q);
  1311. /* initial options */
  1312. qeth_set_intial_options(card);
  1313. /* IP address takeover */
  1314. INIT_LIST_HEAD(&card->ipato.entries);
  1315. card->ipato.enabled = 0;
  1316. card->ipato.invert4 = 0;
  1317. card->ipato.invert6 = 0;
  1318. /* init QDIO stuff */
  1319. qeth_init_qdio_info(card);
  1320. INIT_DELAYED_WORK(&card->buffer_reclaim_work, qeth_buffer_reclaim_work);
  1321. INIT_WORK(&card->close_dev_work, qeth_close_dev_handler);
  1322. return 0;
  1323. }
  1324. static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
  1325. {
  1326. struct qeth_card *card = container_of(slr, struct qeth_card,
  1327. qeth_service_level);
  1328. if (card->info.mcl_level[0])
  1329. seq_printf(m, "qeth: %s firmware level %s\n",
  1330. CARD_BUS_ID(card), card->info.mcl_level);
  1331. }
  1332. static struct qeth_card *qeth_alloc_card(void)
  1333. {
  1334. struct qeth_card *card;
  1335. QETH_DBF_TEXT(SETUP, 2, "alloccrd");
  1336. card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
  1337. if (!card)
  1338. goto out;
  1339. QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
  1340. card->ip_tbd_list = kzalloc(sizeof(struct list_head), GFP_KERNEL);
  1341. if (!card->ip_tbd_list) {
  1342. QETH_DBF_TEXT(SETUP, 0, "iptbdnom");
  1343. goto out_card;
  1344. }
  1345. if (qeth_setup_channel(&card->read))
  1346. goto out_ip;
  1347. if (qeth_setup_channel(&card->write))
  1348. goto out_channel;
  1349. card->options.layer2 = -1;
  1350. card->qeth_service_level.seq_print = qeth_core_sl_print;
  1351. register_service_level(&card->qeth_service_level);
  1352. return card;
  1353. out_channel:
  1354. qeth_clean_channel(&card->read);
  1355. out_ip:
  1356. kfree(card->ip_tbd_list);
  1357. out_card:
  1358. kfree(card);
  1359. out:
  1360. return NULL;
  1361. }
  1362. static int qeth_determine_card_type(struct qeth_card *card)
  1363. {
  1364. int i = 0;
  1365. QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
  1366. card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
  1367. card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
  1368. while (known_devices[i][QETH_DEV_MODEL_IND]) {
  1369. if ((CARD_RDEV(card)->id.dev_type ==
  1370. known_devices[i][QETH_DEV_TYPE_IND]) &&
  1371. (CARD_RDEV(card)->id.dev_model ==
  1372. known_devices[i][QETH_DEV_MODEL_IND])) {
  1373. card->info.type = known_devices[i][QETH_DEV_MODEL_IND];
  1374. card->qdio.no_out_queues =
  1375. known_devices[i][QETH_QUEUE_NO_IND];
  1376. card->qdio.no_in_queues = 1;
  1377. card->info.is_multicast_different =
  1378. known_devices[i][QETH_MULTICAST_IND];
  1379. qeth_update_from_chp_desc(card);
  1380. return 0;
  1381. }
  1382. i++;
  1383. }
  1384. card->info.type = QETH_CARD_TYPE_UNKNOWN;
  1385. dev_err(&card->gdev->dev, "The adapter hardware is of an "
  1386. "unknown type\n");
  1387. return -ENOENT;
  1388. }
  1389. static int qeth_clear_channel(struct qeth_channel *channel)
  1390. {
  1391. unsigned long flags;
  1392. struct qeth_card *card;
  1393. int rc;
  1394. card = CARD_FROM_CDEV(channel->ccwdev);
  1395. QETH_CARD_TEXT(card, 3, "clearch");
  1396. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1397. rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
  1398. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1399. if (rc)
  1400. return rc;
  1401. rc = wait_event_interruptible_timeout(card->wait_q,
  1402. channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
  1403. if (rc == -ERESTARTSYS)
  1404. return rc;
  1405. if (channel->state != CH_STATE_STOPPED)
  1406. return -ETIME;
  1407. channel->state = CH_STATE_DOWN;
  1408. return 0;
  1409. }
  1410. static int qeth_halt_channel(struct qeth_channel *channel)
  1411. {
  1412. unsigned long flags;
  1413. struct qeth_card *card;
  1414. int rc;
  1415. card = CARD_FROM_CDEV(channel->ccwdev);
  1416. QETH_CARD_TEXT(card, 3, "haltch");
  1417. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1418. rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
  1419. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1420. if (rc)
  1421. return rc;
  1422. rc = wait_event_interruptible_timeout(card->wait_q,
  1423. channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
  1424. if (rc == -ERESTARTSYS)
  1425. return rc;
  1426. if (channel->state != CH_STATE_HALTED)
  1427. return -ETIME;
  1428. return 0;
  1429. }
  1430. static int qeth_halt_channels(struct qeth_card *card)
  1431. {
  1432. int rc1 = 0, rc2 = 0, rc3 = 0;
  1433. QETH_CARD_TEXT(card, 3, "haltchs");
  1434. rc1 = qeth_halt_channel(&card->read);
  1435. rc2 = qeth_halt_channel(&card->write);
  1436. rc3 = qeth_halt_channel(&card->data);
  1437. if (rc1)
  1438. return rc1;
  1439. if (rc2)
  1440. return rc2;
  1441. return rc3;
  1442. }
  1443. static int qeth_clear_channels(struct qeth_card *card)
  1444. {
  1445. int rc1 = 0, rc2 = 0, rc3 = 0;
  1446. QETH_CARD_TEXT(card, 3, "clearchs");
  1447. rc1 = qeth_clear_channel(&card->read);
  1448. rc2 = qeth_clear_channel(&card->write);
  1449. rc3 = qeth_clear_channel(&card->data);
  1450. if (rc1)
  1451. return rc1;
  1452. if (rc2)
  1453. return rc2;
  1454. return rc3;
  1455. }
  1456. static int qeth_clear_halt_card(struct qeth_card *card, int halt)
  1457. {
  1458. int rc = 0;
  1459. QETH_CARD_TEXT(card, 3, "clhacrd");
  1460. if (halt)
  1461. rc = qeth_halt_channels(card);
  1462. if (rc)
  1463. return rc;
  1464. return qeth_clear_channels(card);
  1465. }
  1466. int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
  1467. {
  1468. int rc = 0;
  1469. QETH_CARD_TEXT(card, 3, "qdioclr");
  1470. switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
  1471. QETH_QDIO_CLEANING)) {
  1472. case QETH_QDIO_ESTABLISHED:
  1473. if (card->info.type == QETH_CARD_TYPE_IQD)
  1474. rc = qdio_shutdown(CARD_DDEV(card),
  1475. QDIO_FLAG_CLEANUP_USING_HALT);
  1476. else
  1477. rc = qdio_shutdown(CARD_DDEV(card),
  1478. QDIO_FLAG_CLEANUP_USING_CLEAR);
  1479. if (rc)
  1480. QETH_CARD_TEXT_(card, 3, "1err%d", rc);
  1481. atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
  1482. break;
  1483. case QETH_QDIO_CLEANING:
  1484. return rc;
  1485. default:
  1486. break;
  1487. }
  1488. rc = qeth_clear_halt_card(card, use_halt);
  1489. if (rc)
  1490. QETH_CARD_TEXT_(card, 3, "2err%d", rc);
  1491. card->state = CARD_STATE_DOWN;
  1492. return rc;
  1493. }
  1494. EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
  1495. static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
  1496. int *length)
  1497. {
  1498. struct ciw *ciw;
  1499. char *rcd_buf;
  1500. int ret;
  1501. struct qeth_channel *channel = &card->data;
  1502. unsigned long flags;
  1503. /*
  1504. * scan for RCD command in extended SenseID data
  1505. */
  1506. ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
  1507. if (!ciw || ciw->cmd == 0)
  1508. return -EOPNOTSUPP;
  1509. rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
  1510. if (!rcd_buf)
  1511. return -ENOMEM;
  1512. channel->ccw.cmd_code = ciw->cmd;
  1513. channel->ccw.cda = (__u32) __pa(rcd_buf);
  1514. channel->ccw.count = ciw->count;
  1515. channel->ccw.flags = CCW_FLAG_SLI;
  1516. channel->state = CH_STATE_RCD;
  1517. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1518. ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
  1519. QETH_RCD_PARM, LPM_ANYPATH, 0,
  1520. QETH_RCD_TIMEOUT);
  1521. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1522. if (!ret)
  1523. wait_event(card->wait_q,
  1524. (channel->state == CH_STATE_RCD_DONE ||
  1525. channel->state == CH_STATE_DOWN));
  1526. if (channel->state == CH_STATE_DOWN)
  1527. ret = -EIO;
  1528. else
  1529. channel->state = CH_STATE_DOWN;
  1530. if (ret) {
  1531. kfree(rcd_buf);
  1532. *buffer = NULL;
  1533. *length = 0;
  1534. } else {
  1535. *length = ciw->count;
  1536. *buffer = rcd_buf;
  1537. }
  1538. return ret;
  1539. }
  1540. static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd)
  1541. {
  1542. QETH_DBF_TEXT(SETUP, 2, "cfgunit");
  1543. card->info.chpid = prcd[30];
  1544. card->info.unit_addr2 = prcd[31];
  1545. card->info.cula = prcd[63];
  1546. card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
  1547. (prcd[0x11] == _ascebc['M']));
  1548. }
  1549. static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd)
  1550. {
  1551. QETH_DBF_TEXT(SETUP, 2, "cfgblkt");
  1552. if (prcd[74] == 0xF0 && prcd[75] == 0xF0 &&
  1553. prcd[76] >= 0xF1 && prcd[76] <= 0xF4) {
  1554. card->info.blkt.time_total = 0;
  1555. card->info.blkt.inter_packet = 0;
  1556. card->info.blkt.inter_packet_jumbo = 0;
  1557. } else {
  1558. card->info.blkt.time_total = 250;
  1559. card->info.blkt.inter_packet = 5;
  1560. card->info.blkt.inter_packet_jumbo = 15;
  1561. }
  1562. }
  1563. static void qeth_init_tokens(struct qeth_card *card)
  1564. {
  1565. card->token.issuer_rm_w = 0x00010103UL;
  1566. card->token.cm_filter_w = 0x00010108UL;
  1567. card->token.cm_connection_w = 0x0001010aUL;
  1568. card->token.ulp_filter_w = 0x0001010bUL;
  1569. card->token.ulp_connection_w = 0x0001010dUL;
  1570. }
  1571. static void qeth_init_func_level(struct qeth_card *card)
  1572. {
  1573. switch (card->info.type) {
  1574. case QETH_CARD_TYPE_IQD:
  1575. card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD;
  1576. break;
  1577. case QETH_CARD_TYPE_OSD:
  1578. case QETH_CARD_TYPE_OSN:
  1579. card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD;
  1580. break;
  1581. default:
  1582. break;
  1583. }
  1584. }
  1585. static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
  1586. void (*idx_reply_cb)(struct qeth_channel *,
  1587. struct qeth_cmd_buffer *))
  1588. {
  1589. struct qeth_cmd_buffer *iob;
  1590. unsigned long flags;
  1591. int rc;
  1592. struct qeth_card *card;
  1593. QETH_DBF_TEXT(SETUP, 2, "idxanswr");
  1594. card = CARD_FROM_CDEV(channel->ccwdev);
  1595. iob = qeth_get_buffer(channel);
  1596. iob->callback = idx_reply_cb;
  1597. memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
  1598. channel->ccw.count = QETH_BUFSIZE;
  1599. channel->ccw.cda = (__u32) __pa(iob->data);
  1600. wait_event(card->wait_q,
  1601. atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
  1602. QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
  1603. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1604. rc = ccw_device_start(channel->ccwdev,
  1605. &channel->ccw, (addr_t) iob, 0, 0);
  1606. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1607. if (rc) {
  1608. QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
  1609. QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
  1610. atomic_set(&channel->irq_pending, 0);
  1611. wake_up(&card->wait_q);
  1612. return rc;
  1613. }
  1614. rc = wait_event_interruptible_timeout(card->wait_q,
  1615. channel->state == CH_STATE_UP, QETH_TIMEOUT);
  1616. if (rc == -ERESTARTSYS)
  1617. return rc;
  1618. if (channel->state != CH_STATE_UP) {
  1619. rc = -ETIME;
  1620. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  1621. qeth_clear_cmd_buffers(channel);
  1622. } else
  1623. rc = 0;
  1624. return rc;
  1625. }
  1626. static int qeth_idx_activate_channel(struct qeth_channel *channel,
  1627. void (*idx_reply_cb)(struct qeth_channel *,
  1628. struct qeth_cmd_buffer *))
  1629. {
  1630. struct qeth_card *card;
  1631. struct qeth_cmd_buffer *iob;
  1632. unsigned long flags;
  1633. __u16 temp;
  1634. __u8 tmp;
  1635. int rc;
  1636. struct ccw_dev_id temp_devid;
  1637. card = CARD_FROM_CDEV(channel->ccwdev);
  1638. QETH_DBF_TEXT(SETUP, 2, "idxactch");
  1639. iob = qeth_get_buffer(channel);
  1640. iob->callback = idx_reply_cb;
  1641. memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
  1642. channel->ccw.count = IDX_ACTIVATE_SIZE;
  1643. channel->ccw.cda = (__u32) __pa(iob->data);
  1644. if (channel == &card->write) {
  1645. memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
  1646. memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
  1647. &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
  1648. card->seqno.trans_hdr++;
  1649. } else {
  1650. memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
  1651. memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
  1652. &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
  1653. }
  1654. tmp = ((__u8)card->info.portno) | 0x80;
  1655. memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
  1656. memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
  1657. &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
  1658. memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
  1659. &card->info.func_level, sizeof(__u16));
  1660. ccw_device_get_id(CARD_DDEV(card), &temp_devid);
  1661. memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
  1662. temp = (card->info.cula << 8) + card->info.unit_addr2;
  1663. memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
  1664. wait_event(card->wait_q,
  1665. atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
  1666. QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
  1667. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1668. rc = ccw_device_start(channel->ccwdev,
  1669. &channel->ccw, (addr_t) iob, 0, 0);
  1670. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1671. if (rc) {
  1672. QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
  1673. rc);
  1674. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  1675. atomic_set(&channel->irq_pending, 0);
  1676. wake_up(&card->wait_q);
  1677. return rc;
  1678. }
  1679. rc = wait_event_interruptible_timeout(card->wait_q,
  1680. channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
  1681. if (rc == -ERESTARTSYS)
  1682. return rc;
  1683. if (channel->state != CH_STATE_ACTIVATING) {
  1684. dev_warn(&channel->ccwdev->dev, "The qeth device driver"
  1685. " failed to recover an error on the device\n");
  1686. QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n",
  1687. dev_name(&channel->ccwdev->dev));
  1688. QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
  1689. qeth_clear_cmd_buffers(channel);
  1690. return -ETIME;
  1691. }
  1692. return qeth_idx_activate_get_answer(channel, idx_reply_cb);
  1693. }
  1694. static int qeth_peer_func_level(int level)
  1695. {
  1696. if ((level & 0xff) == 8)
  1697. return (level & 0xff) + 0x400;
  1698. if (((level >> 8) & 3) == 1)
  1699. return (level & 0xff) + 0x200;
  1700. return level;
  1701. }
  1702. static void qeth_idx_write_cb(struct qeth_channel *channel,
  1703. struct qeth_cmd_buffer *iob)
  1704. {
  1705. struct qeth_card *card;
  1706. __u16 temp;
  1707. QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
  1708. if (channel->state == CH_STATE_DOWN) {
  1709. channel->state = CH_STATE_ACTIVATING;
  1710. goto out;
  1711. }
  1712. card = CARD_FROM_CDEV(channel->ccwdev);
  1713. if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
  1714. if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL)
  1715. dev_err(&card->write.ccwdev->dev,
  1716. "The adapter is used exclusively by another "
  1717. "host\n");
  1718. else
  1719. QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:"
  1720. " negative reply\n",
  1721. dev_name(&card->write.ccwdev->dev));
  1722. goto out;
  1723. }
  1724. memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
  1725. if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
  1726. QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: "
  1727. "function level mismatch (sent: 0x%x, received: "
  1728. "0x%x)\n", dev_name(&card->write.ccwdev->dev),
  1729. card->info.func_level, temp);
  1730. goto out;
  1731. }
  1732. channel->state = CH_STATE_UP;
  1733. out:
  1734. qeth_release_buffer(channel, iob);
  1735. }
  1736. static void qeth_idx_read_cb(struct qeth_channel *channel,
  1737. struct qeth_cmd_buffer *iob)
  1738. {
  1739. struct qeth_card *card;
  1740. __u16 temp;
  1741. QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
  1742. if (channel->state == CH_STATE_DOWN) {
  1743. channel->state = CH_STATE_ACTIVATING;
  1744. goto out;
  1745. }
  1746. card = CARD_FROM_CDEV(channel->ccwdev);
  1747. if (qeth_check_idx_response(card, iob->data))
  1748. goto out;
  1749. if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
  1750. switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) {
  1751. case QETH_IDX_ACT_ERR_EXCL:
  1752. dev_err(&card->write.ccwdev->dev,
  1753. "The adapter is used exclusively by another "
  1754. "host\n");
  1755. break;
  1756. case QETH_IDX_ACT_ERR_AUTH:
  1757. case QETH_IDX_ACT_ERR_AUTH_USER:
  1758. dev_err(&card->read.ccwdev->dev,
  1759. "Setting the device online failed because of "
  1760. "insufficient authorization\n");
  1761. break;
  1762. default:
  1763. QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:"
  1764. " negative reply\n",
  1765. dev_name(&card->read.ccwdev->dev));
  1766. }
  1767. QETH_CARD_TEXT_(card, 2, "idxread%c",
  1768. QETH_IDX_ACT_CAUSE_CODE(iob->data));
  1769. goto out;
  1770. }
  1771. /**
  1772. * * temporary fix for microcode bug
  1773. * * to revert it,replace OR by AND
  1774. * */
  1775. if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) ||
  1776. (card->info.type == QETH_CARD_TYPE_OSD))
  1777. card->info.portname_required = 1;
  1778. memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
  1779. if (temp != qeth_peer_func_level(card->info.func_level)) {
  1780. QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function "
  1781. "level mismatch (sent: 0x%x, received: 0x%x)\n",
  1782. dev_name(&card->read.ccwdev->dev),
  1783. card->info.func_level, temp);
  1784. goto out;
  1785. }
  1786. memcpy(&card->token.issuer_rm_r,
  1787. QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
  1788. QETH_MPC_TOKEN_LENGTH);
  1789. memcpy(&card->info.mcl_level[0],
  1790. QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
  1791. channel->state = CH_STATE_UP;
  1792. out:
  1793. qeth_release_buffer(channel, iob);
  1794. }
  1795. void qeth_prepare_control_data(struct qeth_card *card, int len,
  1796. struct qeth_cmd_buffer *iob)
  1797. {
  1798. qeth_setup_ccw(&card->write, iob->data, len);
  1799. iob->callback = qeth_release_buffer;
  1800. memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
  1801. &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
  1802. card->seqno.trans_hdr++;
  1803. memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
  1804. &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
  1805. card->seqno.pdu_hdr++;
  1806. memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
  1807. &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
  1808. QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
  1809. }
  1810. EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
  1811. int qeth_send_control_data(struct qeth_card *card, int len,
  1812. struct qeth_cmd_buffer *iob,
  1813. int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
  1814. unsigned long),
  1815. void *reply_param)
  1816. {
  1817. int rc;
  1818. unsigned long flags;
  1819. struct qeth_reply *reply = NULL;
  1820. unsigned long timeout, event_timeout;
  1821. struct qeth_ipa_cmd *cmd;
  1822. QETH_CARD_TEXT(card, 2, "sendctl");
  1823. if (card->read_or_write_problem) {
  1824. qeth_release_buffer(iob->channel, iob);
  1825. return -EIO;
  1826. }
  1827. reply = qeth_alloc_reply(card);
  1828. if (!reply) {
  1829. return -ENOMEM;
  1830. }
  1831. reply->callback = reply_cb;
  1832. reply->param = reply_param;
  1833. if (card->state == CARD_STATE_DOWN)
  1834. reply->seqno = QETH_IDX_COMMAND_SEQNO;
  1835. else
  1836. reply->seqno = card->seqno.ipa++;
  1837. init_waitqueue_head(&reply->wait_q);
  1838. spin_lock_irqsave(&card->lock, flags);
  1839. list_add_tail(&reply->list, &card->cmd_waiter_list);
  1840. spin_unlock_irqrestore(&card->lock, flags);
  1841. QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
  1842. while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
  1843. qeth_prepare_control_data(card, len, iob);
  1844. if (IS_IPA(iob->data))
  1845. event_timeout = QETH_IPA_TIMEOUT;
  1846. else
  1847. event_timeout = QETH_TIMEOUT;
  1848. timeout = jiffies + event_timeout;
  1849. QETH_CARD_TEXT(card, 6, "noirqpnd");
  1850. spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
  1851. rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
  1852. (addr_t) iob, 0, 0);
  1853. spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
  1854. if (rc) {
  1855. QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: "
  1856. "ccw_device_start rc = %i\n",
  1857. dev_name(&card->write.ccwdev->dev), rc);
  1858. QETH_CARD_TEXT_(card, 2, " err%d", rc);
  1859. spin_lock_irqsave(&card->lock, flags);
  1860. list_del_init(&reply->list);
  1861. qeth_put_reply(reply);
  1862. spin_unlock_irqrestore(&card->lock, flags);
  1863. qeth_release_buffer(iob->channel, iob);
  1864. atomic_set(&card->write.irq_pending, 0);
  1865. wake_up(&card->wait_q);
  1866. return rc;
  1867. }
  1868. /* we have only one long running ipassist, since we can ensure
  1869. process context of this command we can sleep */
  1870. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  1871. if ((cmd->hdr.command == IPA_CMD_SETIP) &&
  1872. (cmd->hdr.prot_version == QETH_PROT_IPV4)) {
  1873. if (!wait_event_timeout(reply->wait_q,
  1874. atomic_read(&reply->received), event_timeout))
  1875. goto time_err;
  1876. } else {
  1877. while (!atomic_read(&reply->received)) {
  1878. if (time_after(jiffies, timeout))
  1879. goto time_err;
  1880. cpu_relax();
  1881. }
  1882. }
  1883. if (reply->rc == -EIO)
  1884. goto error;
  1885. rc = reply->rc;
  1886. qeth_put_reply(reply);
  1887. return rc;
  1888. time_err:
  1889. reply->rc = -ETIME;
  1890. spin_lock_irqsave(&reply->card->lock, flags);
  1891. list_del_init(&reply->list);
  1892. spin_unlock_irqrestore(&reply->card->lock, flags);
  1893. atomic_inc(&reply->received);
  1894. error:
  1895. atomic_set(&card->write.irq_pending, 0);
  1896. qeth_release_buffer(iob->channel, iob);
  1897. card->write.buf_no = (card->write.buf_no + 1) % QETH_CMD_BUFFER_NO;
  1898. rc = reply->rc;
  1899. qeth_put_reply(reply);
  1900. return rc;
  1901. }
  1902. EXPORT_SYMBOL_GPL(qeth_send_control_data);
  1903. static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
  1904. unsigned long data)
  1905. {
  1906. struct qeth_cmd_buffer *iob;
  1907. QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
  1908. iob = (struct qeth_cmd_buffer *) data;
  1909. memcpy(&card->token.cm_filter_r,
  1910. QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
  1911. QETH_MPC_TOKEN_LENGTH);
  1912. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  1913. return 0;
  1914. }
  1915. static int qeth_cm_enable(struct qeth_card *card)
  1916. {
  1917. int rc;
  1918. struct qeth_cmd_buffer *iob;
  1919. QETH_DBF_TEXT(SETUP, 2, "cmenable");
  1920. iob = qeth_wait_for_buffer(&card->write);
  1921. memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
  1922. memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
  1923. &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
  1924. memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
  1925. &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
  1926. rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
  1927. qeth_cm_enable_cb, NULL);
  1928. return rc;
  1929. }
  1930. static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
  1931. unsigned long data)
  1932. {
  1933. struct qeth_cmd_buffer *iob;
  1934. QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
  1935. iob = (struct qeth_cmd_buffer *) data;
  1936. memcpy(&card->token.cm_connection_r,
  1937. QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
  1938. QETH_MPC_TOKEN_LENGTH);
  1939. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  1940. return 0;
  1941. }
  1942. static int qeth_cm_setup(struct qeth_card *card)
  1943. {
  1944. int rc;
  1945. struct qeth_cmd_buffer *iob;
  1946. QETH_DBF_TEXT(SETUP, 2, "cmsetup");
  1947. iob = qeth_wait_for_buffer(&card->write);
  1948. memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
  1949. memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
  1950. &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
  1951. memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
  1952. &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
  1953. memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
  1954. &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
  1955. rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
  1956. qeth_cm_setup_cb, NULL);
  1957. return rc;
  1958. }
  1959. static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card)
  1960. {
  1961. switch (card->info.type) {
  1962. case QETH_CARD_TYPE_UNKNOWN:
  1963. return 1500;
  1964. case QETH_CARD_TYPE_IQD:
  1965. return card->info.max_mtu;
  1966. case QETH_CARD_TYPE_OSD:
  1967. switch (card->info.link_type) {
  1968. case QETH_LINK_TYPE_HSTR:
  1969. case QETH_LINK_TYPE_LANE_TR:
  1970. return 2000;
  1971. default:
  1972. return card->options.layer2 ? 1500 : 1492;
  1973. }
  1974. case QETH_CARD_TYPE_OSM:
  1975. case QETH_CARD_TYPE_OSX:
  1976. return card->options.layer2 ? 1500 : 1492;
  1977. default:
  1978. return 1500;
  1979. }
  1980. }
  1981. static inline int qeth_get_mtu_outof_framesize(int framesize)
  1982. {
  1983. switch (framesize) {
  1984. case 0x4000:
  1985. return 8192;
  1986. case 0x6000:
  1987. return 16384;
  1988. case 0xa000:
  1989. return 32768;
  1990. case 0xffff:
  1991. return 57344;
  1992. default:
  1993. return 0;
  1994. }
  1995. }
  1996. static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
  1997. {
  1998. switch (card->info.type) {
  1999. case QETH_CARD_TYPE_OSD:
  2000. case QETH_CARD_TYPE_OSM:
  2001. case QETH_CARD_TYPE_OSX:
  2002. case QETH_CARD_TYPE_IQD:
  2003. return ((mtu >= 576) &&
  2004. (mtu <= card->info.max_mtu));
  2005. case QETH_CARD_TYPE_OSN:
  2006. case QETH_CARD_TYPE_UNKNOWN:
  2007. default:
  2008. return 1;
  2009. }
  2010. }
  2011. static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
  2012. unsigned long data)
  2013. {
  2014. __u16 mtu, framesize;
  2015. __u16 len;
  2016. __u8 link_type;
  2017. struct qeth_cmd_buffer *iob;
  2018. QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
  2019. iob = (struct qeth_cmd_buffer *) data;
  2020. memcpy(&card->token.ulp_filter_r,
  2021. QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
  2022. QETH_MPC_TOKEN_LENGTH);
  2023. if (card->info.type == QETH_CARD_TYPE_IQD) {
  2024. memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
  2025. mtu = qeth_get_mtu_outof_framesize(framesize);
  2026. if (!mtu) {
  2027. iob->rc = -EINVAL;
  2028. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  2029. return 0;
  2030. }
  2031. if (card->info.initial_mtu && (card->info.initial_mtu != mtu)) {
  2032. /* frame size has changed */
  2033. if (card->dev &&
  2034. ((card->dev->mtu == card->info.initial_mtu) ||
  2035. (card->dev->mtu > mtu)))
  2036. card->dev->mtu = mtu;
  2037. qeth_free_qdio_buffers(card);
  2038. }
  2039. card->info.initial_mtu = mtu;
  2040. card->info.max_mtu = mtu;
  2041. card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
  2042. } else {
  2043. card->info.max_mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU(
  2044. iob->data);
  2045. card->info.initial_mtu = min(card->info.max_mtu,
  2046. qeth_get_initial_mtu_for_card(card));
  2047. card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
  2048. }
  2049. memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
  2050. if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
  2051. memcpy(&link_type,
  2052. QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
  2053. card->info.link_type = link_type;
  2054. } else
  2055. card->info.link_type = 0;
  2056. QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type);
  2057. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  2058. return 0;
  2059. }
  2060. static int qeth_ulp_enable(struct qeth_card *card)
  2061. {
  2062. int rc;
  2063. char prot_type;
  2064. struct qeth_cmd_buffer *iob;
  2065. /*FIXME: trace view callbacks*/
  2066. QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
  2067. iob = qeth_wait_for_buffer(&card->write);
  2068. memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
  2069. *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
  2070. (__u8) card->info.portno;
  2071. if (card->options.layer2)
  2072. if (card->info.type == QETH_CARD_TYPE_OSN)
  2073. prot_type = QETH_PROT_OSN2;
  2074. else
  2075. prot_type = QETH_PROT_LAYER2;
  2076. else
  2077. prot_type = QETH_PROT_TCPIP;
  2078. memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
  2079. memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
  2080. &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
  2081. memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
  2082. &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
  2083. memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data),
  2084. card->info.portname, 9);
  2085. rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
  2086. qeth_ulp_enable_cb, NULL);
  2087. return rc;
  2088. }
  2089. static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
  2090. unsigned long data)
  2091. {
  2092. struct qeth_cmd_buffer *iob;
  2093. QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
  2094. iob = (struct qeth_cmd_buffer *) data;
  2095. memcpy(&card->token.ulp_connection_r,
  2096. QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
  2097. QETH_MPC_TOKEN_LENGTH);
  2098. if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
  2099. 3)) {
  2100. QETH_DBF_TEXT(SETUP, 2, "olmlimit");
  2101. dev_err(&card->gdev->dev, "A connection could not be "
  2102. "established because of an OLM limit\n");
  2103. iob->rc = -EMLINK;
  2104. }
  2105. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  2106. return 0;
  2107. }
  2108. static int qeth_ulp_setup(struct qeth_card *card)
  2109. {
  2110. int rc;
  2111. __u16 temp;
  2112. struct qeth_cmd_buffer *iob;
  2113. struct ccw_dev_id dev_id;
  2114. QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
  2115. iob = qeth_wait_for_buffer(&card->write);
  2116. memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
  2117. memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
  2118. &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
  2119. memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
  2120. &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
  2121. memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
  2122. &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
  2123. ccw_device_get_id(CARD_DDEV(card), &dev_id);
  2124. memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
  2125. temp = (card->info.cula << 8) + card->info.unit_addr2;
  2126. memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
  2127. rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
  2128. qeth_ulp_setup_cb, NULL);
  2129. return rc;
  2130. }
  2131. static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *q, int bidx)
  2132. {
  2133. int rc;
  2134. struct qeth_qdio_out_buffer *newbuf;
  2135. rc = 0;
  2136. newbuf = kmem_cache_zalloc(qeth_qdio_outbuf_cache, GFP_ATOMIC);
  2137. if (!newbuf) {
  2138. rc = -ENOMEM;
  2139. goto out;
  2140. }
  2141. newbuf->buffer = q->qdio_bufs[bidx];
  2142. skb_queue_head_init(&newbuf->skb_list);
  2143. lockdep_set_class(&newbuf->skb_list.lock, &qdio_out_skb_queue_key);
  2144. newbuf->q = q;
  2145. newbuf->aob = NULL;
  2146. newbuf->next_pending = q->bufs[bidx];
  2147. atomic_set(&newbuf->state, QETH_QDIO_BUF_EMPTY);
  2148. q->bufs[bidx] = newbuf;
  2149. if (q->bufstates) {
  2150. q->bufstates[bidx].user = newbuf;
  2151. QETH_CARD_TEXT_(q->card, 2, "nbs%d", bidx);
  2152. QETH_CARD_TEXT_(q->card, 2, "%lx", (long) newbuf);
  2153. QETH_CARD_TEXT_(q->card, 2, "%lx",
  2154. (long) newbuf->next_pending);
  2155. }
  2156. out:
  2157. return rc;
  2158. }
  2159. static void qeth_free_qdio_out_buf(struct qeth_qdio_out_q *q)
  2160. {
  2161. if (!q)
  2162. return;
  2163. qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
  2164. kfree(q);
  2165. }
  2166. static struct qeth_qdio_out_q *qeth_alloc_qdio_out_buf(void)
  2167. {
  2168. struct qeth_qdio_out_q *q = kzalloc(sizeof(*q), GFP_KERNEL);
  2169. if (!q)
  2170. return NULL;
  2171. if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) {
  2172. kfree(q);
  2173. return NULL;
  2174. }
  2175. return q;
  2176. }
  2177. static int qeth_alloc_qdio_buffers(struct qeth_card *card)
  2178. {
  2179. int i, j;
  2180. QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
  2181. if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
  2182. QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
  2183. return 0;
  2184. QETH_DBF_TEXT(SETUP, 2, "inq");
  2185. card->qdio.in_q = qeth_alloc_qdio_queue();
  2186. if (!card->qdio.in_q)
  2187. goto out_nomem;
  2188. /* inbound buffer pool */
  2189. if (qeth_alloc_buffer_pool(card))
  2190. goto out_freeinq;
  2191. /* outbound */
  2192. card->qdio.out_qs =
  2193. kzalloc(card->qdio.no_out_queues *
  2194. sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
  2195. if (!card->qdio.out_qs)
  2196. goto out_freepool;
  2197. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  2198. card->qdio.out_qs[i] = qeth_alloc_qdio_out_buf();
  2199. if (!card->qdio.out_qs[i])
  2200. goto out_freeoutq;
  2201. QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
  2202. QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
  2203. card->qdio.out_qs[i]->queue_no = i;
  2204. /* give outbound qeth_qdio_buffers their qdio_buffers */
  2205. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
  2206. WARN_ON(card->qdio.out_qs[i]->bufs[j] != NULL);
  2207. if (qeth_init_qdio_out_buf(card->qdio.out_qs[i], j))
  2208. goto out_freeoutqbufs;
  2209. }
  2210. }
  2211. /* completion */
  2212. if (qeth_alloc_cq(card))
  2213. goto out_freeoutq;
  2214. return 0;
  2215. out_freeoutqbufs:
  2216. while (j > 0) {
  2217. --j;
  2218. kmem_cache_free(qeth_qdio_outbuf_cache,
  2219. card->qdio.out_qs[i]->bufs[j]);
  2220. card->qdio.out_qs[i]->bufs[j] = NULL;
  2221. }
  2222. out_freeoutq:
  2223. while (i > 0) {
  2224. qeth_free_qdio_out_buf(card->qdio.out_qs[--i]);
  2225. qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
  2226. }
  2227. kfree(card->qdio.out_qs);
  2228. card->qdio.out_qs = NULL;
  2229. out_freepool:
  2230. qeth_free_buffer_pool(card);
  2231. out_freeinq:
  2232. qeth_free_qdio_queue(card->qdio.in_q);
  2233. card->qdio.in_q = NULL;
  2234. out_nomem:
  2235. atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
  2236. return -ENOMEM;
  2237. }
  2238. static void qeth_free_qdio_buffers(struct qeth_card *card)
  2239. {
  2240. int i, j;
  2241. if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
  2242. QETH_QDIO_UNINITIALIZED)
  2243. return;
  2244. qeth_free_cq(card);
  2245. cancel_delayed_work_sync(&card->buffer_reclaim_work);
  2246. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
  2247. if (card->qdio.in_q->bufs[j].rx_skb)
  2248. dev_kfree_skb_any(card->qdio.in_q->bufs[j].rx_skb);
  2249. }
  2250. qeth_free_qdio_queue(card->qdio.in_q);
  2251. card->qdio.in_q = NULL;
  2252. /* inbound buffer pool */
  2253. qeth_free_buffer_pool(card);
  2254. /* free outbound qdio_qs */
  2255. if (card->qdio.out_qs) {
  2256. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  2257. qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
  2258. qeth_free_qdio_out_buf(card->qdio.out_qs[i]);
  2259. }
  2260. kfree(card->qdio.out_qs);
  2261. card->qdio.out_qs = NULL;
  2262. }
  2263. }
  2264. static void qeth_create_qib_param_field(struct qeth_card *card,
  2265. char *param_field)
  2266. {
  2267. param_field[0] = _ascebc['P'];
  2268. param_field[1] = _ascebc['C'];
  2269. param_field[2] = _ascebc['I'];
  2270. param_field[3] = _ascebc['T'];
  2271. *((unsigned int *) (&param_field[4])) = QETH_PCI_THRESHOLD_A(card);
  2272. *((unsigned int *) (&param_field[8])) = QETH_PCI_THRESHOLD_B(card);
  2273. *((unsigned int *) (&param_field[12])) = QETH_PCI_TIMER_VALUE(card);
  2274. }
  2275. static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
  2276. char *param_field)
  2277. {
  2278. param_field[16] = _ascebc['B'];
  2279. param_field[17] = _ascebc['L'];
  2280. param_field[18] = _ascebc['K'];
  2281. param_field[19] = _ascebc['T'];
  2282. *((unsigned int *) (&param_field[20])) = card->info.blkt.time_total;
  2283. *((unsigned int *) (&param_field[24])) = card->info.blkt.inter_packet;
  2284. *((unsigned int *) (&param_field[28])) =
  2285. card->info.blkt.inter_packet_jumbo;
  2286. }
  2287. static int qeth_qdio_activate(struct qeth_card *card)
  2288. {
  2289. QETH_DBF_TEXT(SETUP, 3, "qdioact");
  2290. return qdio_activate(CARD_DDEV(card));
  2291. }
  2292. static int qeth_dm_act(struct qeth_card *card)
  2293. {
  2294. int rc;
  2295. struct qeth_cmd_buffer *iob;
  2296. QETH_DBF_TEXT(SETUP, 2, "dmact");
  2297. iob = qeth_wait_for_buffer(&card->write);
  2298. memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
  2299. memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
  2300. &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
  2301. memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
  2302. &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
  2303. rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
  2304. return rc;
  2305. }
  2306. static int qeth_mpc_initialize(struct qeth_card *card)
  2307. {
  2308. int rc;
  2309. QETH_DBF_TEXT(SETUP, 2, "mpcinit");
  2310. rc = qeth_issue_next_read(card);
  2311. if (rc) {
  2312. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  2313. return rc;
  2314. }
  2315. rc = qeth_cm_enable(card);
  2316. if (rc) {
  2317. QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
  2318. goto out_qdio;
  2319. }
  2320. rc = qeth_cm_setup(card);
  2321. if (rc) {
  2322. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  2323. goto out_qdio;
  2324. }
  2325. rc = qeth_ulp_enable(card);
  2326. if (rc) {
  2327. QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
  2328. goto out_qdio;
  2329. }
  2330. rc = qeth_ulp_setup(card);
  2331. if (rc) {
  2332. QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
  2333. goto out_qdio;
  2334. }
  2335. rc = qeth_alloc_qdio_buffers(card);
  2336. if (rc) {
  2337. QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
  2338. goto out_qdio;
  2339. }
  2340. rc = qeth_qdio_establish(card);
  2341. if (rc) {
  2342. QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
  2343. qeth_free_qdio_buffers(card);
  2344. goto out_qdio;
  2345. }
  2346. rc = qeth_qdio_activate(card);
  2347. if (rc) {
  2348. QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
  2349. goto out_qdio;
  2350. }
  2351. rc = qeth_dm_act(card);
  2352. if (rc) {
  2353. QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
  2354. goto out_qdio;
  2355. }
  2356. return 0;
  2357. out_qdio:
  2358. qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
  2359. qdio_free(CARD_DDEV(card));
  2360. return rc;
  2361. }
  2362. static void qeth_print_status_with_portname(struct qeth_card *card)
  2363. {
  2364. char dbf_text[15];
  2365. int i;
  2366. sprintf(dbf_text, "%s", card->info.portname + 1);
  2367. for (i = 0; i < 8; i++)
  2368. dbf_text[i] =
  2369. (char) _ebcasc[(__u8) dbf_text[i]];
  2370. dbf_text[8] = 0;
  2371. dev_info(&card->gdev->dev, "Device is a%s card%s%s%s\n"
  2372. "with link type %s (portname: %s)\n",
  2373. qeth_get_cardname(card),
  2374. (card->info.mcl_level[0]) ? " (level: " : "",
  2375. (card->info.mcl_level[0]) ? card->info.mcl_level : "",
  2376. (card->info.mcl_level[0]) ? ")" : "",
  2377. qeth_get_cardname_short(card),
  2378. dbf_text);
  2379. }
  2380. static void qeth_print_status_no_portname(struct qeth_card *card)
  2381. {
  2382. if (card->info.portname[0])
  2383. dev_info(&card->gdev->dev, "Device is a%s "
  2384. "card%s%s%s\nwith link type %s "
  2385. "(no portname needed by interface).\n",
  2386. qeth_get_cardname(card),
  2387. (card->info.mcl_level[0]) ? " (level: " : "",
  2388. (card->info.mcl_level[0]) ? card->info.mcl_level : "",
  2389. (card->info.mcl_level[0]) ? ")" : "",
  2390. qeth_get_cardname_short(card));
  2391. else
  2392. dev_info(&card->gdev->dev, "Device is a%s "
  2393. "card%s%s%s\nwith link type %s.\n",
  2394. qeth_get_cardname(card),
  2395. (card->info.mcl_level[0]) ? " (level: " : "",
  2396. (card->info.mcl_level[0]) ? card->info.mcl_level : "",
  2397. (card->info.mcl_level[0]) ? ")" : "",
  2398. qeth_get_cardname_short(card));
  2399. }
  2400. void qeth_print_status_message(struct qeth_card *card)
  2401. {
  2402. switch (card->info.type) {
  2403. case QETH_CARD_TYPE_OSD:
  2404. case QETH_CARD_TYPE_OSM:
  2405. case QETH_CARD_TYPE_OSX:
  2406. /* VM will use a non-zero first character
  2407. * to indicate a HiperSockets like reporting
  2408. * of the level OSA sets the first character to zero
  2409. * */
  2410. if (!card->info.mcl_level[0]) {
  2411. sprintf(card->info.mcl_level, "%02x%02x",
  2412. card->info.mcl_level[2],
  2413. card->info.mcl_level[3]);
  2414. card->info.mcl_level[QETH_MCL_LENGTH] = 0;
  2415. break;
  2416. }
  2417. /* fallthrough */
  2418. case QETH_CARD_TYPE_IQD:
  2419. if ((card->info.guestlan) ||
  2420. (card->info.mcl_level[0] & 0x80)) {
  2421. card->info.mcl_level[0] = (char) _ebcasc[(__u8)
  2422. card->info.mcl_level[0]];
  2423. card->info.mcl_level[1] = (char) _ebcasc[(__u8)
  2424. card->info.mcl_level[1]];
  2425. card->info.mcl_level[2] = (char) _ebcasc[(__u8)
  2426. card->info.mcl_level[2]];
  2427. card->info.mcl_level[3] = (char) _ebcasc[(__u8)
  2428. card->info.mcl_level[3]];
  2429. card->info.mcl_level[QETH_MCL_LENGTH] = 0;
  2430. }
  2431. break;
  2432. default:
  2433. memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
  2434. }
  2435. if (card->info.portname_required)
  2436. qeth_print_status_with_portname(card);
  2437. else
  2438. qeth_print_status_no_portname(card);
  2439. }
  2440. EXPORT_SYMBOL_GPL(qeth_print_status_message);
  2441. static void qeth_initialize_working_pool_list(struct qeth_card *card)
  2442. {
  2443. struct qeth_buffer_pool_entry *entry;
  2444. QETH_CARD_TEXT(card, 5, "inwrklst");
  2445. list_for_each_entry(entry,
  2446. &card->qdio.init_pool.entry_list, init_list) {
  2447. qeth_put_buffer_pool_entry(card, entry);
  2448. }
  2449. }
  2450. static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
  2451. struct qeth_card *card)
  2452. {
  2453. struct list_head *plh;
  2454. struct qeth_buffer_pool_entry *entry;
  2455. int i, free;
  2456. struct page *page;
  2457. if (list_empty(&card->qdio.in_buf_pool.entry_list))
  2458. return NULL;
  2459. list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
  2460. entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
  2461. free = 1;
  2462. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
  2463. if (page_count(virt_to_page(entry->elements[i])) > 1) {
  2464. free = 0;
  2465. break;
  2466. }
  2467. }
  2468. if (free) {
  2469. list_del_init(&entry->list);
  2470. return entry;
  2471. }
  2472. }
  2473. /* no free buffer in pool so take first one and swap pages */
  2474. entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
  2475. struct qeth_buffer_pool_entry, list);
  2476. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
  2477. if (page_count(virt_to_page(entry->elements[i])) > 1) {
  2478. page = alloc_page(GFP_ATOMIC);
  2479. if (!page) {
  2480. return NULL;
  2481. } else {
  2482. free_page((unsigned long)entry->elements[i]);
  2483. entry->elements[i] = page_address(page);
  2484. if (card->options.performance_stats)
  2485. card->perf_stats.sg_alloc_page_rx++;
  2486. }
  2487. }
  2488. }
  2489. list_del_init(&entry->list);
  2490. return entry;
  2491. }
  2492. static int qeth_init_input_buffer(struct qeth_card *card,
  2493. struct qeth_qdio_buffer *buf)
  2494. {
  2495. struct qeth_buffer_pool_entry *pool_entry;
  2496. int i;
  2497. if ((card->options.cq == QETH_CQ_ENABLED) && (!buf->rx_skb)) {
  2498. buf->rx_skb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
  2499. if (!buf->rx_skb)
  2500. return 1;
  2501. }
  2502. pool_entry = qeth_find_free_buffer_pool_entry(card);
  2503. if (!pool_entry)
  2504. return 1;
  2505. /*
  2506. * since the buffer is accessed only from the input_tasklet
  2507. * there shouldn't be a need to synchronize; also, since we use
  2508. * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
  2509. * buffers
  2510. */
  2511. buf->pool_entry = pool_entry;
  2512. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
  2513. buf->buffer->element[i].length = PAGE_SIZE;
  2514. buf->buffer->element[i].addr = pool_entry->elements[i];
  2515. if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
  2516. buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY;
  2517. else
  2518. buf->buffer->element[i].eflags = 0;
  2519. buf->buffer->element[i].sflags = 0;
  2520. }
  2521. return 0;
  2522. }
  2523. int qeth_init_qdio_queues(struct qeth_card *card)
  2524. {
  2525. int i, j;
  2526. int rc;
  2527. QETH_DBF_TEXT(SETUP, 2, "initqdqs");
  2528. /* inbound queue */
  2529. qdio_reset_buffers(card->qdio.in_q->qdio_bufs,
  2530. QDIO_MAX_BUFFERS_PER_Q);
  2531. qeth_initialize_working_pool_list(card);
  2532. /*give only as many buffers to hardware as we have buffer pool entries*/
  2533. for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
  2534. qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
  2535. card->qdio.in_q->next_buf_to_init =
  2536. card->qdio.in_buf_pool.buf_count - 1;
  2537. rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
  2538. card->qdio.in_buf_pool.buf_count - 1);
  2539. if (rc) {
  2540. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  2541. return rc;
  2542. }
  2543. /* completion */
  2544. rc = qeth_cq_init(card);
  2545. if (rc) {
  2546. return rc;
  2547. }
  2548. /* outbound queue */
  2549. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  2550. qdio_reset_buffers(card->qdio.out_qs[i]->qdio_bufs,
  2551. QDIO_MAX_BUFFERS_PER_Q);
  2552. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
  2553. qeth_clear_output_buffer(card->qdio.out_qs[i],
  2554. card->qdio.out_qs[i]->bufs[j],
  2555. QETH_QDIO_BUF_EMPTY);
  2556. }
  2557. card->qdio.out_qs[i]->card = card;
  2558. card->qdio.out_qs[i]->next_buf_to_fill = 0;
  2559. card->qdio.out_qs[i]->do_pack = 0;
  2560. atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
  2561. atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
  2562. atomic_set(&card->qdio.out_qs[i]->state,
  2563. QETH_OUT_Q_UNLOCKED);
  2564. }
  2565. return 0;
  2566. }
  2567. EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
  2568. static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
  2569. {
  2570. switch (link_type) {
  2571. case QETH_LINK_TYPE_HSTR:
  2572. return 2;
  2573. default:
  2574. return 1;
  2575. }
  2576. }
  2577. static void qeth_fill_ipacmd_header(struct qeth_card *card,
  2578. struct qeth_ipa_cmd *cmd, __u8 command,
  2579. enum qeth_prot_versions prot)
  2580. {
  2581. memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
  2582. cmd->hdr.command = command;
  2583. cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
  2584. cmd->hdr.seqno = card->seqno.ipa;
  2585. cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
  2586. cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
  2587. if (card->options.layer2)
  2588. cmd->hdr.prim_version_no = 2;
  2589. else
  2590. cmd->hdr.prim_version_no = 1;
  2591. cmd->hdr.param_count = 1;
  2592. cmd->hdr.prot_version = prot;
  2593. cmd->hdr.ipa_supported = 0;
  2594. cmd->hdr.ipa_enabled = 0;
  2595. }
  2596. struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
  2597. enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
  2598. {
  2599. struct qeth_cmd_buffer *iob;
  2600. struct qeth_ipa_cmd *cmd;
  2601. iob = qeth_wait_for_buffer(&card->write);
  2602. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  2603. qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
  2604. return iob;
  2605. }
  2606. EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
  2607. void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
  2608. char prot_type)
  2609. {
  2610. memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
  2611. memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
  2612. memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
  2613. &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
  2614. }
  2615. EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
  2616. int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
  2617. int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
  2618. unsigned long),
  2619. void *reply_param)
  2620. {
  2621. int rc;
  2622. char prot_type;
  2623. QETH_CARD_TEXT(card, 4, "sendipa");
  2624. if (card->options.layer2)
  2625. if (card->info.type == QETH_CARD_TYPE_OSN)
  2626. prot_type = QETH_PROT_OSN2;
  2627. else
  2628. prot_type = QETH_PROT_LAYER2;
  2629. else
  2630. prot_type = QETH_PROT_TCPIP;
  2631. qeth_prepare_ipa_cmd(card, iob, prot_type);
  2632. rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
  2633. iob, reply_cb, reply_param);
  2634. if (rc == -ETIME) {
  2635. qeth_clear_ipacmd_list(card);
  2636. qeth_schedule_recovery(card);
  2637. }
  2638. return rc;
  2639. }
  2640. EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
  2641. int qeth_send_startlan(struct qeth_card *card)
  2642. {
  2643. int rc;
  2644. struct qeth_cmd_buffer *iob;
  2645. QETH_DBF_TEXT(SETUP, 2, "strtlan");
  2646. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0);
  2647. rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
  2648. return rc;
  2649. }
  2650. EXPORT_SYMBOL_GPL(qeth_send_startlan);
  2651. static int qeth_default_setadapterparms_cb(struct qeth_card *card,
  2652. struct qeth_reply *reply, unsigned long data)
  2653. {
  2654. struct qeth_ipa_cmd *cmd;
  2655. QETH_CARD_TEXT(card, 4, "defadpcb");
  2656. cmd = (struct qeth_ipa_cmd *) data;
  2657. if (cmd->hdr.return_code == 0)
  2658. cmd->hdr.return_code =
  2659. cmd->data.setadapterparms.hdr.return_code;
  2660. return 0;
  2661. }
  2662. static int qeth_query_setadapterparms_cb(struct qeth_card *card,
  2663. struct qeth_reply *reply, unsigned long data)
  2664. {
  2665. struct qeth_ipa_cmd *cmd;
  2666. QETH_CARD_TEXT(card, 3, "quyadpcb");
  2667. cmd = (struct qeth_ipa_cmd *) data;
  2668. if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) {
  2669. card->info.link_type =
  2670. cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
  2671. QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type);
  2672. }
  2673. card->options.adp.supported_funcs =
  2674. cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
  2675. return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
  2676. }
  2677. static struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
  2678. __u32 command, __u32 cmdlen)
  2679. {
  2680. struct qeth_cmd_buffer *iob;
  2681. struct qeth_ipa_cmd *cmd;
  2682. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
  2683. QETH_PROT_IPV4);
  2684. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  2685. cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
  2686. cmd->data.setadapterparms.hdr.command_code = command;
  2687. cmd->data.setadapterparms.hdr.used_total = 1;
  2688. cmd->data.setadapterparms.hdr.seq_no = 1;
  2689. return iob;
  2690. }
  2691. int qeth_query_setadapterparms(struct qeth_card *card)
  2692. {
  2693. int rc;
  2694. struct qeth_cmd_buffer *iob;
  2695. QETH_CARD_TEXT(card, 3, "queryadp");
  2696. iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
  2697. sizeof(struct qeth_ipacmd_setadpparms));
  2698. rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
  2699. return rc;
  2700. }
  2701. EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
  2702. static int qeth_query_ipassists_cb(struct qeth_card *card,
  2703. struct qeth_reply *reply, unsigned long data)
  2704. {
  2705. struct qeth_ipa_cmd *cmd;
  2706. QETH_DBF_TEXT(SETUP, 2, "qipasscb");
  2707. cmd = (struct qeth_ipa_cmd *) data;
  2708. switch (cmd->hdr.return_code) {
  2709. case IPA_RC_NOTSUPP:
  2710. case IPA_RC_L2_UNSUPPORTED_CMD:
  2711. QETH_DBF_TEXT(SETUP, 2, "ipaunsup");
  2712. card->options.ipa4.supported_funcs |= IPA_SETADAPTERPARMS;
  2713. card->options.ipa6.supported_funcs |= IPA_SETADAPTERPARMS;
  2714. return -0;
  2715. default:
  2716. if (cmd->hdr.return_code) {
  2717. QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Unhandled "
  2718. "rc=%d\n",
  2719. dev_name(&card->gdev->dev),
  2720. cmd->hdr.return_code);
  2721. return 0;
  2722. }
  2723. }
  2724. if (cmd->hdr.prot_version == QETH_PROT_IPV4) {
  2725. card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported;
  2726. card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
  2727. } else if (cmd->hdr.prot_version == QETH_PROT_IPV6) {
  2728. card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported;
  2729. card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
  2730. } else
  2731. QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Flawed LIC detected"
  2732. "\n", dev_name(&card->gdev->dev));
  2733. return 0;
  2734. }
  2735. int qeth_query_ipassists(struct qeth_card *card, enum qeth_prot_versions prot)
  2736. {
  2737. int rc;
  2738. struct qeth_cmd_buffer *iob;
  2739. QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot);
  2740. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot);
  2741. rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL);
  2742. return rc;
  2743. }
  2744. EXPORT_SYMBOL_GPL(qeth_query_ipassists);
  2745. static int qeth_query_switch_attributes_cb(struct qeth_card *card,
  2746. struct qeth_reply *reply, unsigned long data)
  2747. {
  2748. struct qeth_ipa_cmd *cmd;
  2749. struct qeth_switch_info *sw_info;
  2750. struct qeth_query_switch_attributes *attrs;
  2751. QETH_CARD_TEXT(card, 2, "qswiatcb");
  2752. cmd = (struct qeth_ipa_cmd *) data;
  2753. sw_info = (struct qeth_switch_info *)reply->param;
  2754. if (cmd->data.setadapterparms.hdr.return_code == 0) {
  2755. attrs = &cmd->data.setadapterparms.data.query_switch_attributes;
  2756. sw_info->capabilities = attrs->capabilities;
  2757. sw_info->settings = attrs->settings;
  2758. QETH_CARD_TEXT_(card, 2, "%04x%04x", sw_info->capabilities,
  2759. sw_info->settings);
  2760. }
  2761. qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
  2762. return 0;
  2763. }
  2764. int qeth_query_switch_attributes(struct qeth_card *card,
  2765. struct qeth_switch_info *sw_info)
  2766. {
  2767. struct qeth_cmd_buffer *iob;
  2768. QETH_CARD_TEXT(card, 2, "qswiattr");
  2769. if (!qeth_adp_supported(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES))
  2770. return -EOPNOTSUPP;
  2771. if (!netif_carrier_ok(card->dev))
  2772. return -ENOMEDIUM;
  2773. iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES,
  2774. sizeof(struct qeth_ipacmd_setadpparms_hdr));
  2775. return qeth_send_ipa_cmd(card, iob,
  2776. qeth_query_switch_attributes_cb, sw_info);
  2777. }
  2778. EXPORT_SYMBOL_GPL(qeth_query_switch_attributes);
  2779. static int qeth_query_setdiagass_cb(struct qeth_card *card,
  2780. struct qeth_reply *reply, unsigned long data)
  2781. {
  2782. struct qeth_ipa_cmd *cmd;
  2783. __u16 rc;
  2784. cmd = (struct qeth_ipa_cmd *)data;
  2785. rc = cmd->hdr.return_code;
  2786. if (rc)
  2787. QETH_CARD_TEXT_(card, 2, "diagq:%x", rc);
  2788. else
  2789. card->info.diagass_support = cmd->data.diagass.ext;
  2790. return 0;
  2791. }
  2792. static int qeth_query_setdiagass(struct qeth_card *card)
  2793. {
  2794. struct qeth_cmd_buffer *iob;
  2795. struct qeth_ipa_cmd *cmd;
  2796. QETH_DBF_TEXT(SETUP, 2, "qdiagass");
  2797. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
  2798. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  2799. cmd->data.diagass.subcmd_len = 16;
  2800. cmd->data.diagass.subcmd = QETH_DIAGS_CMD_QUERY;
  2801. return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL);
  2802. }
  2803. static void qeth_get_trap_id(struct qeth_card *card, struct qeth_trap_id *tid)
  2804. {
  2805. unsigned long info = get_zeroed_page(GFP_KERNEL);
  2806. struct sysinfo_2_2_2 *info222 = (struct sysinfo_2_2_2 *)info;
  2807. struct sysinfo_3_2_2 *info322 = (struct sysinfo_3_2_2 *)info;
  2808. struct ccw_dev_id ccwid;
  2809. int level;
  2810. tid->chpid = card->info.chpid;
  2811. ccw_device_get_id(CARD_RDEV(card), &ccwid);
  2812. tid->ssid = ccwid.ssid;
  2813. tid->devno = ccwid.devno;
  2814. if (!info)
  2815. return;
  2816. level = stsi(NULL, 0, 0, 0);
  2817. if ((level >= 2) && (stsi(info222, 2, 2, 2) == 0))
  2818. tid->lparnr = info222->lpar_number;
  2819. if ((level >= 3) && (stsi(info322, 3, 2, 2) == 0)) {
  2820. EBCASC(info322->vm[0].name, sizeof(info322->vm[0].name));
  2821. memcpy(tid->vmname, info322->vm[0].name, sizeof(tid->vmname));
  2822. }
  2823. free_page(info);
  2824. return;
  2825. }
  2826. static int qeth_hw_trap_cb(struct qeth_card *card,
  2827. struct qeth_reply *reply, unsigned long data)
  2828. {
  2829. struct qeth_ipa_cmd *cmd;
  2830. __u16 rc;
  2831. cmd = (struct qeth_ipa_cmd *)data;
  2832. rc = cmd->hdr.return_code;
  2833. if (rc)
  2834. QETH_CARD_TEXT_(card, 2, "trapc:%x", rc);
  2835. return 0;
  2836. }
  2837. int qeth_hw_trap(struct qeth_card *card, enum qeth_diags_trap_action action)
  2838. {
  2839. struct qeth_cmd_buffer *iob;
  2840. struct qeth_ipa_cmd *cmd;
  2841. QETH_DBF_TEXT(SETUP, 2, "diagtrap");
  2842. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
  2843. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  2844. cmd->data.diagass.subcmd_len = 80;
  2845. cmd->data.diagass.subcmd = QETH_DIAGS_CMD_TRAP;
  2846. cmd->data.diagass.type = 1;
  2847. cmd->data.diagass.action = action;
  2848. switch (action) {
  2849. case QETH_DIAGS_TRAP_ARM:
  2850. cmd->data.diagass.options = 0x0003;
  2851. cmd->data.diagass.ext = 0x00010000 +
  2852. sizeof(struct qeth_trap_id);
  2853. qeth_get_trap_id(card,
  2854. (struct qeth_trap_id *)cmd->data.diagass.cdata);
  2855. break;
  2856. case QETH_DIAGS_TRAP_DISARM:
  2857. cmd->data.diagass.options = 0x0001;
  2858. break;
  2859. case QETH_DIAGS_TRAP_CAPTURE:
  2860. break;
  2861. }
  2862. return qeth_send_ipa_cmd(card, iob, qeth_hw_trap_cb, NULL);
  2863. }
  2864. EXPORT_SYMBOL_GPL(qeth_hw_trap);
  2865. int qeth_check_qdio_errors(struct qeth_card *card, struct qdio_buffer *buf,
  2866. unsigned int qdio_error, const char *dbftext)
  2867. {
  2868. if (qdio_error) {
  2869. QETH_CARD_TEXT(card, 2, dbftext);
  2870. QETH_CARD_TEXT_(card, 2, " F15=%02X",
  2871. buf->element[15].sflags);
  2872. QETH_CARD_TEXT_(card, 2, " F14=%02X",
  2873. buf->element[14].sflags);
  2874. QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error);
  2875. if ((buf->element[15].sflags) == 0x12) {
  2876. card->stats.rx_dropped++;
  2877. return 0;
  2878. } else
  2879. return 1;
  2880. }
  2881. return 0;
  2882. }
  2883. EXPORT_SYMBOL_GPL(qeth_check_qdio_errors);
  2884. static void qeth_buffer_reclaim_work(struct work_struct *work)
  2885. {
  2886. struct qeth_card *card = container_of(work, struct qeth_card,
  2887. buffer_reclaim_work.work);
  2888. QETH_CARD_TEXT_(card, 2, "brw:%x", card->reclaim_index);
  2889. qeth_queue_input_buffer(card, card->reclaim_index);
  2890. }
  2891. void qeth_queue_input_buffer(struct qeth_card *card, int index)
  2892. {
  2893. struct qeth_qdio_q *queue = card->qdio.in_q;
  2894. struct list_head *lh;
  2895. int count;
  2896. int i;
  2897. int rc;
  2898. int newcount = 0;
  2899. count = (index < queue->next_buf_to_init)?
  2900. card->qdio.in_buf_pool.buf_count -
  2901. (queue->next_buf_to_init - index) :
  2902. card->qdio.in_buf_pool.buf_count -
  2903. (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
  2904. /* only requeue at a certain threshold to avoid SIGAs */
  2905. if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
  2906. for (i = queue->next_buf_to_init;
  2907. i < queue->next_buf_to_init + count; ++i) {
  2908. if (qeth_init_input_buffer(card,
  2909. &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
  2910. break;
  2911. } else {
  2912. newcount++;
  2913. }
  2914. }
  2915. if (newcount < count) {
  2916. /* we are in memory shortage so we switch back to
  2917. traditional skb allocation and drop packages */
  2918. atomic_set(&card->force_alloc_skb, 3);
  2919. count = newcount;
  2920. } else {
  2921. atomic_add_unless(&card->force_alloc_skb, -1, 0);
  2922. }
  2923. if (!count) {
  2924. i = 0;
  2925. list_for_each(lh, &card->qdio.in_buf_pool.entry_list)
  2926. i++;
  2927. if (i == card->qdio.in_buf_pool.buf_count) {
  2928. QETH_CARD_TEXT(card, 2, "qsarbw");
  2929. card->reclaim_index = index;
  2930. schedule_delayed_work(
  2931. &card->buffer_reclaim_work,
  2932. QETH_RECLAIM_WORK_TIME);
  2933. }
  2934. return;
  2935. }
  2936. /*
  2937. * according to old code it should be avoided to requeue all
  2938. * 128 buffers in order to benefit from PCI avoidance.
  2939. * this function keeps at least one buffer (the buffer at
  2940. * 'index') un-requeued -> this buffer is the first buffer that
  2941. * will be requeued the next time
  2942. */
  2943. if (card->options.performance_stats) {
  2944. card->perf_stats.inbound_do_qdio_cnt++;
  2945. card->perf_stats.inbound_do_qdio_start_time =
  2946. qeth_get_micros();
  2947. }
  2948. rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
  2949. queue->next_buf_to_init, count);
  2950. if (card->options.performance_stats)
  2951. card->perf_stats.inbound_do_qdio_time +=
  2952. qeth_get_micros() -
  2953. card->perf_stats.inbound_do_qdio_start_time;
  2954. if (rc) {
  2955. QETH_CARD_TEXT(card, 2, "qinberr");
  2956. }
  2957. queue->next_buf_to_init = (queue->next_buf_to_init + count) %
  2958. QDIO_MAX_BUFFERS_PER_Q;
  2959. }
  2960. }
  2961. EXPORT_SYMBOL_GPL(qeth_queue_input_buffer);
  2962. static int qeth_handle_send_error(struct qeth_card *card,
  2963. struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
  2964. {
  2965. int sbalf15 = buffer->buffer->element[15].sflags;
  2966. QETH_CARD_TEXT(card, 6, "hdsnderr");
  2967. if (card->info.type == QETH_CARD_TYPE_IQD) {
  2968. if (sbalf15 == 0) {
  2969. qdio_err = 0;
  2970. } else {
  2971. qdio_err = 1;
  2972. }
  2973. }
  2974. qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr");
  2975. if (!qdio_err)
  2976. return QETH_SEND_ERROR_NONE;
  2977. if ((sbalf15 >= 15) && (sbalf15 <= 31))
  2978. return QETH_SEND_ERROR_RETRY;
  2979. QETH_CARD_TEXT(card, 1, "lnkfail");
  2980. QETH_CARD_TEXT_(card, 1, "%04x %02x",
  2981. (u16)qdio_err, (u8)sbalf15);
  2982. return QETH_SEND_ERROR_LINK_FAILURE;
  2983. }
  2984. /*
  2985. * Switched to packing state if the number of used buffers on a queue
  2986. * reaches a certain limit.
  2987. */
  2988. static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
  2989. {
  2990. if (!queue->do_pack) {
  2991. if (atomic_read(&queue->used_buffers)
  2992. >= QETH_HIGH_WATERMARK_PACK){
  2993. /* switch non-PACKING -> PACKING */
  2994. QETH_CARD_TEXT(queue->card, 6, "np->pack");
  2995. if (queue->card->options.performance_stats)
  2996. queue->card->perf_stats.sc_dp_p++;
  2997. queue->do_pack = 1;
  2998. }
  2999. }
  3000. }
  3001. /*
  3002. * Switches from packing to non-packing mode. If there is a packing
  3003. * buffer on the queue this buffer will be prepared to be flushed.
  3004. * In that case 1 is returned to inform the caller. If no buffer
  3005. * has to be flushed, zero is returned.
  3006. */
  3007. static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
  3008. {
  3009. struct qeth_qdio_out_buffer *buffer;
  3010. int flush_count = 0;
  3011. if (queue->do_pack) {
  3012. if (atomic_read(&queue->used_buffers)
  3013. <= QETH_LOW_WATERMARK_PACK) {
  3014. /* switch PACKING -> non-PACKING */
  3015. QETH_CARD_TEXT(queue->card, 6, "pack->np");
  3016. if (queue->card->options.performance_stats)
  3017. queue->card->perf_stats.sc_p_dp++;
  3018. queue->do_pack = 0;
  3019. /* flush packing buffers */
  3020. buffer = queue->bufs[queue->next_buf_to_fill];
  3021. if ((atomic_read(&buffer->state) ==
  3022. QETH_QDIO_BUF_EMPTY) &&
  3023. (buffer->next_element_to_fill > 0)) {
  3024. atomic_set(&buffer->state,
  3025. QETH_QDIO_BUF_PRIMED);
  3026. flush_count++;
  3027. queue->next_buf_to_fill =
  3028. (queue->next_buf_to_fill + 1) %
  3029. QDIO_MAX_BUFFERS_PER_Q;
  3030. }
  3031. }
  3032. }
  3033. return flush_count;
  3034. }
  3035. /*
  3036. * Called to flush a packing buffer if no more pci flags are on the queue.
  3037. * Checks if there is a packing buffer and prepares it to be flushed.
  3038. * In that case returns 1, otherwise zero.
  3039. */
  3040. static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue)
  3041. {
  3042. struct qeth_qdio_out_buffer *buffer;
  3043. buffer = queue->bufs[queue->next_buf_to_fill];
  3044. if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
  3045. (buffer->next_element_to_fill > 0)) {
  3046. /* it's a packing buffer */
  3047. atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
  3048. queue->next_buf_to_fill =
  3049. (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
  3050. return 1;
  3051. }
  3052. return 0;
  3053. }
  3054. static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
  3055. int count)
  3056. {
  3057. struct qeth_qdio_out_buffer *buf;
  3058. int rc;
  3059. int i;
  3060. unsigned int qdio_flags;
  3061. for (i = index; i < index + count; ++i) {
  3062. int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
  3063. buf = queue->bufs[bidx];
  3064. buf->buffer->element[buf->next_element_to_fill - 1].eflags |=
  3065. SBAL_EFLAGS_LAST_ENTRY;
  3066. if (queue->bufstates)
  3067. queue->bufstates[bidx].user = buf;
  3068. if (queue->card->info.type == QETH_CARD_TYPE_IQD)
  3069. continue;
  3070. if (!queue->do_pack) {
  3071. if ((atomic_read(&queue->used_buffers) >=
  3072. (QETH_HIGH_WATERMARK_PACK -
  3073. QETH_WATERMARK_PACK_FUZZ)) &&
  3074. !atomic_read(&queue->set_pci_flags_count)) {
  3075. /* it's likely that we'll go to packing
  3076. * mode soon */
  3077. atomic_inc(&queue->set_pci_flags_count);
  3078. buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
  3079. }
  3080. } else {
  3081. if (!atomic_read(&queue->set_pci_flags_count)) {
  3082. /*
  3083. * there's no outstanding PCI any more, so we
  3084. * have to request a PCI to be sure the the PCI
  3085. * will wake at some time in the future then we
  3086. * can flush packed buffers that might still be
  3087. * hanging around, which can happen if no
  3088. * further send was requested by the stack
  3089. */
  3090. atomic_inc(&queue->set_pci_flags_count);
  3091. buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
  3092. }
  3093. }
  3094. }
  3095. queue->card->dev->trans_start = jiffies;
  3096. if (queue->card->options.performance_stats) {
  3097. queue->card->perf_stats.outbound_do_qdio_cnt++;
  3098. queue->card->perf_stats.outbound_do_qdio_start_time =
  3099. qeth_get_micros();
  3100. }
  3101. qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
  3102. if (atomic_read(&queue->set_pci_flags_count))
  3103. qdio_flags |= QDIO_FLAG_PCI_OUT;
  3104. rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
  3105. queue->queue_no, index, count);
  3106. if (queue->card->options.performance_stats)
  3107. queue->card->perf_stats.outbound_do_qdio_time +=
  3108. qeth_get_micros() -
  3109. queue->card->perf_stats.outbound_do_qdio_start_time;
  3110. atomic_add(count, &queue->used_buffers);
  3111. if (rc) {
  3112. queue->card->stats.tx_errors += count;
  3113. /* ignore temporary SIGA errors without busy condition */
  3114. if (rc == -ENOBUFS)
  3115. return;
  3116. QETH_CARD_TEXT(queue->card, 2, "flushbuf");
  3117. QETH_CARD_TEXT_(queue->card, 2, " q%d", queue->queue_no);
  3118. QETH_CARD_TEXT_(queue->card, 2, " idx%d", index);
  3119. QETH_CARD_TEXT_(queue->card, 2, " c%d", count);
  3120. QETH_CARD_TEXT_(queue->card, 2, " err%d", rc);
  3121. /* this must not happen under normal circumstances. if it
  3122. * happens something is really wrong -> recover */
  3123. qeth_schedule_recovery(queue->card);
  3124. return;
  3125. }
  3126. if (queue->card->options.performance_stats)
  3127. queue->card->perf_stats.bufs_sent += count;
  3128. }
  3129. static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
  3130. {
  3131. int index;
  3132. int flush_cnt = 0;
  3133. int q_was_packing = 0;
  3134. /*
  3135. * check if weed have to switch to non-packing mode or if
  3136. * we have to get a pci flag out on the queue
  3137. */
  3138. if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
  3139. !atomic_read(&queue->set_pci_flags_count)) {
  3140. if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
  3141. QETH_OUT_Q_UNLOCKED) {
  3142. /*
  3143. * If we get in here, there was no action in
  3144. * do_send_packet. So, we check if there is a
  3145. * packing buffer to be flushed here.
  3146. */
  3147. netif_stop_queue(queue->card->dev);
  3148. index = queue->next_buf_to_fill;
  3149. q_was_packing = queue->do_pack;
  3150. /* queue->do_pack may change */
  3151. barrier();
  3152. flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
  3153. if (!flush_cnt &&
  3154. !atomic_read(&queue->set_pci_flags_count))
  3155. flush_cnt +=
  3156. qeth_flush_buffers_on_no_pci(queue);
  3157. if (queue->card->options.performance_stats &&
  3158. q_was_packing)
  3159. queue->card->perf_stats.bufs_sent_pack +=
  3160. flush_cnt;
  3161. if (flush_cnt)
  3162. qeth_flush_buffers(queue, index, flush_cnt);
  3163. atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
  3164. }
  3165. }
  3166. }
  3167. void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue,
  3168. unsigned long card_ptr)
  3169. {
  3170. struct qeth_card *card = (struct qeth_card *)card_ptr;
  3171. if (card->dev && (card->dev->flags & IFF_UP))
  3172. napi_schedule(&card->napi);
  3173. }
  3174. EXPORT_SYMBOL_GPL(qeth_qdio_start_poll);
  3175. int qeth_configure_cq(struct qeth_card *card, enum qeth_cq cq)
  3176. {
  3177. int rc;
  3178. if (card->options.cq == QETH_CQ_NOTAVAILABLE) {
  3179. rc = -1;
  3180. goto out;
  3181. } else {
  3182. if (card->options.cq == cq) {
  3183. rc = 0;
  3184. goto out;
  3185. }
  3186. if (card->state != CARD_STATE_DOWN &&
  3187. card->state != CARD_STATE_RECOVER) {
  3188. rc = -1;
  3189. goto out;
  3190. }
  3191. qeth_free_qdio_buffers(card);
  3192. card->options.cq = cq;
  3193. rc = 0;
  3194. }
  3195. out:
  3196. return rc;
  3197. }
  3198. EXPORT_SYMBOL_GPL(qeth_configure_cq);
  3199. static void qeth_qdio_cq_handler(struct qeth_card *card,
  3200. unsigned int qdio_err,
  3201. unsigned int queue, int first_element, int count) {
  3202. struct qeth_qdio_q *cq = card->qdio.c_q;
  3203. int i;
  3204. int rc;
  3205. if (!qeth_is_cq(card, queue))
  3206. goto out;
  3207. QETH_CARD_TEXT_(card, 5, "qcqhe%d", first_element);
  3208. QETH_CARD_TEXT_(card, 5, "qcqhc%d", count);
  3209. QETH_CARD_TEXT_(card, 5, "qcqherr%d", qdio_err);
  3210. if (qdio_err) {
  3211. netif_stop_queue(card->dev);
  3212. qeth_schedule_recovery(card);
  3213. goto out;
  3214. }
  3215. if (card->options.performance_stats) {
  3216. card->perf_stats.cq_cnt++;
  3217. card->perf_stats.cq_start_time = qeth_get_micros();
  3218. }
  3219. for (i = first_element; i < first_element + count; ++i) {
  3220. int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
  3221. struct qdio_buffer *buffer = cq->qdio_bufs[bidx];
  3222. int e;
  3223. e = 0;
  3224. while (buffer->element[e].addr) {
  3225. unsigned long phys_aob_addr;
  3226. phys_aob_addr = (unsigned long) buffer->element[e].addr;
  3227. qeth_qdio_handle_aob(card, phys_aob_addr);
  3228. buffer->element[e].addr = NULL;
  3229. buffer->element[e].eflags = 0;
  3230. buffer->element[e].sflags = 0;
  3231. buffer->element[e].length = 0;
  3232. ++e;
  3233. }
  3234. buffer->element[15].eflags = 0;
  3235. buffer->element[15].sflags = 0;
  3236. }
  3237. rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, queue,
  3238. card->qdio.c_q->next_buf_to_init,
  3239. count);
  3240. if (rc) {
  3241. dev_warn(&card->gdev->dev,
  3242. "QDIO reported an error, rc=%i\n", rc);
  3243. QETH_CARD_TEXT(card, 2, "qcqherr");
  3244. }
  3245. card->qdio.c_q->next_buf_to_init = (card->qdio.c_q->next_buf_to_init
  3246. + count) % QDIO_MAX_BUFFERS_PER_Q;
  3247. netif_wake_queue(card->dev);
  3248. if (card->options.performance_stats) {
  3249. int delta_t = qeth_get_micros();
  3250. delta_t -= card->perf_stats.cq_start_time;
  3251. card->perf_stats.cq_time += delta_t;
  3252. }
  3253. out:
  3254. return;
  3255. }
  3256. void qeth_qdio_input_handler(struct ccw_device *ccwdev, unsigned int qdio_err,
  3257. unsigned int queue, int first_elem, int count,
  3258. unsigned long card_ptr)
  3259. {
  3260. struct qeth_card *card = (struct qeth_card *)card_ptr;
  3261. QETH_CARD_TEXT_(card, 2, "qihq%d", queue);
  3262. QETH_CARD_TEXT_(card, 2, "qiec%d", qdio_err);
  3263. if (qeth_is_cq(card, queue))
  3264. qeth_qdio_cq_handler(card, qdio_err, queue, first_elem, count);
  3265. else if (qdio_err)
  3266. qeth_schedule_recovery(card);
  3267. }
  3268. EXPORT_SYMBOL_GPL(qeth_qdio_input_handler);
  3269. void qeth_qdio_output_handler(struct ccw_device *ccwdev,
  3270. unsigned int qdio_error, int __queue, int first_element,
  3271. int count, unsigned long card_ptr)
  3272. {
  3273. struct qeth_card *card = (struct qeth_card *) card_ptr;
  3274. struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
  3275. struct qeth_qdio_out_buffer *buffer;
  3276. int i;
  3277. QETH_CARD_TEXT(card, 6, "qdouhdl");
  3278. if (qdio_error & QDIO_ERROR_FATAL) {
  3279. QETH_CARD_TEXT(card, 2, "achkcond");
  3280. netif_stop_queue(card->dev);
  3281. qeth_schedule_recovery(card);
  3282. return;
  3283. }
  3284. if (card->options.performance_stats) {
  3285. card->perf_stats.outbound_handler_cnt++;
  3286. card->perf_stats.outbound_handler_start_time =
  3287. qeth_get_micros();
  3288. }
  3289. for (i = first_element; i < (first_element + count); ++i) {
  3290. int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
  3291. buffer = queue->bufs[bidx];
  3292. qeth_handle_send_error(card, buffer, qdio_error);
  3293. if (queue->bufstates &&
  3294. (queue->bufstates[bidx].flags &
  3295. QDIO_OUTBUF_STATE_FLAG_PENDING) != 0) {
  3296. WARN_ON_ONCE(card->options.cq != QETH_CQ_ENABLED);
  3297. if (atomic_cmpxchg(&buffer->state,
  3298. QETH_QDIO_BUF_PRIMED,
  3299. QETH_QDIO_BUF_PENDING) ==
  3300. QETH_QDIO_BUF_PRIMED) {
  3301. qeth_notify_skbs(queue, buffer,
  3302. TX_NOTIFY_PENDING);
  3303. }
  3304. buffer->aob = queue->bufstates[bidx].aob;
  3305. QETH_CARD_TEXT_(queue->card, 5, "pel%d", bidx);
  3306. QETH_CARD_TEXT(queue->card, 5, "aob");
  3307. QETH_CARD_TEXT_(queue->card, 5, "%lx",
  3308. virt_to_phys(buffer->aob));
  3309. if (qeth_init_qdio_out_buf(queue, bidx)) {
  3310. QETH_CARD_TEXT(card, 2, "outofbuf");
  3311. qeth_schedule_recovery(card);
  3312. }
  3313. } else {
  3314. if (card->options.cq == QETH_CQ_ENABLED) {
  3315. enum iucv_tx_notify n;
  3316. n = qeth_compute_cq_notification(
  3317. buffer->buffer->element[15].sflags, 0);
  3318. qeth_notify_skbs(queue, buffer, n);
  3319. }
  3320. qeth_clear_output_buffer(queue, buffer,
  3321. QETH_QDIO_BUF_EMPTY);
  3322. }
  3323. qeth_cleanup_handled_pending(queue, bidx, 0);
  3324. }
  3325. atomic_sub(count, &queue->used_buffers);
  3326. /* check if we need to do something on this outbound queue */
  3327. if (card->info.type != QETH_CARD_TYPE_IQD)
  3328. qeth_check_outbound_queue(queue);
  3329. netif_wake_queue(queue->card->dev);
  3330. if (card->options.performance_stats)
  3331. card->perf_stats.outbound_handler_time += qeth_get_micros() -
  3332. card->perf_stats.outbound_handler_start_time;
  3333. }
  3334. EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
  3335. /**
  3336. * Note: Function assumes that we have 4 outbound queues.
  3337. */
  3338. int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
  3339. int ipv, int cast_type)
  3340. {
  3341. __be16 *tci;
  3342. u8 tos;
  3343. if (cast_type && card->info.is_multicast_different)
  3344. return card->info.is_multicast_different &
  3345. (card->qdio.no_out_queues - 1);
  3346. switch (card->qdio.do_prio_queueing) {
  3347. case QETH_PRIO_Q_ING_TOS:
  3348. case QETH_PRIO_Q_ING_PREC:
  3349. switch (ipv) {
  3350. case 4:
  3351. tos = ipv4_get_dsfield(ip_hdr(skb));
  3352. break;
  3353. case 6:
  3354. tos = ipv6_get_dsfield(ipv6_hdr(skb));
  3355. break;
  3356. default:
  3357. return card->qdio.default_out_queue;
  3358. }
  3359. if (card->qdio.do_prio_queueing == QETH_PRIO_Q_ING_PREC)
  3360. return ~tos >> 6 & 3;
  3361. if (tos & IPTOS_MINCOST)
  3362. return 3;
  3363. if (tos & IPTOS_RELIABILITY)
  3364. return 2;
  3365. if (tos & IPTOS_THROUGHPUT)
  3366. return 1;
  3367. if (tos & IPTOS_LOWDELAY)
  3368. return 0;
  3369. break;
  3370. case QETH_PRIO_Q_ING_SKB:
  3371. if (skb->priority > 5)
  3372. return 0;
  3373. return ~skb->priority >> 1 & 3;
  3374. case QETH_PRIO_Q_ING_VLAN:
  3375. tci = &((struct ethhdr *)skb->data)->h_proto;
  3376. if (*tci == ETH_P_8021Q)
  3377. return ~*(tci + 1) >> (VLAN_PRIO_SHIFT + 1) & 3;
  3378. break;
  3379. default:
  3380. break;
  3381. }
  3382. return card->qdio.default_out_queue;
  3383. }
  3384. EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
  3385. int qeth_get_elements_for_frags(struct sk_buff *skb)
  3386. {
  3387. int cnt, length, e, elements = 0;
  3388. struct skb_frag_struct *frag;
  3389. char *data;
  3390. for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
  3391. frag = &skb_shinfo(skb)->frags[cnt];
  3392. data = (char *)page_to_phys(skb_frag_page(frag)) +
  3393. frag->page_offset;
  3394. length = frag->size;
  3395. e = PFN_UP((unsigned long)data + length - 1) -
  3396. PFN_DOWN((unsigned long)data);
  3397. elements += e;
  3398. }
  3399. return elements;
  3400. }
  3401. EXPORT_SYMBOL_GPL(qeth_get_elements_for_frags);
  3402. int qeth_get_elements_no(struct qeth_card *card,
  3403. struct sk_buff *skb, int elems)
  3404. {
  3405. int dlen = skb->len - skb->data_len;
  3406. int elements_needed = PFN_UP((unsigned long)skb->data + dlen - 1) -
  3407. PFN_DOWN((unsigned long)skb->data);
  3408. elements_needed += qeth_get_elements_for_frags(skb);
  3409. if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
  3410. QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
  3411. "(Number=%d / Length=%d). Discarded.\n",
  3412. (elements_needed+elems), skb->len);
  3413. return 0;
  3414. }
  3415. return elements_needed;
  3416. }
  3417. EXPORT_SYMBOL_GPL(qeth_get_elements_no);
  3418. int qeth_hdr_chk_and_bounce(struct sk_buff *skb, struct qeth_hdr **hdr, int len)
  3419. {
  3420. int hroom, inpage, rest;
  3421. if (((unsigned long)skb->data & PAGE_MASK) !=
  3422. (((unsigned long)skb->data + len - 1) & PAGE_MASK)) {
  3423. hroom = skb_headroom(skb);
  3424. inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE);
  3425. rest = len - inpage;
  3426. if (rest > hroom)
  3427. return 1;
  3428. memmove(skb->data - rest, skb->data, skb->len - skb->data_len);
  3429. skb->data -= rest;
  3430. skb->tail -= rest;
  3431. *hdr = (struct qeth_hdr *)skb->data;
  3432. QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest);
  3433. }
  3434. return 0;
  3435. }
  3436. EXPORT_SYMBOL_GPL(qeth_hdr_chk_and_bounce);
  3437. static inline void __qeth_fill_buffer(struct sk_buff *skb,
  3438. struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill,
  3439. int offset)
  3440. {
  3441. int length = skb->len - skb->data_len;
  3442. int length_here;
  3443. int element;
  3444. char *data;
  3445. int first_lap, cnt;
  3446. struct skb_frag_struct *frag;
  3447. element = *next_element_to_fill;
  3448. data = skb->data;
  3449. first_lap = (is_tso == 0 ? 1 : 0);
  3450. if (offset >= 0) {
  3451. data = skb->data + offset;
  3452. length -= offset;
  3453. first_lap = 0;
  3454. }
  3455. while (length > 0) {
  3456. /* length_here is the remaining amount of data in this page */
  3457. length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
  3458. if (length < length_here)
  3459. length_here = length;
  3460. buffer->element[element].addr = data;
  3461. buffer->element[element].length = length_here;
  3462. length -= length_here;
  3463. if (!length) {
  3464. if (first_lap)
  3465. if (skb_shinfo(skb)->nr_frags)
  3466. buffer->element[element].eflags =
  3467. SBAL_EFLAGS_FIRST_FRAG;
  3468. else
  3469. buffer->element[element].eflags = 0;
  3470. else
  3471. buffer->element[element].eflags =
  3472. SBAL_EFLAGS_MIDDLE_FRAG;
  3473. } else {
  3474. if (first_lap)
  3475. buffer->element[element].eflags =
  3476. SBAL_EFLAGS_FIRST_FRAG;
  3477. else
  3478. buffer->element[element].eflags =
  3479. SBAL_EFLAGS_MIDDLE_FRAG;
  3480. }
  3481. data += length_here;
  3482. element++;
  3483. first_lap = 0;
  3484. }
  3485. for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
  3486. frag = &skb_shinfo(skb)->frags[cnt];
  3487. data = (char *)page_to_phys(skb_frag_page(frag)) +
  3488. frag->page_offset;
  3489. length = frag->size;
  3490. while (length > 0) {
  3491. length_here = PAGE_SIZE -
  3492. ((unsigned long) data % PAGE_SIZE);
  3493. if (length < length_here)
  3494. length_here = length;
  3495. buffer->element[element].addr = data;
  3496. buffer->element[element].length = length_here;
  3497. buffer->element[element].eflags =
  3498. SBAL_EFLAGS_MIDDLE_FRAG;
  3499. length -= length_here;
  3500. data += length_here;
  3501. element++;
  3502. }
  3503. }
  3504. if (buffer->element[element - 1].eflags)
  3505. buffer->element[element - 1].eflags = SBAL_EFLAGS_LAST_FRAG;
  3506. *next_element_to_fill = element;
  3507. }
  3508. static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
  3509. struct qeth_qdio_out_buffer *buf, struct sk_buff *skb,
  3510. struct qeth_hdr *hdr, int offset, int hd_len)
  3511. {
  3512. struct qdio_buffer *buffer;
  3513. int flush_cnt = 0, hdr_len, large_send = 0;
  3514. buffer = buf->buffer;
  3515. atomic_inc(&skb->users);
  3516. skb_queue_tail(&buf->skb_list, skb);
  3517. /*check first on TSO ....*/
  3518. if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) {
  3519. int element = buf->next_element_to_fill;
  3520. hdr_len = sizeof(struct qeth_hdr_tso) +
  3521. ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len;
  3522. /*fill first buffer entry only with header information */
  3523. buffer->element[element].addr = skb->data;
  3524. buffer->element[element].length = hdr_len;
  3525. buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
  3526. buf->next_element_to_fill++;
  3527. skb->data += hdr_len;
  3528. skb->len -= hdr_len;
  3529. large_send = 1;
  3530. }
  3531. if (offset >= 0) {
  3532. int element = buf->next_element_to_fill;
  3533. buffer->element[element].addr = hdr;
  3534. buffer->element[element].length = sizeof(struct qeth_hdr) +
  3535. hd_len;
  3536. buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
  3537. buf->is_header[element] = 1;
  3538. buf->next_element_to_fill++;
  3539. }
  3540. __qeth_fill_buffer(skb, buffer, large_send,
  3541. (int *)&buf->next_element_to_fill, offset);
  3542. if (!queue->do_pack) {
  3543. QETH_CARD_TEXT(queue->card, 6, "fillbfnp");
  3544. /* set state to PRIMED -> will be flushed */
  3545. atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
  3546. flush_cnt = 1;
  3547. } else {
  3548. QETH_CARD_TEXT(queue->card, 6, "fillbfpa");
  3549. if (queue->card->options.performance_stats)
  3550. queue->card->perf_stats.skbs_sent_pack++;
  3551. if (buf->next_element_to_fill >=
  3552. QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
  3553. /*
  3554. * packed buffer if full -> set state PRIMED
  3555. * -> will be flushed
  3556. */
  3557. atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
  3558. flush_cnt = 1;
  3559. }
  3560. }
  3561. return flush_cnt;
  3562. }
  3563. int qeth_do_send_packet_fast(struct qeth_card *card,
  3564. struct qeth_qdio_out_q *queue, struct sk_buff *skb,
  3565. struct qeth_hdr *hdr, int elements_needed,
  3566. int offset, int hd_len)
  3567. {
  3568. struct qeth_qdio_out_buffer *buffer;
  3569. int index;
  3570. /* spin until we get the queue ... */
  3571. while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
  3572. QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
  3573. /* ... now we've got the queue */
  3574. index = queue->next_buf_to_fill;
  3575. buffer = queue->bufs[queue->next_buf_to_fill];
  3576. /*
  3577. * check if buffer is empty to make sure that we do not 'overtake'
  3578. * ourselves and try to fill a buffer that is already primed
  3579. */
  3580. if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
  3581. goto out;
  3582. queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
  3583. QDIO_MAX_BUFFERS_PER_Q;
  3584. atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
  3585. qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
  3586. qeth_flush_buffers(queue, index, 1);
  3587. return 0;
  3588. out:
  3589. atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
  3590. return -EBUSY;
  3591. }
  3592. EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
  3593. int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
  3594. struct sk_buff *skb, struct qeth_hdr *hdr,
  3595. int elements_needed)
  3596. {
  3597. struct qeth_qdio_out_buffer *buffer;
  3598. int start_index;
  3599. int flush_count = 0;
  3600. int do_pack = 0;
  3601. int tmp;
  3602. int rc = 0;
  3603. /* spin until we get the queue ... */
  3604. while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
  3605. QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
  3606. start_index = queue->next_buf_to_fill;
  3607. buffer = queue->bufs[queue->next_buf_to_fill];
  3608. /*
  3609. * check if buffer is empty to make sure that we do not 'overtake'
  3610. * ourselves and try to fill a buffer that is already primed
  3611. */
  3612. if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
  3613. atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
  3614. return -EBUSY;
  3615. }
  3616. /* check if we need to switch packing state of this queue */
  3617. qeth_switch_to_packing_if_needed(queue);
  3618. if (queue->do_pack) {
  3619. do_pack = 1;
  3620. /* does packet fit in current buffer? */
  3621. if ((QETH_MAX_BUFFER_ELEMENTS(card) -
  3622. buffer->next_element_to_fill) < elements_needed) {
  3623. /* ... no -> set state PRIMED */
  3624. atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
  3625. flush_count++;
  3626. queue->next_buf_to_fill =
  3627. (queue->next_buf_to_fill + 1) %
  3628. QDIO_MAX_BUFFERS_PER_Q;
  3629. buffer = queue->bufs[queue->next_buf_to_fill];
  3630. /* we did a step forward, so check buffer state
  3631. * again */
  3632. if (atomic_read(&buffer->state) !=
  3633. QETH_QDIO_BUF_EMPTY) {
  3634. qeth_flush_buffers(queue, start_index,
  3635. flush_count);
  3636. atomic_set(&queue->state,
  3637. QETH_OUT_Q_UNLOCKED);
  3638. return -EBUSY;
  3639. }
  3640. }
  3641. }
  3642. tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0);
  3643. queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
  3644. QDIO_MAX_BUFFERS_PER_Q;
  3645. flush_count += tmp;
  3646. if (flush_count)
  3647. qeth_flush_buffers(queue, start_index, flush_count);
  3648. else if (!atomic_read(&queue->set_pci_flags_count))
  3649. atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
  3650. /*
  3651. * queue->state will go from LOCKED -> UNLOCKED or from
  3652. * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
  3653. * (switch packing state or flush buffer to get another pci flag out).
  3654. * In that case we will enter this loop
  3655. */
  3656. while (atomic_dec_return(&queue->state)) {
  3657. flush_count = 0;
  3658. start_index = queue->next_buf_to_fill;
  3659. /* check if we can go back to non-packing state */
  3660. flush_count += qeth_switch_to_nonpacking_if_needed(queue);
  3661. /*
  3662. * check if we need to flush a packing buffer to get a pci
  3663. * flag out on the queue
  3664. */
  3665. if (!flush_count && !atomic_read(&queue->set_pci_flags_count))
  3666. flush_count += qeth_flush_buffers_on_no_pci(queue);
  3667. if (flush_count)
  3668. qeth_flush_buffers(queue, start_index, flush_count);
  3669. }
  3670. /* at this point the queue is UNLOCKED again */
  3671. if (queue->card->options.performance_stats && do_pack)
  3672. queue->card->perf_stats.bufs_sent_pack += flush_count;
  3673. return rc;
  3674. }
  3675. EXPORT_SYMBOL_GPL(qeth_do_send_packet);
  3676. static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
  3677. struct qeth_reply *reply, unsigned long data)
  3678. {
  3679. struct qeth_ipa_cmd *cmd;
  3680. struct qeth_ipacmd_setadpparms *setparms;
  3681. QETH_CARD_TEXT(card, 4, "prmadpcb");
  3682. cmd = (struct qeth_ipa_cmd *) data;
  3683. setparms = &(cmd->data.setadapterparms);
  3684. qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
  3685. if (cmd->hdr.return_code) {
  3686. QETH_CARD_TEXT_(card, 4, "prmrc%x", cmd->hdr.return_code);
  3687. setparms->data.mode = SET_PROMISC_MODE_OFF;
  3688. }
  3689. card->info.promisc_mode = setparms->data.mode;
  3690. return 0;
  3691. }
  3692. void qeth_setadp_promisc_mode(struct qeth_card *card)
  3693. {
  3694. enum qeth_ipa_promisc_modes mode;
  3695. struct net_device *dev = card->dev;
  3696. struct qeth_cmd_buffer *iob;
  3697. struct qeth_ipa_cmd *cmd;
  3698. QETH_CARD_TEXT(card, 4, "setprom");
  3699. if (((dev->flags & IFF_PROMISC) &&
  3700. (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
  3701. (!(dev->flags & IFF_PROMISC) &&
  3702. (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
  3703. return;
  3704. mode = SET_PROMISC_MODE_OFF;
  3705. if (dev->flags & IFF_PROMISC)
  3706. mode = SET_PROMISC_MODE_ON;
  3707. QETH_CARD_TEXT_(card, 4, "mode:%x", mode);
  3708. iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
  3709. sizeof(struct qeth_ipacmd_setadpparms));
  3710. cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
  3711. cmd->data.setadapterparms.data.mode = mode;
  3712. qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
  3713. }
  3714. EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
  3715. int qeth_change_mtu(struct net_device *dev, int new_mtu)
  3716. {
  3717. struct qeth_card *card;
  3718. char dbf_text[15];
  3719. card = dev->ml_priv;
  3720. QETH_CARD_TEXT(card, 4, "chgmtu");
  3721. sprintf(dbf_text, "%8x", new_mtu);
  3722. QETH_CARD_TEXT(card, 4, dbf_text);
  3723. if (new_mtu < 64)
  3724. return -EINVAL;
  3725. if (new_mtu > 65535)
  3726. return -EINVAL;
  3727. if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) &&
  3728. (!qeth_mtu_is_valid(card, new_mtu)))
  3729. return -EINVAL;
  3730. dev->mtu = new_mtu;
  3731. return 0;
  3732. }
  3733. EXPORT_SYMBOL_GPL(qeth_change_mtu);
  3734. struct net_device_stats *qeth_get_stats(struct net_device *dev)
  3735. {
  3736. struct qeth_card *card;
  3737. card = dev->ml_priv;
  3738. QETH_CARD_TEXT(card, 5, "getstat");
  3739. return &card->stats;
  3740. }
  3741. EXPORT_SYMBOL_GPL(qeth_get_stats);
  3742. static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
  3743. struct qeth_reply *reply, unsigned long data)
  3744. {
  3745. struct qeth_ipa_cmd *cmd;
  3746. QETH_CARD_TEXT(card, 4, "chgmaccb");
  3747. cmd = (struct qeth_ipa_cmd *) data;
  3748. if (!card->options.layer2 ||
  3749. !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
  3750. memcpy(card->dev->dev_addr,
  3751. &cmd->data.setadapterparms.data.change_addr.addr,
  3752. OSA_ADDR_LEN);
  3753. card->info.mac_bits |= QETH_LAYER2_MAC_READ;
  3754. }
  3755. qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
  3756. return 0;
  3757. }
  3758. int qeth_setadpparms_change_macaddr(struct qeth_card *card)
  3759. {
  3760. int rc;
  3761. struct qeth_cmd_buffer *iob;
  3762. struct qeth_ipa_cmd *cmd;
  3763. QETH_CARD_TEXT(card, 4, "chgmac");
  3764. iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
  3765. sizeof(struct qeth_ipacmd_setadpparms));
  3766. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  3767. cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
  3768. cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN;
  3769. memcpy(&cmd->data.setadapterparms.data.change_addr.addr,
  3770. card->dev->dev_addr, OSA_ADDR_LEN);
  3771. rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
  3772. NULL);
  3773. return rc;
  3774. }
  3775. EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
  3776. static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card,
  3777. struct qeth_reply *reply, unsigned long data)
  3778. {
  3779. struct qeth_ipa_cmd *cmd;
  3780. struct qeth_set_access_ctrl *access_ctrl_req;
  3781. int fallback = *(int *)reply->param;
  3782. QETH_CARD_TEXT(card, 4, "setaccb");
  3783. cmd = (struct qeth_ipa_cmd *) data;
  3784. access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
  3785. QETH_DBF_TEXT_(SETUP, 2, "setaccb");
  3786. QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
  3787. QETH_DBF_TEXT_(SETUP, 2, "rc=%d",
  3788. cmd->data.setadapterparms.hdr.return_code);
  3789. if (cmd->data.setadapterparms.hdr.return_code !=
  3790. SET_ACCESS_CTRL_RC_SUCCESS)
  3791. QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n",
  3792. card->gdev->dev.kobj.name,
  3793. access_ctrl_req->subcmd_code,
  3794. cmd->data.setadapterparms.hdr.return_code);
  3795. switch (cmd->data.setadapterparms.hdr.return_code) {
  3796. case SET_ACCESS_CTRL_RC_SUCCESS:
  3797. if (card->options.isolation == ISOLATION_MODE_NONE) {
  3798. dev_info(&card->gdev->dev,
  3799. "QDIO data connection isolation is deactivated\n");
  3800. } else {
  3801. dev_info(&card->gdev->dev,
  3802. "QDIO data connection isolation is activated\n");
  3803. }
  3804. break;
  3805. case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED:
  3806. QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already "
  3807. "deactivated\n", dev_name(&card->gdev->dev));
  3808. if (fallback)
  3809. card->options.isolation = card->options.prev_isolation;
  3810. break;
  3811. case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED:
  3812. QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already"
  3813. " activated\n", dev_name(&card->gdev->dev));
  3814. if (fallback)
  3815. card->options.isolation = card->options.prev_isolation;
  3816. break;
  3817. case SET_ACCESS_CTRL_RC_NOT_SUPPORTED:
  3818. dev_err(&card->gdev->dev, "Adapter does not "
  3819. "support QDIO data connection isolation\n");
  3820. break;
  3821. case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER:
  3822. dev_err(&card->gdev->dev,
  3823. "Adapter is dedicated. "
  3824. "QDIO data connection isolation not supported\n");
  3825. if (fallback)
  3826. card->options.isolation = card->options.prev_isolation;
  3827. break;
  3828. case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF:
  3829. dev_err(&card->gdev->dev,
  3830. "TSO does not permit QDIO data connection isolation\n");
  3831. if (fallback)
  3832. card->options.isolation = card->options.prev_isolation;
  3833. break;
  3834. case SET_ACCESS_CTRL_RC_REFLREL_UNSUPPORTED:
  3835. dev_err(&card->gdev->dev, "The adjacent switch port does not "
  3836. "support reflective relay mode\n");
  3837. if (fallback)
  3838. card->options.isolation = card->options.prev_isolation;
  3839. break;
  3840. case SET_ACCESS_CTRL_RC_REFLREL_FAILED:
  3841. dev_err(&card->gdev->dev, "The reflective relay mode cannot be "
  3842. "enabled at the adjacent switch port");
  3843. if (fallback)
  3844. card->options.isolation = card->options.prev_isolation;
  3845. break;
  3846. case SET_ACCESS_CTRL_RC_REFLREL_DEACT_FAILED:
  3847. dev_warn(&card->gdev->dev, "Turning off reflective relay mode "
  3848. "at the adjacent switch failed\n");
  3849. break;
  3850. default:
  3851. /* this should never happen */
  3852. if (fallback)
  3853. card->options.isolation = card->options.prev_isolation;
  3854. break;
  3855. }
  3856. qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
  3857. return 0;
  3858. }
  3859. static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card,
  3860. enum qeth_ipa_isolation_modes isolation, int fallback)
  3861. {
  3862. int rc;
  3863. struct qeth_cmd_buffer *iob;
  3864. struct qeth_ipa_cmd *cmd;
  3865. struct qeth_set_access_ctrl *access_ctrl_req;
  3866. QETH_CARD_TEXT(card, 4, "setacctl");
  3867. QETH_DBF_TEXT_(SETUP, 2, "setacctl");
  3868. QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
  3869. iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL,
  3870. sizeof(struct qeth_ipacmd_setadpparms_hdr) +
  3871. sizeof(struct qeth_set_access_ctrl));
  3872. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  3873. access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
  3874. access_ctrl_req->subcmd_code = isolation;
  3875. rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb,
  3876. &fallback);
  3877. QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc);
  3878. return rc;
  3879. }
  3880. int qeth_set_access_ctrl_online(struct qeth_card *card, int fallback)
  3881. {
  3882. int rc = 0;
  3883. QETH_CARD_TEXT(card, 4, "setactlo");
  3884. if ((card->info.type == QETH_CARD_TYPE_OSD ||
  3885. card->info.type == QETH_CARD_TYPE_OSX) &&
  3886. qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) {
  3887. rc = qeth_setadpparms_set_access_ctrl(card,
  3888. card->options.isolation, fallback);
  3889. if (rc) {
  3890. QETH_DBF_MESSAGE(3,
  3891. "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n",
  3892. card->gdev->dev.kobj.name,
  3893. rc);
  3894. rc = -EOPNOTSUPP;
  3895. }
  3896. } else if (card->options.isolation != ISOLATION_MODE_NONE) {
  3897. card->options.isolation = ISOLATION_MODE_NONE;
  3898. dev_err(&card->gdev->dev, "Adapter does not "
  3899. "support QDIO data connection isolation\n");
  3900. rc = -EOPNOTSUPP;
  3901. }
  3902. return rc;
  3903. }
  3904. EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online);
  3905. void qeth_tx_timeout(struct net_device *dev)
  3906. {
  3907. struct qeth_card *card;
  3908. card = dev->ml_priv;
  3909. QETH_CARD_TEXT(card, 4, "txtimeo");
  3910. card->stats.tx_errors++;
  3911. qeth_schedule_recovery(card);
  3912. }
  3913. EXPORT_SYMBOL_GPL(qeth_tx_timeout);
  3914. int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
  3915. {
  3916. struct qeth_card *card = dev->ml_priv;
  3917. int rc = 0;
  3918. switch (regnum) {
  3919. case MII_BMCR: /* Basic mode control register */
  3920. rc = BMCR_FULLDPLX;
  3921. if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
  3922. (card->info.link_type != QETH_LINK_TYPE_OSN) &&
  3923. (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
  3924. rc |= BMCR_SPEED100;
  3925. break;
  3926. case MII_BMSR: /* Basic mode status register */
  3927. rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
  3928. BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
  3929. BMSR_100BASE4;
  3930. break;
  3931. case MII_PHYSID1: /* PHYS ID 1 */
  3932. rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
  3933. dev->dev_addr[2];
  3934. rc = (rc >> 5) & 0xFFFF;
  3935. break;
  3936. case MII_PHYSID2: /* PHYS ID 2 */
  3937. rc = (dev->dev_addr[2] << 10) & 0xFFFF;
  3938. break;
  3939. case MII_ADVERTISE: /* Advertisement control reg */
  3940. rc = ADVERTISE_ALL;
  3941. break;
  3942. case MII_LPA: /* Link partner ability reg */
  3943. rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
  3944. LPA_100BASE4 | LPA_LPACK;
  3945. break;
  3946. case MII_EXPANSION: /* Expansion register */
  3947. break;
  3948. case MII_DCOUNTER: /* disconnect counter */
  3949. break;
  3950. case MII_FCSCOUNTER: /* false carrier counter */
  3951. break;
  3952. case MII_NWAYTEST: /* N-way auto-neg test register */
  3953. break;
  3954. case MII_RERRCOUNTER: /* rx error counter */
  3955. rc = card->stats.rx_errors;
  3956. break;
  3957. case MII_SREVISION: /* silicon revision */
  3958. break;
  3959. case MII_RESV1: /* reserved 1 */
  3960. break;
  3961. case MII_LBRERROR: /* loopback, rx, bypass error */
  3962. break;
  3963. case MII_PHYADDR: /* physical address */
  3964. break;
  3965. case MII_RESV2: /* reserved 2 */
  3966. break;
  3967. case MII_TPISTATUS: /* TPI status for 10mbps */
  3968. break;
  3969. case MII_NCONFIG: /* network interface config */
  3970. break;
  3971. default:
  3972. break;
  3973. }
  3974. return rc;
  3975. }
  3976. EXPORT_SYMBOL_GPL(qeth_mdio_read);
  3977. static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
  3978. struct qeth_cmd_buffer *iob, int len,
  3979. int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
  3980. unsigned long),
  3981. void *reply_param)
  3982. {
  3983. u16 s1, s2;
  3984. QETH_CARD_TEXT(card, 4, "sendsnmp");
  3985. memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
  3986. memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
  3987. &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
  3988. /* adjust PDU length fields in IPA_PDU_HEADER */
  3989. s1 = (u32) IPA_PDU_HEADER_SIZE + len;
  3990. s2 = (u32) len;
  3991. memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
  3992. memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
  3993. memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
  3994. memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
  3995. return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
  3996. reply_cb, reply_param);
  3997. }
  3998. static int qeth_snmp_command_cb(struct qeth_card *card,
  3999. struct qeth_reply *reply, unsigned long sdata)
  4000. {
  4001. struct qeth_ipa_cmd *cmd;
  4002. struct qeth_arp_query_info *qinfo;
  4003. struct qeth_snmp_cmd *snmp;
  4004. unsigned char *data;
  4005. __u16 data_len;
  4006. QETH_CARD_TEXT(card, 3, "snpcmdcb");
  4007. cmd = (struct qeth_ipa_cmd *) sdata;
  4008. data = (unsigned char *)((char *)cmd - reply->offset);
  4009. qinfo = (struct qeth_arp_query_info *) reply->param;
  4010. snmp = &cmd->data.setadapterparms.data.snmp;
  4011. if (cmd->hdr.return_code) {
  4012. QETH_CARD_TEXT_(card, 4, "scer1%x", cmd->hdr.return_code);
  4013. return 0;
  4014. }
  4015. if (cmd->data.setadapterparms.hdr.return_code) {
  4016. cmd->hdr.return_code =
  4017. cmd->data.setadapterparms.hdr.return_code;
  4018. QETH_CARD_TEXT_(card, 4, "scer2%x", cmd->hdr.return_code);
  4019. return 0;
  4020. }
  4021. data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
  4022. if (cmd->data.setadapterparms.hdr.seq_no == 1)
  4023. data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
  4024. else
  4025. data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
  4026. /* check if there is enough room in userspace */
  4027. if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
  4028. QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM);
  4029. cmd->hdr.return_code = IPA_RC_ENOMEM;
  4030. return 0;
  4031. }
  4032. QETH_CARD_TEXT_(card, 4, "snore%i",
  4033. cmd->data.setadapterparms.hdr.used_total);
  4034. QETH_CARD_TEXT_(card, 4, "sseqn%i",
  4035. cmd->data.setadapterparms.hdr.seq_no);
  4036. /*copy entries to user buffer*/
  4037. if (cmd->data.setadapterparms.hdr.seq_no == 1) {
  4038. memcpy(qinfo->udata + qinfo->udata_offset,
  4039. (char *)snmp,
  4040. data_len + offsetof(struct qeth_snmp_cmd, data));
  4041. qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
  4042. } else {
  4043. memcpy(qinfo->udata + qinfo->udata_offset,
  4044. (char *)&snmp->request, data_len);
  4045. }
  4046. qinfo->udata_offset += data_len;
  4047. /* check if all replies received ... */
  4048. QETH_CARD_TEXT_(card, 4, "srtot%i",
  4049. cmd->data.setadapterparms.hdr.used_total);
  4050. QETH_CARD_TEXT_(card, 4, "srseq%i",
  4051. cmd->data.setadapterparms.hdr.seq_no);
  4052. if (cmd->data.setadapterparms.hdr.seq_no <
  4053. cmd->data.setadapterparms.hdr.used_total)
  4054. return 1;
  4055. return 0;
  4056. }
  4057. int qeth_snmp_command(struct qeth_card *card, char __user *udata)
  4058. {
  4059. struct qeth_cmd_buffer *iob;
  4060. struct qeth_ipa_cmd *cmd;
  4061. struct qeth_snmp_ureq *ureq;
  4062. unsigned int req_len;
  4063. struct qeth_arp_query_info qinfo = {0, };
  4064. int rc = 0;
  4065. QETH_CARD_TEXT(card, 3, "snmpcmd");
  4066. if (card->info.guestlan)
  4067. return -EOPNOTSUPP;
  4068. if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
  4069. (!card->options.layer2)) {
  4070. return -EOPNOTSUPP;
  4071. }
  4072. /* skip 4 bytes (data_len struct member) to get req_len */
  4073. if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
  4074. return -EFAULT;
  4075. if (req_len > (QETH_BUFSIZE - IPA_PDU_HEADER_SIZE -
  4076. sizeof(struct qeth_ipacmd_hdr) -
  4077. sizeof(struct qeth_ipacmd_setadpparms_hdr)))
  4078. return -EINVAL;
  4079. ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr));
  4080. if (IS_ERR(ureq)) {
  4081. QETH_CARD_TEXT(card, 2, "snmpnome");
  4082. return PTR_ERR(ureq);
  4083. }
  4084. qinfo.udata_len = ureq->hdr.data_len;
  4085. qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
  4086. if (!qinfo.udata) {
  4087. kfree(ureq);
  4088. return -ENOMEM;
  4089. }
  4090. qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
  4091. iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
  4092. QETH_SNMP_SETADP_CMDLENGTH + req_len);
  4093. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  4094. memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
  4095. rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
  4096. qeth_snmp_command_cb, (void *)&qinfo);
  4097. if (rc)
  4098. QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
  4099. QETH_CARD_IFNAME(card), rc);
  4100. else {
  4101. if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
  4102. rc = -EFAULT;
  4103. }
  4104. kfree(ureq);
  4105. kfree(qinfo.udata);
  4106. return rc;
  4107. }
  4108. EXPORT_SYMBOL_GPL(qeth_snmp_command);
  4109. static int qeth_setadpparms_query_oat_cb(struct qeth_card *card,
  4110. struct qeth_reply *reply, unsigned long data)
  4111. {
  4112. struct qeth_ipa_cmd *cmd;
  4113. struct qeth_qoat_priv *priv;
  4114. char *resdata;
  4115. int resdatalen;
  4116. QETH_CARD_TEXT(card, 3, "qoatcb");
  4117. cmd = (struct qeth_ipa_cmd *)data;
  4118. priv = (struct qeth_qoat_priv *)reply->param;
  4119. resdatalen = cmd->data.setadapterparms.hdr.cmdlength;
  4120. resdata = (char *)data + 28;
  4121. if (resdatalen > (priv->buffer_len - priv->response_len)) {
  4122. cmd->hdr.return_code = IPA_RC_FFFF;
  4123. return 0;
  4124. }
  4125. memcpy((priv->buffer + priv->response_len), resdata,
  4126. resdatalen);
  4127. priv->response_len += resdatalen;
  4128. if (cmd->data.setadapterparms.hdr.seq_no <
  4129. cmd->data.setadapterparms.hdr.used_total)
  4130. return 1;
  4131. return 0;
  4132. }
  4133. int qeth_query_oat_command(struct qeth_card *card, char __user *udata)
  4134. {
  4135. int rc = 0;
  4136. struct qeth_cmd_buffer *iob;
  4137. struct qeth_ipa_cmd *cmd;
  4138. struct qeth_query_oat *oat_req;
  4139. struct qeth_query_oat_data oat_data;
  4140. struct qeth_qoat_priv priv;
  4141. void __user *tmp;
  4142. QETH_CARD_TEXT(card, 3, "qoatcmd");
  4143. if (!qeth_adp_supported(card, IPA_SETADP_QUERY_OAT)) {
  4144. rc = -EOPNOTSUPP;
  4145. goto out;
  4146. }
  4147. if (copy_from_user(&oat_data, udata,
  4148. sizeof(struct qeth_query_oat_data))) {
  4149. rc = -EFAULT;
  4150. goto out;
  4151. }
  4152. priv.buffer_len = oat_data.buffer_len;
  4153. priv.response_len = 0;
  4154. priv.buffer = kzalloc(oat_data.buffer_len, GFP_KERNEL);
  4155. if (!priv.buffer) {
  4156. rc = -ENOMEM;
  4157. goto out;
  4158. }
  4159. iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_OAT,
  4160. sizeof(struct qeth_ipacmd_setadpparms_hdr) +
  4161. sizeof(struct qeth_query_oat));
  4162. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  4163. oat_req = &cmd->data.setadapterparms.data.query_oat;
  4164. oat_req->subcmd_code = oat_data.command;
  4165. rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_query_oat_cb,
  4166. &priv);
  4167. if (!rc) {
  4168. if (is_compat_task())
  4169. tmp = compat_ptr(oat_data.ptr);
  4170. else
  4171. tmp = (void __user *)(unsigned long)oat_data.ptr;
  4172. if (copy_to_user(tmp, priv.buffer,
  4173. priv.response_len)) {
  4174. rc = -EFAULT;
  4175. goto out_free;
  4176. }
  4177. oat_data.response_len = priv.response_len;
  4178. if (copy_to_user(udata, &oat_data,
  4179. sizeof(struct qeth_query_oat_data)))
  4180. rc = -EFAULT;
  4181. } else
  4182. if (rc == IPA_RC_FFFF)
  4183. rc = -EFAULT;
  4184. out_free:
  4185. kfree(priv.buffer);
  4186. out:
  4187. return rc;
  4188. }
  4189. EXPORT_SYMBOL_GPL(qeth_query_oat_command);
  4190. static int qeth_query_card_info_cb(struct qeth_card *card,
  4191. struct qeth_reply *reply, unsigned long data)
  4192. {
  4193. struct qeth_ipa_cmd *cmd;
  4194. struct qeth_query_card_info *card_info;
  4195. struct carrier_info *carrier_info;
  4196. QETH_CARD_TEXT(card, 2, "qcrdincb");
  4197. carrier_info = (struct carrier_info *)reply->param;
  4198. cmd = (struct qeth_ipa_cmd *)data;
  4199. card_info = &cmd->data.setadapterparms.data.card_info;
  4200. if (cmd->data.setadapterparms.hdr.return_code == 0) {
  4201. carrier_info->card_type = card_info->card_type;
  4202. carrier_info->port_mode = card_info->port_mode;
  4203. carrier_info->port_speed = card_info->port_speed;
  4204. }
  4205. qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
  4206. return 0;
  4207. }
  4208. static int qeth_query_card_info(struct qeth_card *card,
  4209. struct carrier_info *carrier_info)
  4210. {
  4211. struct qeth_cmd_buffer *iob;
  4212. QETH_CARD_TEXT(card, 2, "qcrdinfo");
  4213. if (!qeth_adp_supported(card, IPA_SETADP_QUERY_CARD_INFO))
  4214. return -EOPNOTSUPP;
  4215. iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_CARD_INFO,
  4216. sizeof(struct qeth_ipacmd_setadpparms_hdr));
  4217. return qeth_send_ipa_cmd(card, iob, qeth_query_card_info_cb,
  4218. (void *)carrier_info);
  4219. }
  4220. static inline int qeth_get_qdio_q_format(struct qeth_card *card)
  4221. {
  4222. switch (card->info.type) {
  4223. case QETH_CARD_TYPE_IQD:
  4224. return 2;
  4225. default:
  4226. return 0;
  4227. }
  4228. }
  4229. static void qeth_determine_capabilities(struct qeth_card *card)
  4230. {
  4231. int rc;
  4232. int length;
  4233. char *prcd;
  4234. struct ccw_device *ddev;
  4235. int ddev_offline = 0;
  4236. QETH_DBF_TEXT(SETUP, 2, "detcapab");
  4237. ddev = CARD_DDEV(card);
  4238. if (!ddev->online) {
  4239. ddev_offline = 1;
  4240. rc = ccw_device_set_online(ddev);
  4241. if (rc) {
  4242. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  4243. goto out;
  4244. }
  4245. }
  4246. rc = qeth_read_conf_data(card, (void **) &prcd, &length);
  4247. if (rc) {
  4248. QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n",
  4249. dev_name(&card->gdev->dev), rc);
  4250. QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
  4251. goto out_offline;
  4252. }
  4253. qeth_configure_unitaddr(card, prcd);
  4254. if (ddev_offline)
  4255. qeth_configure_blkt_default(card, prcd);
  4256. kfree(prcd);
  4257. rc = qdio_get_ssqd_desc(ddev, &card->ssqd);
  4258. if (rc)
  4259. QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
  4260. QETH_DBF_TEXT_(SETUP, 2, "qfmt%d", card->ssqd.qfmt);
  4261. QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac1);
  4262. QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac3);
  4263. QETH_DBF_TEXT_(SETUP, 2, "icnt%d", card->ssqd.icnt);
  4264. if (!((card->ssqd.qfmt != QDIO_IQDIO_QFMT) ||
  4265. ((card->ssqd.qdioac1 & CHSC_AC1_INITIATE_INPUTQ) == 0) ||
  4266. ((card->ssqd.qdioac3 & CHSC_AC3_FORMAT2_CQ_AVAILABLE) == 0))) {
  4267. dev_info(&card->gdev->dev,
  4268. "Completion Queueing supported\n");
  4269. } else {
  4270. card->options.cq = QETH_CQ_NOTAVAILABLE;
  4271. }
  4272. out_offline:
  4273. if (ddev_offline == 1)
  4274. ccw_device_set_offline(ddev);
  4275. out:
  4276. return;
  4277. }
  4278. static inline void qeth_qdio_establish_cq(struct qeth_card *card,
  4279. struct qdio_buffer **in_sbal_ptrs,
  4280. void (**queue_start_poll) (struct ccw_device *, int, unsigned long)) {
  4281. int i;
  4282. if (card->options.cq == QETH_CQ_ENABLED) {
  4283. int offset = QDIO_MAX_BUFFERS_PER_Q *
  4284. (card->qdio.no_in_queues - 1);
  4285. i = QDIO_MAX_BUFFERS_PER_Q * (card->qdio.no_in_queues - 1);
  4286. for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
  4287. in_sbal_ptrs[offset + i] = (struct qdio_buffer *)
  4288. virt_to_phys(card->qdio.c_q->bufs[i].buffer);
  4289. }
  4290. queue_start_poll[card->qdio.no_in_queues - 1] = NULL;
  4291. }
  4292. }
  4293. static int qeth_qdio_establish(struct qeth_card *card)
  4294. {
  4295. struct qdio_initialize init_data;
  4296. char *qib_param_field;
  4297. struct qdio_buffer **in_sbal_ptrs;
  4298. void (**queue_start_poll) (struct ccw_device *, int, unsigned long);
  4299. struct qdio_buffer **out_sbal_ptrs;
  4300. int i, j, k;
  4301. int rc = 0;
  4302. QETH_DBF_TEXT(SETUP, 2, "qdioest");
  4303. qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
  4304. GFP_KERNEL);
  4305. if (!qib_param_field) {
  4306. rc = -ENOMEM;
  4307. goto out_free_nothing;
  4308. }
  4309. qeth_create_qib_param_field(card, qib_param_field);
  4310. qeth_create_qib_param_field_blkt(card, qib_param_field);
  4311. in_sbal_ptrs = kzalloc(card->qdio.no_in_queues *
  4312. QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
  4313. GFP_KERNEL);
  4314. if (!in_sbal_ptrs) {
  4315. rc = -ENOMEM;
  4316. goto out_free_qib_param;
  4317. }
  4318. for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
  4319. in_sbal_ptrs[i] = (struct qdio_buffer *)
  4320. virt_to_phys(card->qdio.in_q->bufs[i].buffer);
  4321. }
  4322. queue_start_poll = kzalloc(sizeof(void *) * card->qdio.no_in_queues,
  4323. GFP_KERNEL);
  4324. if (!queue_start_poll) {
  4325. rc = -ENOMEM;
  4326. goto out_free_in_sbals;
  4327. }
  4328. for (i = 0; i < card->qdio.no_in_queues; ++i)
  4329. queue_start_poll[i] = card->discipline->start_poll;
  4330. qeth_qdio_establish_cq(card, in_sbal_ptrs, queue_start_poll);
  4331. out_sbal_ptrs =
  4332. kzalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
  4333. sizeof(void *), GFP_KERNEL);
  4334. if (!out_sbal_ptrs) {
  4335. rc = -ENOMEM;
  4336. goto out_free_queue_start_poll;
  4337. }
  4338. for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
  4339. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
  4340. out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
  4341. card->qdio.out_qs[i]->bufs[j]->buffer);
  4342. }
  4343. memset(&init_data, 0, sizeof(struct qdio_initialize));
  4344. init_data.cdev = CARD_DDEV(card);
  4345. init_data.q_format = qeth_get_qdio_q_format(card);
  4346. init_data.qib_param_field_format = 0;
  4347. init_data.qib_param_field = qib_param_field;
  4348. init_data.no_input_qs = card->qdio.no_in_queues;
  4349. init_data.no_output_qs = card->qdio.no_out_queues;
  4350. init_data.input_handler = card->discipline->input_handler;
  4351. init_data.output_handler = card->discipline->output_handler;
  4352. init_data.queue_start_poll_array = queue_start_poll;
  4353. init_data.int_parm = (unsigned long) card;
  4354. init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
  4355. init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
  4356. init_data.output_sbal_state_array = card->qdio.out_bufstates;
  4357. init_data.scan_threshold =
  4358. (card->info.type == QETH_CARD_TYPE_IQD) ? 1 : 32;
  4359. if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
  4360. QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
  4361. rc = qdio_allocate(&init_data);
  4362. if (rc) {
  4363. atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
  4364. goto out;
  4365. }
  4366. rc = qdio_establish(&init_data);
  4367. if (rc) {
  4368. atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
  4369. qdio_free(CARD_DDEV(card));
  4370. }
  4371. }
  4372. switch (card->options.cq) {
  4373. case QETH_CQ_ENABLED:
  4374. dev_info(&card->gdev->dev, "Completion Queue support enabled");
  4375. break;
  4376. case QETH_CQ_DISABLED:
  4377. dev_info(&card->gdev->dev, "Completion Queue support disabled");
  4378. break;
  4379. default:
  4380. break;
  4381. }
  4382. out:
  4383. kfree(out_sbal_ptrs);
  4384. out_free_queue_start_poll:
  4385. kfree(queue_start_poll);
  4386. out_free_in_sbals:
  4387. kfree(in_sbal_ptrs);
  4388. out_free_qib_param:
  4389. kfree(qib_param_field);
  4390. out_free_nothing:
  4391. return rc;
  4392. }
  4393. static void qeth_core_free_card(struct qeth_card *card)
  4394. {
  4395. QETH_DBF_TEXT(SETUP, 2, "freecrd");
  4396. QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
  4397. qeth_clean_channel(&card->read);
  4398. qeth_clean_channel(&card->write);
  4399. if (card->dev)
  4400. free_netdev(card->dev);
  4401. kfree(card->ip_tbd_list);
  4402. qeth_free_qdio_buffers(card);
  4403. unregister_service_level(&card->qeth_service_level);
  4404. kfree(card);
  4405. }
  4406. void qeth_trace_features(struct qeth_card *card)
  4407. {
  4408. QETH_CARD_TEXT(card, 2, "features");
  4409. QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa4.supported_funcs);
  4410. QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa4.enabled_funcs);
  4411. QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa6.supported_funcs);
  4412. QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa6.enabled_funcs);
  4413. QETH_CARD_TEXT_(card, 2, "%x", card->options.adp.supported_funcs);
  4414. QETH_CARD_TEXT_(card, 2, "%x", card->options.adp.enabled_funcs);
  4415. QETH_CARD_TEXT_(card, 2, "%x", card->info.diagass_support);
  4416. }
  4417. EXPORT_SYMBOL_GPL(qeth_trace_features);
  4418. static struct ccw_device_id qeth_ids[] = {
  4419. {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01),
  4420. .driver_info = QETH_CARD_TYPE_OSD},
  4421. {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05),
  4422. .driver_info = QETH_CARD_TYPE_IQD},
  4423. {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06),
  4424. .driver_info = QETH_CARD_TYPE_OSN},
  4425. {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03),
  4426. .driver_info = QETH_CARD_TYPE_OSM},
  4427. {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02),
  4428. .driver_info = QETH_CARD_TYPE_OSX},
  4429. {},
  4430. };
  4431. MODULE_DEVICE_TABLE(ccw, qeth_ids);
  4432. static struct ccw_driver qeth_ccw_driver = {
  4433. .driver = {
  4434. .owner = THIS_MODULE,
  4435. .name = "qeth",
  4436. },
  4437. .ids = qeth_ids,
  4438. .probe = ccwgroup_probe_ccwdev,
  4439. .remove = ccwgroup_remove_ccwdev,
  4440. };
  4441. int qeth_core_hardsetup_card(struct qeth_card *card)
  4442. {
  4443. int retries = 3;
  4444. int rc;
  4445. QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
  4446. atomic_set(&card->force_alloc_skb, 0);
  4447. qeth_update_from_chp_desc(card);
  4448. retry:
  4449. if (retries < 3)
  4450. QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n",
  4451. dev_name(&card->gdev->dev));
  4452. rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
  4453. ccw_device_set_offline(CARD_DDEV(card));
  4454. ccw_device_set_offline(CARD_WDEV(card));
  4455. ccw_device_set_offline(CARD_RDEV(card));
  4456. qdio_free(CARD_DDEV(card));
  4457. rc = ccw_device_set_online(CARD_RDEV(card));
  4458. if (rc)
  4459. goto retriable;
  4460. rc = ccw_device_set_online(CARD_WDEV(card));
  4461. if (rc)
  4462. goto retriable;
  4463. rc = ccw_device_set_online(CARD_DDEV(card));
  4464. if (rc)
  4465. goto retriable;
  4466. retriable:
  4467. if (rc == -ERESTARTSYS) {
  4468. QETH_DBF_TEXT(SETUP, 2, "break1");
  4469. return rc;
  4470. } else if (rc) {
  4471. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  4472. if (--retries < 0)
  4473. goto out;
  4474. else
  4475. goto retry;
  4476. }
  4477. qeth_determine_capabilities(card);
  4478. qeth_init_tokens(card);
  4479. qeth_init_func_level(card);
  4480. rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
  4481. if (rc == -ERESTARTSYS) {
  4482. QETH_DBF_TEXT(SETUP, 2, "break2");
  4483. return rc;
  4484. } else if (rc) {
  4485. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  4486. if (--retries < 0)
  4487. goto out;
  4488. else
  4489. goto retry;
  4490. }
  4491. rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
  4492. if (rc == -ERESTARTSYS) {
  4493. QETH_DBF_TEXT(SETUP, 2, "break3");
  4494. return rc;
  4495. } else if (rc) {
  4496. QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
  4497. if (--retries < 0)
  4498. goto out;
  4499. else
  4500. goto retry;
  4501. }
  4502. card->read_or_write_problem = 0;
  4503. rc = qeth_mpc_initialize(card);
  4504. if (rc) {
  4505. QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
  4506. goto out;
  4507. }
  4508. card->options.ipa4.supported_funcs = 0;
  4509. card->options.adp.supported_funcs = 0;
  4510. card->options.sbp.supported_funcs = 0;
  4511. card->info.diagass_support = 0;
  4512. qeth_query_ipassists(card, QETH_PROT_IPV4);
  4513. if (qeth_is_supported(card, IPA_SETADAPTERPARMS))
  4514. qeth_query_setadapterparms(card);
  4515. if (qeth_adp_supported(card, IPA_SETADP_SET_DIAG_ASSIST))
  4516. qeth_query_setdiagass(card);
  4517. return 0;
  4518. out:
  4519. dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
  4520. "an error on the device\n");
  4521. QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n",
  4522. dev_name(&card->gdev->dev), rc);
  4523. return rc;
  4524. }
  4525. EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
  4526. static inline int qeth_create_skb_frag(struct qeth_qdio_buffer *qethbuffer,
  4527. struct qdio_buffer_element *element,
  4528. struct sk_buff **pskb, int offset, int *pfrag, int data_len)
  4529. {
  4530. struct page *page = virt_to_page(element->addr);
  4531. if (*pskb == NULL) {
  4532. if (qethbuffer->rx_skb) {
  4533. /* only if qeth_card.options.cq == QETH_CQ_ENABLED */
  4534. *pskb = qethbuffer->rx_skb;
  4535. qethbuffer->rx_skb = NULL;
  4536. } else {
  4537. *pskb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
  4538. if (!(*pskb))
  4539. return -ENOMEM;
  4540. }
  4541. skb_reserve(*pskb, ETH_HLEN);
  4542. if (data_len <= QETH_RX_PULL_LEN) {
  4543. memcpy(skb_put(*pskb, data_len), element->addr + offset,
  4544. data_len);
  4545. } else {
  4546. get_page(page);
  4547. memcpy(skb_put(*pskb, QETH_RX_PULL_LEN),
  4548. element->addr + offset, QETH_RX_PULL_LEN);
  4549. skb_fill_page_desc(*pskb, *pfrag, page,
  4550. offset + QETH_RX_PULL_LEN,
  4551. data_len - QETH_RX_PULL_LEN);
  4552. (*pskb)->data_len += data_len - QETH_RX_PULL_LEN;
  4553. (*pskb)->len += data_len - QETH_RX_PULL_LEN;
  4554. (*pskb)->truesize += data_len - QETH_RX_PULL_LEN;
  4555. (*pfrag)++;
  4556. }
  4557. } else {
  4558. get_page(page);
  4559. skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len);
  4560. (*pskb)->data_len += data_len;
  4561. (*pskb)->len += data_len;
  4562. (*pskb)->truesize += data_len;
  4563. (*pfrag)++;
  4564. }
  4565. return 0;
  4566. }
  4567. static inline int qeth_is_last_sbale(struct qdio_buffer_element *sbale)
  4568. {
  4569. return (sbale->eflags & SBAL_EFLAGS_LAST_ENTRY);
  4570. }
  4571. struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
  4572. struct qeth_qdio_buffer *qethbuffer,
  4573. struct qdio_buffer_element **__element, int *__offset,
  4574. struct qeth_hdr **hdr)
  4575. {
  4576. struct qdio_buffer_element *element = *__element;
  4577. struct qdio_buffer *buffer = qethbuffer->buffer;
  4578. int offset = *__offset;
  4579. struct sk_buff *skb = NULL;
  4580. int skb_len = 0;
  4581. void *data_ptr;
  4582. int data_len;
  4583. int headroom = 0;
  4584. int use_rx_sg = 0;
  4585. int frag = 0;
  4586. /* qeth_hdr must not cross element boundaries */
  4587. if (element->length < offset + sizeof(struct qeth_hdr)) {
  4588. if (qeth_is_last_sbale(element))
  4589. return NULL;
  4590. element++;
  4591. offset = 0;
  4592. if (element->length < sizeof(struct qeth_hdr))
  4593. return NULL;
  4594. }
  4595. *hdr = element->addr + offset;
  4596. offset += sizeof(struct qeth_hdr);
  4597. switch ((*hdr)->hdr.l2.id) {
  4598. case QETH_HEADER_TYPE_LAYER2:
  4599. skb_len = (*hdr)->hdr.l2.pkt_length;
  4600. break;
  4601. case QETH_HEADER_TYPE_LAYER3:
  4602. skb_len = (*hdr)->hdr.l3.length;
  4603. headroom = ETH_HLEN;
  4604. break;
  4605. case QETH_HEADER_TYPE_OSN:
  4606. skb_len = (*hdr)->hdr.osn.pdu_length;
  4607. headroom = sizeof(struct qeth_hdr);
  4608. break;
  4609. default:
  4610. break;
  4611. }
  4612. if (!skb_len)
  4613. return NULL;
  4614. if (((skb_len >= card->options.rx_sg_cb) &&
  4615. (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
  4616. (!atomic_read(&card->force_alloc_skb))) ||
  4617. (card->options.cq == QETH_CQ_ENABLED)) {
  4618. use_rx_sg = 1;
  4619. } else {
  4620. skb = dev_alloc_skb(skb_len + headroom);
  4621. if (!skb)
  4622. goto no_mem;
  4623. if (headroom)
  4624. skb_reserve(skb, headroom);
  4625. }
  4626. data_ptr = element->addr + offset;
  4627. while (skb_len) {
  4628. data_len = min(skb_len, (int)(element->length - offset));
  4629. if (data_len) {
  4630. if (use_rx_sg) {
  4631. if (qeth_create_skb_frag(qethbuffer, element,
  4632. &skb, offset, &frag, data_len))
  4633. goto no_mem;
  4634. } else {
  4635. memcpy(skb_put(skb, data_len), data_ptr,
  4636. data_len);
  4637. }
  4638. }
  4639. skb_len -= data_len;
  4640. if (skb_len) {
  4641. if (qeth_is_last_sbale(element)) {
  4642. QETH_CARD_TEXT(card, 4, "unexeob");
  4643. QETH_CARD_HEX(card, 2, buffer, sizeof(void *));
  4644. dev_kfree_skb_any(skb);
  4645. card->stats.rx_errors++;
  4646. return NULL;
  4647. }
  4648. element++;
  4649. offset = 0;
  4650. data_ptr = element->addr;
  4651. } else {
  4652. offset += data_len;
  4653. }
  4654. }
  4655. *__element = element;
  4656. *__offset = offset;
  4657. if (use_rx_sg && card->options.performance_stats) {
  4658. card->perf_stats.sg_skbs_rx++;
  4659. card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
  4660. }
  4661. return skb;
  4662. no_mem:
  4663. if (net_ratelimit()) {
  4664. QETH_CARD_TEXT(card, 2, "noskbmem");
  4665. }
  4666. card->stats.rx_dropped++;
  4667. return NULL;
  4668. }
  4669. EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
  4670. static void qeth_unregister_dbf_views(void)
  4671. {
  4672. int x;
  4673. for (x = 0; x < QETH_DBF_INFOS; x++) {
  4674. debug_unregister(qeth_dbf[x].id);
  4675. qeth_dbf[x].id = NULL;
  4676. }
  4677. }
  4678. void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...)
  4679. {
  4680. char dbf_txt_buf[32];
  4681. va_list args;
  4682. if (!debug_level_enabled(id, level))
  4683. return;
  4684. va_start(args, fmt);
  4685. vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
  4686. va_end(args);
  4687. debug_text_event(id, level, dbf_txt_buf);
  4688. }
  4689. EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
  4690. static int qeth_register_dbf_views(void)
  4691. {
  4692. int ret;
  4693. int x;
  4694. for (x = 0; x < QETH_DBF_INFOS; x++) {
  4695. /* register the areas */
  4696. qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
  4697. qeth_dbf[x].pages,
  4698. qeth_dbf[x].areas,
  4699. qeth_dbf[x].len);
  4700. if (qeth_dbf[x].id == NULL) {
  4701. qeth_unregister_dbf_views();
  4702. return -ENOMEM;
  4703. }
  4704. /* register a view */
  4705. ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
  4706. if (ret) {
  4707. qeth_unregister_dbf_views();
  4708. return ret;
  4709. }
  4710. /* set a passing level */
  4711. debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
  4712. }
  4713. return 0;
  4714. }
  4715. int qeth_core_load_discipline(struct qeth_card *card,
  4716. enum qeth_discipline_id discipline)
  4717. {
  4718. int rc = 0;
  4719. mutex_lock(&qeth_mod_mutex);
  4720. switch (discipline) {
  4721. case QETH_DISCIPLINE_LAYER3:
  4722. card->discipline = try_then_request_module(
  4723. symbol_get(qeth_l3_discipline), "qeth_l3");
  4724. break;
  4725. case QETH_DISCIPLINE_LAYER2:
  4726. card->discipline = try_then_request_module(
  4727. symbol_get(qeth_l2_discipline), "qeth_l2");
  4728. break;
  4729. }
  4730. if (!card->discipline) {
  4731. dev_err(&card->gdev->dev, "There is no kernel module to "
  4732. "support discipline %d\n", discipline);
  4733. rc = -EINVAL;
  4734. }
  4735. mutex_unlock(&qeth_mod_mutex);
  4736. return rc;
  4737. }
  4738. void qeth_core_free_discipline(struct qeth_card *card)
  4739. {
  4740. if (card->options.layer2)
  4741. symbol_put(qeth_l2_discipline);
  4742. else
  4743. symbol_put(qeth_l3_discipline);
  4744. card->discipline = NULL;
  4745. }
  4746. static const struct device_type qeth_generic_devtype = {
  4747. .name = "qeth_generic",
  4748. .groups = qeth_generic_attr_groups,
  4749. };
  4750. static const struct device_type qeth_osn_devtype = {
  4751. .name = "qeth_osn",
  4752. .groups = qeth_osn_attr_groups,
  4753. };
  4754. #define DBF_NAME_LEN 20
  4755. struct qeth_dbf_entry {
  4756. char dbf_name[DBF_NAME_LEN];
  4757. debug_info_t *dbf_info;
  4758. struct list_head dbf_list;
  4759. };
  4760. static LIST_HEAD(qeth_dbf_list);
  4761. static DEFINE_MUTEX(qeth_dbf_list_mutex);
  4762. static debug_info_t *qeth_get_dbf_entry(char *name)
  4763. {
  4764. struct qeth_dbf_entry *entry;
  4765. debug_info_t *rc = NULL;
  4766. mutex_lock(&qeth_dbf_list_mutex);
  4767. list_for_each_entry(entry, &qeth_dbf_list, dbf_list) {
  4768. if (strcmp(entry->dbf_name, name) == 0) {
  4769. rc = entry->dbf_info;
  4770. break;
  4771. }
  4772. }
  4773. mutex_unlock(&qeth_dbf_list_mutex);
  4774. return rc;
  4775. }
  4776. static int qeth_add_dbf_entry(struct qeth_card *card, char *name)
  4777. {
  4778. struct qeth_dbf_entry *new_entry;
  4779. card->debug = debug_register(name, 2, 1, 8);
  4780. if (!card->debug) {
  4781. QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf");
  4782. goto err;
  4783. }
  4784. if (debug_register_view(card->debug, &debug_hex_ascii_view))
  4785. goto err_dbg;
  4786. new_entry = kzalloc(sizeof(struct qeth_dbf_entry), GFP_KERNEL);
  4787. if (!new_entry)
  4788. goto err_dbg;
  4789. strncpy(new_entry->dbf_name, name, DBF_NAME_LEN);
  4790. new_entry->dbf_info = card->debug;
  4791. mutex_lock(&qeth_dbf_list_mutex);
  4792. list_add(&new_entry->dbf_list, &qeth_dbf_list);
  4793. mutex_unlock(&qeth_dbf_list_mutex);
  4794. return 0;
  4795. err_dbg:
  4796. debug_unregister(card->debug);
  4797. err:
  4798. return -ENOMEM;
  4799. }
  4800. static void qeth_clear_dbf_list(void)
  4801. {
  4802. struct qeth_dbf_entry *entry, *tmp;
  4803. mutex_lock(&qeth_dbf_list_mutex);
  4804. list_for_each_entry_safe(entry, tmp, &qeth_dbf_list, dbf_list) {
  4805. list_del(&entry->dbf_list);
  4806. debug_unregister(entry->dbf_info);
  4807. kfree(entry);
  4808. }
  4809. mutex_unlock(&qeth_dbf_list_mutex);
  4810. }
  4811. static int qeth_core_probe_device(struct ccwgroup_device *gdev)
  4812. {
  4813. struct qeth_card *card;
  4814. struct device *dev;
  4815. int rc;
  4816. unsigned long flags;
  4817. char dbf_name[DBF_NAME_LEN];
  4818. QETH_DBF_TEXT(SETUP, 2, "probedev");
  4819. dev = &gdev->dev;
  4820. if (!get_device(dev))
  4821. return -ENODEV;
  4822. QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
  4823. card = qeth_alloc_card();
  4824. if (!card) {
  4825. QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
  4826. rc = -ENOMEM;
  4827. goto err_dev;
  4828. }
  4829. snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s",
  4830. dev_name(&gdev->dev));
  4831. card->debug = qeth_get_dbf_entry(dbf_name);
  4832. if (!card->debug) {
  4833. rc = qeth_add_dbf_entry(card, dbf_name);
  4834. if (rc)
  4835. goto err_card;
  4836. }
  4837. card->read.ccwdev = gdev->cdev[0];
  4838. card->write.ccwdev = gdev->cdev[1];
  4839. card->data.ccwdev = gdev->cdev[2];
  4840. dev_set_drvdata(&gdev->dev, card);
  4841. card->gdev = gdev;
  4842. gdev->cdev[0]->handler = qeth_irq;
  4843. gdev->cdev[1]->handler = qeth_irq;
  4844. gdev->cdev[2]->handler = qeth_irq;
  4845. rc = qeth_determine_card_type(card);
  4846. if (rc) {
  4847. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  4848. goto err_card;
  4849. }
  4850. rc = qeth_setup_card(card);
  4851. if (rc) {
  4852. QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
  4853. goto err_card;
  4854. }
  4855. if (card->info.type == QETH_CARD_TYPE_OSN)
  4856. gdev->dev.type = &qeth_osn_devtype;
  4857. else
  4858. gdev->dev.type = &qeth_generic_devtype;
  4859. switch (card->info.type) {
  4860. case QETH_CARD_TYPE_OSN:
  4861. case QETH_CARD_TYPE_OSM:
  4862. rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2);
  4863. if (rc)
  4864. goto err_card;
  4865. rc = card->discipline->setup(card->gdev);
  4866. if (rc)
  4867. goto err_disc;
  4868. case QETH_CARD_TYPE_OSD:
  4869. case QETH_CARD_TYPE_OSX:
  4870. default:
  4871. break;
  4872. }
  4873. write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
  4874. list_add_tail(&card->list, &qeth_core_card_list.list);
  4875. write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
  4876. qeth_determine_capabilities(card);
  4877. return 0;
  4878. err_disc:
  4879. qeth_core_free_discipline(card);
  4880. err_card:
  4881. qeth_core_free_card(card);
  4882. err_dev:
  4883. put_device(dev);
  4884. return rc;
  4885. }
  4886. static void qeth_core_remove_device(struct ccwgroup_device *gdev)
  4887. {
  4888. unsigned long flags;
  4889. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  4890. QETH_DBF_TEXT(SETUP, 2, "removedv");
  4891. if (card->discipline) {
  4892. card->discipline->remove(gdev);
  4893. qeth_core_free_discipline(card);
  4894. }
  4895. write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
  4896. list_del(&card->list);
  4897. write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
  4898. qeth_core_free_card(card);
  4899. dev_set_drvdata(&gdev->dev, NULL);
  4900. put_device(&gdev->dev);
  4901. return;
  4902. }
  4903. static int qeth_core_set_online(struct ccwgroup_device *gdev)
  4904. {
  4905. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  4906. int rc = 0;
  4907. int def_discipline;
  4908. if (!card->discipline) {
  4909. if (card->info.type == QETH_CARD_TYPE_IQD)
  4910. def_discipline = QETH_DISCIPLINE_LAYER3;
  4911. else
  4912. def_discipline = QETH_DISCIPLINE_LAYER2;
  4913. rc = qeth_core_load_discipline(card, def_discipline);
  4914. if (rc)
  4915. goto err;
  4916. rc = card->discipline->setup(card->gdev);
  4917. if (rc)
  4918. goto err;
  4919. }
  4920. rc = card->discipline->set_online(gdev);
  4921. err:
  4922. return rc;
  4923. }
  4924. static int qeth_core_set_offline(struct ccwgroup_device *gdev)
  4925. {
  4926. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  4927. return card->discipline->set_offline(gdev);
  4928. }
  4929. static void qeth_core_shutdown(struct ccwgroup_device *gdev)
  4930. {
  4931. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  4932. if (card->discipline && card->discipline->shutdown)
  4933. card->discipline->shutdown(gdev);
  4934. }
  4935. static int qeth_core_prepare(struct ccwgroup_device *gdev)
  4936. {
  4937. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  4938. if (card->discipline && card->discipline->prepare)
  4939. return card->discipline->prepare(gdev);
  4940. return 0;
  4941. }
  4942. static void qeth_core_complete(struct ccwgroup_device *gdev)
  4943. {
  4944. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  4945. if (card->discipline && card->discipline->complete)
  4946. card->discipline->complete(gdev);
  4947. }
  4948. static int qeth_core_freeze(struct ccwgroup_device *gdev)
  4949. {
  4950. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  4951. if (card->discipline && card->discipline->freeze)
  4952. return card->discipline->freeze(gdev);
  4953. return 0;
  4954. }
  4955. static int qeth_core_thaw(struct ccwgroup_device *gdev)
  4956. {
  4957. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  4958. if (card->discipline && card->discipline->thaw)
  4959. return card->discipline->thaw(gdev);
  4960. return 0;
  4961. }
  4962. static int qeth_core_restore(struct ccwgroup_device *gdev)
  4963. {
  4964. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  4965. if (card->discipline && card->discipline->restore)
  4966. return card->discipline->restore(gdev);
  4967. return 0;
  4968. }
  4969. static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
  4970. .driver = {
  4971. .owner = THIS_MODULE,
  4972. .name = "qeth",
  4973. },
  4974. .setup = qeth_core_probe_device,
  4975. .remove = qeth_core_remove_device,
  4976. .set_online = qeth_core_set_online,
  4977. .set_offline = qeth_core_set_offline,
  4978. .shutdown = qeth_core_shutdown,
  4979. .prepare = qeth_core_prepare,
  4980. .complete = qeth_core_complete,
  4981. .freeze = qeth_core_freeze,
  4982. .thaw = qeth_core_thaw,
  4983. .restore = qeth_core_restore,
  4984. };
  4985. static ssize_t qeth_core_driver_group_store(struct device_driver *ddrv,
  4986. const char *buf, size_t count)
  4987. {
  4988. int err;
  4989. err = ccwgroup_create_dev(qeth_core_root_dev,
  4990. &qeth_core_ccwgroup_driver, 3, buf);
  4991. return err ? err : count;
  4992. }
  4993. static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store);
  4994. static struct attribute *qeth_drv_attrs[] = {
  4995. &driver_attr_group.attr,
  4996. NULL,
  4997. };
  4998. static struct attribute_group qeth_drv_attr_group = {
  4999. .attrs = qeth_drv_attrs,
  5000. };
  5001. static const struct attribute_group *qeth_drv_attr_groups[] = {
  5002. &qeth_drv_attr_group,
  5003. NULL,
  5004. };
  5005. static struct {
  5006. const char str[ETH_GSTRING_LEN];
  5007. } qeth_ethtool_stats_keys[] = {
  5008. /* 0 */{"rx skbs"},
  5009. {"rx buffers"},
  5010. {"tx skbs"},
  5011. {"tx buffers"},
  5012. {"tx skbs no packing"},
  5013. {"tx buffers no packing"},
  5014. {"tx skbs packing"},
  5015. {"tx buffers packing"},
  5016. {"tx sg skbs"},
  5017. {"tx sg frags"},
  5018. /* 10 */{"rx sg skbs"},
  5019. {"rx sg frags"},
  5020. {"rx sg page allocs"},
  5021. {"tx large kbytes"},
  5022. {"tx large count"},
  5023. {"tx pk state ch n->p"},
  5024. {"tx pk state ch p->n"},
  5025. {"tx pk watermark low"},
  5026. {"tx pk watermark high"},
  5027. {"queue 0 buffer usage"},
  5028. /* 20 */{"queue 1 buffer usage"},
  5029. {"queue 2 buffer usage"},
  5030. {"queue 3 buffer usage"},
  5031. {"rx poll time"},
  5032. {"rx poll count"},
  5033. {"rx do_QDIO time"},
  5034. {"rx do_QDIO count"},
  5035. {"tx handler time"},
  5036. {"tx handler count"},
  5037. {"tx time"},
  5038. /* 30 */{"tx count"},
  5039. {"tx do_QDIO time"},
  5040. {"tx do_QDIO count"},
  5041. {"tx csum"},
  5042. {"tx lin"},
  5043. {"cq handler count"},
  5044. {"cq handler time"}
  5045. };
  5046. int qeth_core_get_sset_count(struct net_device *dev, int stringset)
  5047. {
  5048. switch (stringset) {
  5049. case ETH_SS_STATS:
  5050. return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
  5051. default:
  5052. return -EINVAL;
  5053. }
  5054. }
  5055. EXPORT_SYMBOL_GPL(qeth_core_get_sset_count);
  5056. void qeth_core_get_ethtool_stats(struct net_device *dev,
  5057. struct ethtool_stats *stats, u64 *data)
  5058. {
  5059. struct qeth_card *card = dev->ml_priv;
  5060. data[0] = card->stats.rx_packets -
  5061. card->perf_stats.initial_rx_packets;
  5062. data[1] = card->perf_stats.bufs_rec;
  5063. data[2] = card->stats.tx_packets -
  5064. card->perf_stats.initial_tx_packets;
  5065. data[3] = card->perf_stats.bufs_sent;
  5066. data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
  5067. - card->perf_stats.skbs_sent_pack;
  5068. data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
  5069. data[6] = card->perf_stats.skbs_sent_pack;
  5070. data[7] = card->perf_stats.bufs_sent_pack;
  5071. data[8] = card->perf_stats.sg_skbs_sent;
  5072. data[9] = card->perf_stats.sg_frags_sent;
  5073. data[10] = card->perf_stats.sg_skbs_rx;
  5074. data[11] = card->perf_stats.sg_frags_rx;
  5075. data[12] = card->perf_stats.sg_alloc_page_rx;
  5076. data[13] = (card->perf_stats.large_send_bytes >> 10);
  5077. data[14] = card->perf_stats.large_send_cnt;
  5078. data[15] = card->perf_stats.sc_dp_p;
  5079. data[16] = card->perf_stats.sc_p_dp;
  5080. data[17] = QETH_LOW_WATERMARK_PACK;
  5081. data[18] = QETH_HIGH_WATERMARK_PACK;
  5082. data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
  5083. data[20] = (card->qdio.no_out_queues > 1) ?
  5084. atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
  5085. data[21] = (card->qdio.no_out_queues > 2) ?
  5086. atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
  5087. data[22] = (card->qdio.no_out_queues > 3) ?
  5088. atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
  5089. data[23] = card->perf_stats.inbound_time;
  5090. data[24] = card->perf_stats.inbound_cnt;
  5091. data[25] = card->perf_stats.inbound_do_qdio_time;
  5092. data[26] = card->perf_stats.inbound_do_qdio_cnt;
  5093. data[27] = card->perf_stats.outbound_handler_time;
  5094. data[28] = card->perf_stats.outbound_handler_cnt;
  5095. data[29] = card->perf_stats.outbound_time;
  5096. data[30] = card->perf_stats.outbound_cnt;
  5097. data[31] = card->perf_stats.outbound_do_qdio_time;
  5098. data[32] = card->perf_stats.outbound_do_qdio_cnt;
  5099. data[33] = card->perf_stats.tx_csum;
  5100. data[34] = card->perf_stats.tx_lin;
  5101. data[35] = card->perf_stats.cq_cnt;
  5102. data[36] = card->perf_stats.cq_time;
  5103. }
  5104. EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
  5105. void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
  5106. {
  5107. switch (stringset) {
  5108. case ETH_SS_STATS:
  5109. memcpy(data, &qeth_ethtool_stats_keys,
  5110. sizeof(qeth_ethtool_stats_keys));
  5111. break;
  5112. default:
  5113. WARN_ON(1);
  5114. break;
  5115. }
  5116. }
  5117. EXPORT_SYMBOL_GPL(qeth_core_get_strings);
  5118. void qeth_core_get_drvinfo(struct net_device *dev,
  5119. struct ethtool_drvinfo *info)
  5120. {
  5121. struct qeth_card *card = dev->ml_priv;
  5122. strlcpy(info->driver, card->options.layer2 ? "qeth_l2" : "qeth_l3",
  5123. sizeof(info->driver));
  5124. strlcpy(info->version, "1.0", sizeof(info->version));
  5125. strlcpy(info->fw_version, card->info.mcl_level,
  5126. sizeof(info->fw_version));
  5127. snprintf(info->bus_info, sizeof(info->bus_info), "%s/%s/%s",
  5128. CARD_RDEV_ID(card), CARD_WDEV_ID(card), CARD_DDEV_ID(card));
  5129. }
  5130. EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
  5131. /* Helper function to fill 'advertizing' and 'supported' which are the same. */
  5132. /* Autoneg and full-duplex are supported and advertized uncondionally. */
  5133. /* Always advertize and support all speeds up to specified, and only one */
  5134. /* specified port type. */
  5135. static void qeth_set_ecmd_adv_sup(struct ethtool_cmd *ecmd,
  5136. int maxspeed, int porttype)
  5137. {
  5138. int port_sup, port_adv, spd_sup, spd_adv;
  5139. switch (porttype) {
  5140. case PORT_TP:
  5141. port_sup = SUPPORTED_TP;
  5142. port_adv = ADVERTISED_TP;
  5143. break;
  5144. case PORT_FIBRE:
  5145. port_sup = SUPPORTED_FIBRE;
  5146. port_adv = ADVERTISED_FIBRE;
  5147. break;
  5148. default:
  5149. port_sup = SUPPORTED_TP;
  5150. port_adv = ADVERTISED_TP;
  5151. WARN_ON_ONCE(1);
  5152. }
  5153. /* "Fallthrough" case'es ordered from high to low result in setting */
  5154. /* flags cumulatively, starting from the specified speed and down to */
  5155. /* the lowest possible. */
  5156. spd_sup = 0;
  5157. spd_adv = 0;
  5158. switch (maxspeed) {
  5159. case SPEED_10000:
  5160. spd_sup |= SUPPORTED_10000baseT_Full;
  5161. spd_adv |= ADVERTISED_10000baseT_Full;
  5162. case SPEED_1000:
  5163. spd_sup |= SUPPORTED_1000baseT_Half | SUPPORTED_1000baseT_Full;
  5164. spd_adv |= ADVERTISED_1000baseT_Half |
  5165. ADVERTISED_1000baseT_Full;
  5166. case SPEED_100:
  5167. spd_sup |= SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full;
  5168. spd_adv |= ADVERTISED_100baseT_Half | ADVERTISED_100baseT_Full;
  5169. case SPEED_10:
  5170. spd_sup |= SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full;
  5171. spd_adv |= ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full;
  5172. break;
  5173. default:
  5174. spd_sup = SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full;
  5175. spd_adv = ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full;
  5176. WARN_ON_ONCE(1);
  5177. }
  5178. ecmd->advertising = ADVERTISED_Autoneg | port_adv | spd_adv;
  5179. ecmd->supported = SUPPORTED_Autoneg | port_sup | spd_sup;
  5180. }
  5181. int qeth_core_ethtool_get_settings(struct net_device *netdev,
  5182. struct ethtool_cmd *ecmd)
  5183. {
  5184. struct qeth_card *card = netdev->ml_priv;
  5185. enum qeth_link_types link_type;
  5186. struct carrier_info carrier_info;
  5187. int rc;
  5188. u32 speed;
  5189. if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
  5190. link_type = QETH_LINK_TYPE_10GBIT_ETH;
  5191. else
  5192. link_type = card->info.link_type;
  5193. ecmd->transceiver = XCVR_INTERNAL;
  5194. ecmd->duplex = DUPLEX_FULL;
  5195. ecmd->autoneg = AUTONEG_ENABLE;
  5196. switch (link_type) {
  5197. case QETH_LINK_TYPE_FAST_ETH:
  5198. case QETH_LINK_TYPE_LANE_ETH100:
  5199. qeth_set_ecmd_adv_sup(ecmd, SPEED_100, PORT_TP);
  5200. speed = SPEED_100;
  5201. ecmd->port = PORT_TP;
  5202. break;
  5203. case QETH_LINK_TYPE_GBIT_ETH:
  5204. case QETH_LINK_TYPE_LANE_ETH1000:
  5205. qeth_set_ecmd_adv_sup(ecmd, SPEED_1000, PORT_FIBRE);
  5206. speed = SPEED_1000;
  5207. ecmd->port = PORT_FIBRE;
  5208. break;
  5209. case QETH_LINK_TYPE_10GBIT_ETH:
  5210. qeth_set_ecmd_adv_sup(ecmd, SPEED_10000, PORT_FIBRE);
  5211. speed = SPEED_10000;
  5212. ecmd->port = PORT_FIBRE;
  5213. break;
  5214. default:
  5215. qeth_set_ecmd_adv_sup(ecmd, SPEED_10, PORT_TP);
  5216. speed = SPEED_10;
  5217. ecmd->port = PORT_TP;
  5218. }
  5219. ethtool_cmd_speed_set(ecmd, speed);
  5220. /* Check if we can obtain more accurate information. */
  5221. /* If QUERY_CARD_INFO command is not supported or fails, */
  5222. /* just return the heuristics that was filled above. */
  5223. if (!qeth_card_hw_is_reachable(card))
  5224. return -ENODEV;
  5225. rc = qeth_query_card_info(card, &carrier_info);
  5226. if (rc == -EOPNOTSUPP) /* for old hardware, return heuristic */
  5227. return 0;
  5228. if (rc) /* report error from the hardware operation */
  5229. return rc;
  5230. /* on success, fill in the information got from the hardware */
  5231. netdev_dbg(netdev,
  5232. "card info: card_type=0x%02x, port_mode=0x%04x, port_speed=0x%08x\n",
  5233. carrier_info.card_type,
  5234. carrier_info.port_mode,
  5235. carrier_info.port_speed);
  5236. /* Update attributes for which we've obtained more authoritative */
  5237. /* information, leave the rest the way they where filled above. */
  5238. switch (carrier_info.card_type) {
  5239. case CARD_INFO_TYPE_1G_COPPER_A:
  5240. case CARD_INFO_TYPE_1G_COPPER_B:
  5241. qeth_set_ecmd_adv_sup(ecmd, SPEED_1000, PORT_TP);
  5242. ecmd->port = PORT_TP;
  5243. break;
  5244. case CARD_INFO_TYPE_1G_FIBRE_A:
  5245. case CARD_INFO_TYPE_1G_FIBRE_B:
  5246. qeth_set_ecmd_adv_sup(ecmd, SPEED_1000, PORT_FIBRE);
  5247. ecmd->port = PORT_FIBRE;
  5248. break;
  5249. case CARD_INFO_TYPE_10G_FIBRE_A:
  5250. case CARD_INFO_TYPE_10G_FIBRE_B:
  5251. qeth_set_ecmd_adv_sup(ecmd, SPEED_10000, PORT_FIBRE);
  5252. ecmd->port = PORT_FIBRE;
  5253. break;
  5254. }
  5255. switch (carrier_info.port_mode) {
  5256. case CARD_INFO_PORTM_FULLDUPLEX:
  5257. ecmd->duplex = DUPLEX_FULL;
  5258. break;
  5259. case CARD_INFO_PORTM_HALFDUPLEX:
  5260. ecmd->duplex = DUPLEX_HALF;
  5261. break;
  5262. }
  5263. switch (carrier_info.port_speed) {
  5264. case CARD_INFO_PORTS_10M:
  5265. speed = SPEED_10;
  5266. break;
  5267. case CARD_INFO_PORTS_100M:
  5268. speed = SPEED_100;
  5269. break;
  5270. case CARD_INFO_PORTS_1G:
  5271. speed = SPEED_1000;
  5272. break;
  5273. case CARD_INFO_PORTS_10G:
  5274. speed = SPEED_10000;
  5275. break;
  5276. }
  5277. ethtool_cmd_speed_set(ecmd, speed);
  5278. return 0;
  5279. }
  5280. EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings);
  5281. static int __init qeth_core_init(void)
  5282. {
  5283. int rc;
  5284. pr_info("loading core functions\n");
  5285. INIT_LIST_HEAD(&qeth_core_card_list.list);
  5286. INIT_LIST_HEAD(&qeth_dbf_list);
  5287. rwlock_init(&qeth_core_card_list.rwlock);
  5288. mutex_init(&qeth_mod_mutex);
  5289. qeth_wq = create_singlethread_workqueue("qeth_wq");
  5290. rc = qeth_register_dbf_views();
  5291. if (rc)
  5292. goto out_err;
  5293. qeth_core_root_dev = root_device_register("qeth");
  5294. rc = PTR_ERR_OR_ZERO(qeth_core_root_dev);
  5295. if (rc)
  5296. goto register_err;
  5297. qeth_core_header_cache = kmem_cache_create("qeth_hdr",
  5298. sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);
  5299. if (!qeth_core_header_cache) {
  5300. rc = -ENOMEM;
  5301. goto slab_err;
  5302. }
  5303. qeth_qdio_outbuf_cache = kmem_cache_create("qeth_buf",
  5304. sizeof(struct qeth_qdio_out_buffer), 0, 0, NULL);
  5305. if (!qeth_qdio_outbuf_cache) {
  5306. rc = -ENOMEM;
  5307. goto cqslab_err;
  5308. }
  5309. rc = ccw_driver_register(&qeth_ccw_driver);
  5310. if (rc)
  5311. goto ccw_err;
  5312. qeth_core_ccwgroup_driver.driver.groups = qeth_drv_attr_groups;
  5313. rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
  5314. if (rc)
  5315. goto ccwgroup_err;
  5316. return 0;
  5317. ccwgroup_err:
  5318. ccw_driver_unregister(&qeth_ccw_driver);
  5319. ccw_err:
  5320. kmem_cache_destroy(qeth_qdio_outbuf_cache);
  5321. cqslab_err:
  5322. kmem_cache_destroy(qeth_core_header_cache);
  5323. slab_err:
  5324. root_device_unregister(qeth_core_root_dev);
  5325. register_err:
  5326. qeth_unregister_dbf_views();
  5327. out_err:
  5328. pr_err("Initializing the qeth device driver failed\n");
  5329. return rc;
  5330. }
  5331. static void __exit qeth_core_exit(void)
  5332. {
  5333. qeth_clear_dbf_list();
  5334. destroy_workqueue(qeth_wq);
  5335. ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
  5336. ccw_driver_unregister(&qeth_ccw_driver);
  5337. kmem_cache_destroy(qeth_qdio_outbuf_cache);
  5338. kmem_cache_destroy(qeth_core_header_cache);
  5339. root_device_unregister(qeth_core_root_dev);
  5340. qeth_unregister_dbf_views();
  5341. pr_info("core functions removed\n");
  5342. }
  5343. module_init(qeth_core_init);
  5344. module_exit(qeth_core_exit);
  5345. MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
  5346. MODULE_DESCRIPTION("qeth core functions");
  5347. MODULE_LICENSE("GPL");