main.c 70 KB

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  1. /*
  2. * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
  3. * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
  4. *
  5. * This software is available to you under a choice of one of two
  6. * licenses. You may choose to be licensed under the terms of the GNU
  7. * General Public License (GPL) Version 2, available from the file
  8. * COPYING in the main directory of this source tree, or the
  9. * OpenIB.org BSD license below:
  10. *
  11. * Redistribution and use in source and binary forms, with or
  12. * without modification, are permitted provided that the following
  13. * conditions are met:
  14. *
  15. * - Redistributions of source code must retain the above
  16. * copyright notice, this list of conditions and the following
  17. * disclaimer.
  18. *
  19. * - Redistributions in binary form must reproduce the above
  20. * copyright notice, this list of conditions and the following
  21. * disclaimer in the documentation and/or other materials
  22. * provided with the distribution.
  23. *
  24. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31. * SOFTWARE.
  32. */
  33. #include <linux/module.h>
  34. #include <linux/init.h>
  35. #include <linux/slab.h>
  36. #include <linux/errno.h>
  37. #include <linux/netdevice.h>
  38. #include <linux/inetdevice.h>
  39. #include <linux/rtnetlink.h>
  40. #include <linux/if_vlan.h>
  41. #include <net/ipv6.h>
  42. #include <net/addrconf.h>
  43. #include <rdma/ib_smi.h>
  44. #include <rdma/ib_user_verbs.h>
  45. #include <rdma/ib_addr.h>
  46. #include <linux/mlx4/driver.h>
  47. #include <linux/mlx4/cmd.h>
  48. #include <linux/mlx4/qp.h>
  49. #include "mlx4_ib.h"
  50. #include "user.h"
  51. #define DRV_NAME MLX4_IB_DRV_NAME
  52. #define DRV_VERSION "2.2-1"
  53. #define DRV_RELDATE "Feb 2014"
  54. #define MLX4_IB_FLOW_MAX_PRIO 0xFFF
  55. #define MLX4_IB_FLOW_QPN_MASK 0xFFFFFF
  56. #define MLX4_IB_CARD_REV_A0 0xA0
  57. MODULE_AUTHOR("Roland Dreier");
  58. MODULE_DESCRIPTION("Mellanox ConnectX HCA InfiniBand driver");
  59. MODULE_LICENSE("Dual BSD/GPL");
  60. MODULE_VERSION(DRV_VERSION);
  61. int mlx4_ib_sm_guid_assign = 1;
  62. module_param_named(sm_guid_assign, mlx4_ib_sm_guid_assign, int, 0444);
  63. MODULE_PARM_DESC(sm_guid_assign, "Enable SM alias_GUID assignment if sm_guid_assign > 0 (Default: 1)");
  64. static const char mlx4_ib_version[] =
  65. DRV_NAME ": Mellanox ConnectX InfiniBand driver v"
  66. DRV_VERSION " (" DRV_RELDATE ")\n";
  67. struct update_gid_work {
  68. struct work_struct work;
  69. union ib_gid gids[128];
  70. struct mlx4_ib_dev *dev;
  71. int port;
  72. };
  73. static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init);
  74. static struct workqueue_struct *wq;
  75. static void init_query_mad(struct ib_smp *mad)
  76. {
  77. mad->base_version = 1;
  78. mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
  79. mad->class_version = 1;
  80. mad->method = IB_MGMT_METHOD_GET;
  81. }
  82. static union ib_gid zgid;
  83. static int check_flow_steering_support(struct mlx4_dev *dev)
  84. {
  85. int eth_num_ports = 0;
  86. int ib_num_ports = 0;
  87. int dmfs = dev->caps.steering_mode == MLX4_STEERING_MODE_DEVICE_MANAGED;
  88. if (dmfs) {
  89. int i;
  90. mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH)
  91. eth_num_ports++;
  92. mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
  93. ib_num_ports++;
  94. dmfs &= (!ib_num_ports ||
  95. (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_IPOIB)) &&
  96. (!eth_num_ports ||
  97. (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FS_EN));
  98. if (ib_num_ports && mlx4_is_mfunc(dev)) {
  99. pr_warn("Device managed flow steering is unavailable for IB port in multifunction env.\n");
  100. dmfs = 0;
  101. }
  102. }
  103. return dmfs;
  104. }
  105. static int num_ib_ports(struct mlx4_dev *dev)
  106. {
  107. int ib_ports = 0;
  108. int i;
  109. mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
  110. ib_ports++;
  111. return ib_ports;
  112. }
  113. static int mlx4_ib_query_device(struct ib_device *ibdev,
  114. struct ib_device_attr *props)
  115. {
  116. struct mlx4_ib_dev *dev = to_mdev(ibdev);
  117. struct ib_smp *in_mad = NULL;
  118. struct ib_smp *out_mad = NULL;
  119. int err = -ENOMEM;
  120. int have_ib_ports;
  121. in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
  122. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  123. if (!in_mad || !out_mad)
  124. goto out;
  125. init_query_mad(in_mad);
  126. in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
  127. err = mlx4_MAD_IFC(to_mdev(ibdev), MLX4_MAD_IFC_IGNORE_KEYS,
  128. 1, NULL, NULL, in_mad, out_mad);
  129. if (err)
  130. goto out;
  131. memset(props, 0, sizeof *props);
  132. have_ib_ports = num_ib_ports(dev->dev);
  133. props->fw_ver = dev->dev->caps.fw_ver;
  134. props->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT |
  135. IB_DEVICE_PORT_ACTIVE_EVENT |
  136. IB_DEVICE_SYS_IMAGE_GUID |
  137. IB_DEVICE_RC_RNR_NAK_GEN |
  138. IB_DEVICE_BLOCK_MULTICAST_LOOPBACK;
  139. if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_PKEY_CNTR)
  140. props->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR;
  141. if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_QKEY_CNTR)
  142. props->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR;
  143. if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_APM && have_ib_ports)
  144. props->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG;
  145. if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_UD_AV_PORT)
  146. props->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE;
  147. if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_IPOIB_CSUM)
  148. props->device_cap_flags |= IB_DEVICE_UD_IP_CSUM;
  149. if (dev->dev->caps.max_gso_sz &&
  150. (dev->dev->rev_id != MLX4_IB_CARD_REV_A0) &&
  151. (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BLH))
  152. props->device_cap_flags |= IB_DEVICE_UD_TSO;
  153. if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_RESERVED_LKEY)
  154. props->device_cap_flags |= IB_DEVICE_LOCAL_DMA_LKEY;
  155. if ((dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_LOCAL_INV) &&
  156. (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_REMOTE_INV) &&
  157. (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_FAST_REG_WR))
  158. props->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS;
  159. if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC)
  160. props->device_cap_flags |= IB_DEVICE_XRC;
  161. if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW)
  162. props->device_cap_flags |= IB_DEVICE_MEM_WINDOW;
  163. if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) {
  164. if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_WIN_TYPE_2B)
  165. props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2B;
  166. else
  167. props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2A;
  168. if (dev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED)
  169. props->device_cap_flags |= IB_DEVICE_MANAGED_FLOW_STEERING;
  170. }
  171. props->vendor_id = be32_to_cpup((__be32 *) (out_mad->data + 36)) &
  172. 0xffffff;
  173. props->vendor_part_id = dev->dev->pdev->device;
  174. props->hw_ver = be32_to_cpup((__be32 *) (out_mad->data + 32));
  175. memcpy(&props->sys_image_guid, out_mad->data + 4, 8);
  176. props->max_mr_size = ~0ull;
  177. props->page_size_cap = dev->dev->caps.page_size_cap;
  178. props->max_qp = dev->dev->quotas.qp;
  179. props->max_qp_wr = dev->dev->caps.max_wqes - MLX4_IB_SQ_MAX_SPARE;
  180. props->max_sge = min(dev->dev->caps.max_sq_sg,
  181. dev->dev->caps.max_rq_sg);
  182. props->max_cq = dev->dev->quotas.cq;
  183. props->max_cqe = dev->dev->caps.max_cqes;
  184. props->max_mr = dev->dev->quotas.mpt;
  185. props->max_pd = dev->dev->caps.num_pds - dev->dev->caps.reserved_pds;
  186. props->max_qp_rd_atom = dev->dev->caps.max_qp_dest_rdma;
  187. props->max_qp_init_rd_atom = dev->dev->caps.max_qp_init_rdma;
  188. props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp;
  189. props->max_srq = dev->dev->quotas.srq;
  190. props->max_srq_wr = dev->dev->caps.max_srq_wqes - 1;
  191. props->max_srq_sge = dev->dev->caps.max_srq_sge;
  192. props->max_fast_reg_page_list_len = MLX4_MAX_FAST_REG_PAGES;
  193. props->local_ca_ack_delay = dev->dev->caps.local_ca_ack_delay;
  194. props->atomic_cap = dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_ATOMIC ?
  195. IB_ATOMIC_HCA : IB_ATOMIC_NONE;
  196. props->masked_atomic_cap = props->atomic_cap;
  197. props->max_pkeys = dev->dev->caps.pkey_table_len[1];
  198. props->max_mcast_grp = dev->dev->caps.num_mgms + dev->dev->caps.num_amgms;
  199. props->max_mcast_qp_attach = dev->dev->caps.num_qp_per_mgm;
  200. props->max_total_mcast_qp_attach = props->max_mcast_qp_attach *
  201. props->max_mcast_grp;
  202. props->max_map_per_fmr = dev->dev->caps.max_fmr_maps;
  203. out:
  204. kfree(in_mad);
  205. kfree(out_mad);
  206. return err;
  207. }
  208. static enum rdma_link_layer
  209. mlx4_ib_port_link_layer(struct ib_device *device, u8 port_num)
  210. {
  211. struct mlx4_dev *dev = to_mdev(device)->dev;
  212. return dev->caps.port_mask[port_num] == MLX4_PORT_TYPE_IB ?
  213. IB_LINK_LAYER_INFINIBAND : IB_LINK_LAYER_ETHERNET;
  214. }
  215. static int ib_link_query_port(struct ib_device *ibdev, u8 port,
  216. struct ib_port_attr *props, int netw_view)
  217. {
  218. struct ib_smp *in_mad = NULL;
  219. struct ib_smp *out_mad = NULL;
  220. int ext_active_speed;
  221. int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
  222. int err = -ENOMEM;
  223. in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
  224. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  225. if (!in_mad || !out_mad)
  226. goto out;
  227. init_query_mad(in_mad);
  228. in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
  229. in_mad->attr_mod = cpu_to_be32(port);
  230. if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view)
  231. mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
  232. err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
  233. in_mad, out_mad);
  234. if (err)
  235. goto out;
  236. props->lid = be16_to_cpup((__be16 *) (out_mad->data + 16));
  237. props->lmc = out_mad->data[34] & 0x7;
  238. props->sm_lid = be16_to_cpup((__be16 *) (out_mad->data + 18));
  239. props->sm_sl = out_mad->data[36] & 0xf;
  240. props->state = out_mad->data[32] & 0xf;
  241. props->phys_state = out_mad->data[33] >> 4;
  242. props->port_cap_flags = be32_to_cpup((__be32 *) (out_mad->data + 20));
  243. if (netw_view)
  244. props->gid_tbl_len = out_mad->data[50];
  245. else
  246. props->gid_tbl_len = to_mdev(ibdev)->dev->caps.gid_table_len[port];
  247. props->max_msg_sz = to_mdev(ibdev)->dev->caps.max_msg_sz;
  248. props->pkey_tbl_len = to_mdev(ibdev)->dev->caps.pkey_table_len[port];
  249. props->bad_pkey_cntr = be16_to_cpup((__be16 *) (out_mad->data + 46));
  250. props->qkey_viol_cntr = be16_to_cpup((__be16 *) (out_mad->data + 48));
  251. props->active_width = out_mad->data[31] & 0xf;
  252. props->active_speed = out_mad->data[35] >> 4;
  253. props->max_mtu = out_mad->data[41] & 0xf;
  254. props->active_mtu = out_mad->data[36] >> 4;
  255. props->subnet_timeout = out_mad->data[51] & 0x1f;
  256. props->max_vl_num = out_mad->data[37] >> 4;
  257. props->init_type_reply = out_mad->data[41] >> 4;
  258. /* Check if extended speeds (EDR/FDR/...) are supported */
  259. if (props->port_cap_flags & IB_PORT_EXTENDED_SPEEDS_SUP) {
  260. ext_active_speed = out_mad->data[62] >> 4;
  261. switch (ext_active_speed) {
  262. case 1:
  263. props->active_speed = IB_SPEED_FDR;
  264. break;
  265. case 2:
  266. props->active_speed = IB_SPEED_EDR;
  267. break;
  268. }
  269. }
  270. /* If reported active speed is QDR, check if is FDR-10 */
  271. if (props->active_speed == IB_SPEED_QDR) {
  272. init_query_mad(in_mad);
  273. in_mad->attr_id = MLX4_ATTR_EXTENDED_PORT_INFO;
  274. in_mad->attr_mod = cpu_to_be32(port);
  275. err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port,
  276. NULL, NULL, in_mad, out_mad);
  277. if (err)
  278. goto out;
  279. /* Checking LinkSpeedActive for FDR-10 */
  280. if (out_mad->data[15] & 0x1)
  281. props->active_speed = IB_SPEED_FDR10;
  282. }
  283. /* Avoid wrong speed value returned by FW if the IB link is down. */
  284. if (props->state == IB_PORT_DOWN)
  285. props->active_speed = IB_SPEED_SDR;
  286. out:
  287. kfree(in_mad);
  288. kfree(out_mad);
  289. return err;
  290. }
  291. static u8 state_to_phys_state(enum ib_port_state state)
  292. {
  293. return state == IB_PORT_ACTIVE ? 5 : 3;
  294. }
  295. static int eth_link_query_port(struct ib_device *ibdev, u8 port,
  296. struct ib_port_attr *props, int netw_view)
  297. {
  298. struct mlx4_ib_dev *mdev = to_mdev(ibdev);
  299. struct mlx4_ib_iboe *iboe = &mdev->iboe;
  300. struct net_device *ndev;
  301. enum ib_mtu tmp;
  302. struct mlx4_cmd_mailbox *mailbox;
  303. int err = 0;
  304. mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
  305. if (IS_ERR(mailbox))
  306. return PTR_ERR(mailbox);
  307. err = mlx4_cmd_box(mdev->dev, 0, mailbox->dma, port, 0,
  308. MLX4_CMD_QUERY_PORT, MLX4_CMD_TIME_CLASS_B,
  309. MLX4_CMD_WRAPPED);
  310. if (err)
  311. goto out;
  312. props->active_width = (((u8 *)mailbox->buf)[5] == 0x40) ?
  313. IB_WIDTH_4X : IB_WIDTH_1X;
  314. props->active_speed = IB_SPEED_QDR;
  315. props->port_cap_flags = IB_PORT_CM_SUP | IB_PORT_IP_BASED_GIDS;
  316. props->gid_tbl_len = mdev->dev->caps.gid_table_len[port];
  317. props->max_msg_sz = mdev->dev->caps.max_msg_sz;
  318. props->pkey_tbl_len = 1;
  319. props->max_mtu = IB_MTU_4096;
  320. props->max_vl_num = 2;
  321. props->state = IB_PORT_DOWN;
  322. props->phys_state = state_to_phys_state(props->state);
  323. props->active_mtu = IB_MTU_256;
  324. spin_lock_bh(&iboe->lock);
  325. ndev = iboe->netdevs[port - 1];
  326. if (!ndev)
  327. goto out_unlock;
  328. tmp = iboe_get_mtu(ndev->mtu);
  329. props->active_mtu = tmp ? min(props->max_mtu, tmp) : IB_MTU_256;
  330. props->state = (netif_running(ndev) && netif_carrier_ok(ndev)) ?
  331. IB_PORT_ACTIVE : IB_PORT_DOWN;
  332. props->phys_state = state_to_phys_state(props->state);
  333. out_unlock:
  334. spin_unlock_bh(&iboe->lock);
  335. out:
  336. mlx4_free_cmd_mailbox(mdev->dev, mailbox);
  337. return err;
  338. }
  339. int __mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
  340. struct ib_port_attr *props, int netw_view)
  341. {
  342. int err;
  343. memset(props, 0, sizeof *props);
  344. err = mlx4_ib_port_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND ?
  345. ib_link_query_port(ibdev, port, props, netw_view) :
  346. eth_link_query_port(ibdev, port, props, netw_view);
  347. return err;
  348. }
  349. static int mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
  350. struct ib_port_attr *props)
  351. {
  352. /* returns host view */
  353. return __mlx4_ib_query_port(ibdev, port, props, 0);
  354. }
  355. int __mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
  356. union ib_gid *gid, int netw_view)
  357. {
  358. struct ib_smp *in_mad = NULL;
  359. struct ib_smp *out_mad = NULL;
  360. int err = -ENOMEM;
  361. struct mlx4_ib_dev *dev = to_mdev(ibdev);
  362. int clear = 0;
  363. int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
  364. in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
  365. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  366. if (!in_mad || !out_mad)
  367. goto out;
  368. init_query_mad(in_mad);
  369. in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
  370. in_mad->attr_mod = cpu_to_be32(port);
  371. if (mlx4_is_mfunc(dev->dev) && netw_view)
  372. mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
  373. err = mlx4_MAD_IFC(dev, mad_ifc_flags, port, NULL, NULL, in_mad, out_mad);
  374. if (err)
  375. goto out;
  376. memcpy(gid->raw, out_mad->data + 8, 8);
  377. if (mlx4_is_mfunc(dev->dev) && !netw_view) {
  378. if (index) {
  379. /* For any index > 0, return the null guid */
  380. err = 0;
  381. clear = 1;
  382. goto out;
  383. }
  384. }
  385. init_query_mad(in_mad);
  386. in_mad->attr_id = IB_SMP_ATTR_GUID_INFO;
  387. in_mad->attr_mod = cpu_to_be32(index / 8);
  388. err = mlx4_MAD_IFC(dev, mad_ifc_flags, port,
  389. NULL, NULL, in_mad, out_mad);
  390. if (err)
  391. goto out;
  392. memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8);
  393. out:
  394. if (clear)
  395. memset(gid->raw + 8, 0, 8);
  396. kfree(in_mad);
  397. kfree(out_mad);
  398. return err;
  399. }
  400. static int iboe_query_gid(struct ib_device *ibdev, u8 port, int index,
  401. union ib_gid *gid)
  402. {
  403. struct mlx4_ib_dev *dev = to_mdev(ibdev);
  404. *gid = dev->iboe.gid_table[port - 1][index];
  405. return 0;
  406. }
  407. static int mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
  408. union ib_gid *gid)
  409. {
  410. if (rdma_port_get_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND)
  411. return __mlx4_ib_query_gid(ibdev, port, index, gid, 0);
  412. else
  413. return iboe_query_gid(ibdev, port, index, gid);
  414. }
  415. int __mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index,
  416. u16 *pkey, int netw_view)
  417. {
  418. struct ib_smp *in_mad = NULL;
  419. struct ib_smp *out_mad = NULL;
  420. int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
  421. int err = -ENOMEM;
  422. in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
  423. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  424. if (!in_mad || !out_mad)
  425. goto out;
  426. init_query_mad(in_mad);
  427. in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE;
  428. in_mad->attr_mod = cpu_to_be32(index / 32);
  429. if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view)
  430. mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
  431. err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
  432. in_mad, out_mad);
  433. if (err)
  434. goto out;
  435. *pkey = be16_to_cpu(((__be16 *) out_mad->data)[index % 32]);
  436. out:
  437. kfree(in_mad);
  438. kfree(out_mad);
  439. return err;
  440. }
  441. static int mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index, u16 *pkey)
  442. {
  443. return __mlx4_ib_query_pkey(ibdev, port, index, pkey, 0);
  444. }
  445. static int mlx4_ib_modify_device(struct ib_device *ibdev, int mask,
  446. struct ib_device_modify *props)
  447. {
  448. struct mlx4_cmd_mailbox *mailbox;
  449. unsigned long flags;
  450. if (mask & ~IB_DEVICE_MODIFY_NODE_DESC)
  451. return -EOPNOTSUPP;
  452. if (!(mask & IB_DEVICE_MODIFY_NODE_DESC))
  453. return 0;
  454. if (mlx4_is_slave(to_mdev(ibdev)->dev))
  455. return -EOPNOTSUPP;
  456. spin_lock_irqsave(&to_mdev(ibdev)->sm_lock, flags);
  457. memcpy(ibdev->node_desc, props->node_desc, 64);
  458. spin_unlock_irqrestore(&to_mdev(ibdev)->sm_lock, flags);
  459. /*
  460. * If possible, pass node desc to FW, so it can generate
  461. * a 144 trap. If cmd fails, just ignore.
  462. */
  463. mailbox = mlx4_alloc_cmd_mailbox(to_mdev(ibdev)->dev);
  464. if (IS_ERR(mailbox))
  465. return 0;
  466. memcpy(mailbox->buf, props->node_desc, 64);
  467. mlx4_cmd(to_mdev(ibdev)->dev, mailbox->dma, 1, 0,
  468. MLX4_CMD_SET_NODE, MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE);
  469. mlx4_free_cmd_mailbox(to_mdev(ibdev)->dev, mailbox);
  470. return 0;
  471. }
  472. static int mlx4_ib_SET_PORT(struct mlx4_ib_dev *dev, u8 port, int reset_qkey_viols,
  473. u32 cap_mask)
  474. {
  475. struct mlx4_cmd_mailbox *mailbox;
  476. int err;
  477. mailbox = mlx4_alloc_cmd_mailbox(dev->dev);
  478. if (IS_ERR(mailbox))
  479. return PTR_ERR(mailbox);
  480. if (dev->dev->flags & MLX4_FLAG_OLD_PORT_CMDS) {
  481. *(u8 *) mailbox->buf = !!reset_qkey_viols << 6;
  482. ((__be32 *) mailbox->buf)[2] = cpu_to_be32(cap_mask);
  483. } else {
  484. ((u8 *) mailbox->buf)[3] = !!reset_qkey_viols;
  485. ((__be32 *) mailbox->buf)[1] = cpu_to_be32(cap_mask);
  486. }
  487. err = mlx4_cmd(dev->dev, mailbox->dma, port, 0, MLX4_CMD_SET_PORT,
  488. MLX4_CMD_TIME_CLASS_B, MLX4_CMD_WRAPPED);
  489. mlx4_free_cmd_mailbox(dev->dev, mailbox);
  490. return err;
  491. }
  492. static int mlx4_ib_modify_port(struct ib_device *ibdev, u8 port, int mask,
  493. struct ib_port_modify *props)
  494. {
  495. struct mlx4_ib_dev *mdev = to_mdev(ibdev);
  496. u8 is_eth = mdev->dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH;
  497. struct ib_port_attr attr;
  498. u32 cap_mask;
  499. int err;
  500. /* return OK if this is RoCE. CM calls ib_modify_port() regardless
  501. * of whether port link layer is ETH or IB. For ETH ports, qkey
  502. * violations and port capabilities are not meaningful.
  503. */
  504. if (is_eth)
  505. return 0;
  506. mutex_lock(&mdev->cap_mask_mutex);
  507. err = mlx4_ib_query_port(ibdev, port, &attr);
  508. if (err)
  509. goto out;
  510. cap_mask = (attr.port_cap_flags | props->set_port_cap_mask) &
  511. ~props->clr_port_cap_mask;
  512. err = mlx4_ib_SET_PORT(mdev, port,
  513. !!(mask & IB_PORT_RESET_QKEY_CNTR),
  514. cap_mask);
  515. out:
  516. mutex_unlock(&to_mdev(ibdev)->cap_mask_mutex);
  517. return err;
  518. }
  519. static struct ib_ucontext *mlx4_ib_alloc_ucontext(struct ib_device *ibdev,
  520. struct ib_udata *udata)
  521. {
  522. struct mlx4_ib_dev *dev = to_mdev(ibdev);
  523. struct mlx4_ib_ucontext *context;
  524. struct mlx4_ib_alloc_ucontext_resp_v3 resp_v3;
  525. struct mlx4_ib_alloc_ucontext_resp resp;
  526. int err;
  527. if (!dev->ib_active)
  528. return ERR_PTR(-EAGAIN);
  529. if (ibdev->uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION) {
  530. resp_v3.qp_tab_size = dev->dev->caps.num_qps;
  531. resp_v3.bf_reg_size = dev->dev->caps.bf_reg_size;
  532. resp_v3.bf_regs_per_page = dev->dev->caps.bf_regs_per_page;
  533. } else {
  534. resp.dev_caps = dev->dev->caps.userspace_caps;
  535. resp.qp_tab_size = dev->dev->caps.num_qps;
  536. resp.bf_reg_size = dev->dev->caps.bf_reg_size;
  537. resp.bf_regs_per_page = dev->dev->caps.bf_regs_per_page;
  538. resp.cqe_size = dev->dev->caps.cqe_size;
  539. }
  540. context = kmalloc(sizeof *context, GFP_KERNEL);
  541. if (!context)
  542. return ERR_PTR(-ENOMEM);
  543. err = mlx4_uar_alloc(to_mdev(ibdev)->dev, &context->uar);
  544. if (err) {
  545. kfree(context);
  546. return ERR_PTR(err);
  547. }
  548. INIT_LIST_HEAD(&context->db_page_list);
  549. mutex_init(&context->db_page_mutex);
  550. if (ibdev->uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION)
  551. err = ib_copy_to_udata(udata, &resp_v3, sizeof(resp_v3));
  552. else
  553. err = ib_copy_to_udata(udata, &resp, sizeof(resp));
  554. if (err) {
  555. mlx4_uar_free(to_mdev(ibdev)->dev, &context->uar);
  556. kfree(context);
  557. return ERR_PTR(-EFAULT);
  558. }
  559. return &context->ibucontext;
  560. }
  561. static int mlx4_ib_dealloc_ucontext(struct ib_ucontext *ibcontext)
  562. {
  563. struct mlx4_ib_ucontext *context = to_mucontext(ibcontext);
  564. mlx4_uar_free(to_mdev(ibcontext->device)->dev, &context->uar);
  565. kfree(context);
  566. return 0;
  567. }
  568. static int mlx4_ib_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
  569. {
  570. struct mlx4_ib_dev *dev = to_mdev(context->device);
  571. if (vma->vm_end - vma->vm_start != PAGE_SIZE)
  572. return -EINVAL;
  573. if (vma->vm_pgoff == 0) {
  574. vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
  575. if (io_remap_pfn_range(vma, vma->vm_start,
  576. to_mucontext(context)->uar.pfn,
  577. PAGE_SIZE, vma->vm_page_prot))
  578. return -EAGAIN;
  579. } else if (vma->vm_pgoff == 1 && dev->dev->caps.bf_reg_size != 0) {
  580. vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
  581. if (io_remap_pfn_range(vma, vma->vm_start,
  582. to_mucontext(context)->uar.pfn +
  583. dev->dev->caps.num_uars,
  584. PAGE_SIZE, vma->vm_page_prot))
  585. return -EAGAIN;
  586. } else
  587. return -EINVAL;
  588. return 0;
  589. }
  590. static struct ib_pd *mlx4_ib_alloc_pd(struct ib_device *ibdev,
  591. struct ib_ucontext *context,
  592. struct ib_udata *udata)
  593. {
  594. struct mlx4_ib_pd *pd;
  595. int err;
  596. pd = kmalloc(sizeof *pd, GFP_KERNEL);
  597. if (!pd)
  598. return ERR_PTR(-ENOMEM);
  599. err = mlx4_pd_alloc(to_mdev(ibdev)->dev, &pd->pdn);
  600. if (err) {
  601. kfree(pd);
  602. return ERR_PTR(err);
  603. }
  604. if (context)
  605. if (ib_copy_to_udata(udata, &pd->pdn, sizeof (__u32))) {
  606. mlx4_pd_free(to_mdev(ibdev)->dev, pd->pdn);
  607. kfree(pd);
  608. return ERR_PTR(-EFAULT);
  609. }
  610. return &pd->ibpd;
  611. }
  612. static int mlx4_ib_dealloc_pd(struct ib_pd *pd)
  613. {
  614. mlx4_pd_free(to_mdev(pd->device)->dev, to_mpd(pd)->pdn);
  615. kfree(pd);
  616. return 0;
  617. }
  618. static struct ib_xrcd *mlx4_ib_alloc_xrcd(struct ib_device *ibdev,
  619. struct ib_ucontext *context,
  620. struct ib_udata *udata)
  621. {
  622. struct mlx4_ib_xrcd *xrcd;
  623. int err;
  624. if (!(to_mdev(ibdev)->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC))
  625. return ERR_PTR(-ENOSYS);
  626. xrcd = kmalloc(sizeof *xrcd, GFP_KERNEL);
  627. if (!xrcd)
  628. return ERR_PTR(-ENOMEM);
  629. err = mlx4_xrcd_alloc(to_mdev(ibdev)->dev, &xrcd->xrcdn);
  630. if (err)
  631. goto err1;
  632. xrcd->pd = ib_alloc_pd(ibdev);
  633. if (IS_ERR(xrcd->pd)) {
  634. err = PTR_ERR(xrcd->pd);
  635. goto err2;
  636. }
  637. xrcd->cq = ib_create_cq(ibdev, NULL, NULL, xrcd, 1, 0);
  638. if (IS_ERR(xrcd->cq)) {
  639. err = PTR_ERR(xrcd->cq);
  640. goto err3;
  641. }
  642. return &xrcd->ibxrcd;
  643. err3:
  644. ib_dealloc_pd(xrcd->pd);
  645. err2:
  646. mlx4_xrcd_free(to_mdev(ibdev)->dev, xrcd->xrcdn);
  647. err1:
  648. kfree(xrcd);
  649. return ERR_PTR(err);
  650. }
  651. static int mlx4_ib_dealloc_xrcd(struct ib_xrcd *xrcd)
  652. {
  653. ib_destroy_cq(to_mxrcd(xrcd)->cq);
  654. ib_dealloc_pd(to_mxrcd(xrcd)->pd);
  655. mlx4_xrcd_free(to_mdev(xrcd->device)->dev, to_mxrcd(xrcd)->xrcdn);
  656. kfree(xrcd);
  657. return 0;
  658. }
  659. static int add_gid_entry(struct ib_qp *ibqp, union ib_gid *gid)
  660. {
  661. struct mlx4_ib_qp *mqp = to_mqp(ibqp);
  662. struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
  663. struct mlx4_ib_gid_entry *ge;
  664. ge = kzalloc(sizeof *ge, GFP_KERNEL);
  665. if (!ge)
  666. return -ENOMEM;
  667. ge->gid = *gid;
  668. if (mlx4_ib_add_mc(mdev, mqp, gid)) {
  669. ge->port = mqp->port;
  670. ge->added = 1;
  671. }
  672. mutex_lock(&mqp->mutex);
  673. list_add_tail(&ge->list, &mqp->gid_list);
  674. mutex_unlock(&mqp->mutex);
  675. return 0;
  676. }
  677. int mlx4_ib_add_mc(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
  678. union ib_gid *gid)
  679. {
  680. struct net_device *ndev;
  681. int ret = 0;
  682. if (!mqp->port)
  683. return 0;
  684. spin_lock_bh(&mdev->iboe.lock);
  685. ndev = mdev->iboe.netdevs[mqp->port - 1];
  686. if (ndev)
  687. dev_hold(ndev);
  688. spin_unlock_bh(&mdev->iboe.lock);
  689. if (ndev) {
  690. ret = 1;
  691. dev_put(ndev);
  692. }
  693. return ret;
  694. }
  695. struct mlx4_ib_steering {
  696. struct list_head list;
  697. u64 reg_id;
  698. union ib_gid gid;
  699. };
  700. static int parse_flow_attr(struct mlx4_dev *dev,
  701. u32 qp_num,
  702. union ib_flow_spec *ib_spec,
  703. struct _rule_hw *mlx4_spec)
  704. {
  705. enum mlx4_net_trans_rule_id type;
  706. switch (ib_spec->type) {
  707. case IB_FLOW_SPEC_ETH:
  708. type = MLX4_NET_TRANS_RULE_ID_ETH;
  709. memcpy(mlx4_spec->eth.dst_mac, ib_spec->eth.val.dst_mac,
  710. ETH_ALEN);
  711. memcpy(mlx4_spec->eth.dst_mac_msk, ib_spec->eth.mask.dst_mac,
  712. ETH_ALEN);
  713. mlx4_spec->eth.vlan_tag = ib_spec->eth.val.vlan_tag;
  714. mlx4_spec->eth.vlan_tag_msk = ib_spec->eth.mask.vlan_tag;
  715. break;
  716. case IB_FLOW_SPEC_IB:
  717. type = MLX4_NET_TRANS_RULE_ID_IB;
  718. mlx4_spec->ib.l3_qpn =
  719. cpu_to_be32(qp_num);
  720. mlx4_spec->ib.qpn_mask =
  721. cpu_to_be32(MLX4_IB_FLOW_QPN_MASK);
  722. break;
  723. case IB_FLOW_SPEC_IPV4:
  724. type = MLX4_NET_TRANS_RULE_ID_IPV4;
  725. mlx4_spec->ipv4.src_ip = ib_spec->ipv4.val.src_ip;
  726. mlx4_spec->ipv4.src_ip_msk = ib_spec->ipv4.mask.src_ip;
  727. mlx4_spec->ipv4.dst_ip = ib_spec->ipv4.val.dst_ip;
  728. mlx4_spec->ipv4.dst_ip_msk = ib_spec->ipv4.mask.dst_ip;
  729. break;
  730. case IB_FLOW_SPEC_TCP:
  731. case IB_FLOW_SPEC_UDP:
  732. type = ib_spec->type == IB_FLOW_SPEC_TCP ?
  733. MLX4_NET_TRANS_RULE_ID_TCP :
  734. MLX4_NET_TRANS_RULE_ID_UDP;
  735. mlx4_spec->tcp_udp.dst_port = ib_spec->tcp_udp.val.dst_port;
  736. mlx4_spec->tcp_udp.dst_port_msk = ib_spec->tcp_udp.mask.dst_port;
  737. mlx4_spec->tcp_udp.src_port = ib_spec->tcp_udp.val.src_port;
  738. mlx4_spec->tcp_udp.src_port_msk = ib_spec->tcp_udp.mask.src_port;
  739. break;
  740. default:
  741. return -EINVAL;
  742. }
  743. if (mlx4_map_sw_to_hw_steering_id(dev, type) < 0 ||
  744. mlx4_hw_rule_sz(dev, type) < 0)
  745. return -EINVAL;
  746. mlx4_spec->id = cpu_to_be16(mlx4_map_sw_to_hw_steering_id(dev, type));
  747. mlx4_spec->size = mlx4_hw_rule_sz(dev, type) >> 2;
  748. return mlx4_hw_rule_sz(dev, type);
  749. }
  750. struct default_rules {
  751. __u32 mandatory_fields[IB_FLOW_SPEC_SUPPORT_LAYERS];
  752. __u32 mandatory_not_fields[IB_FLOW_SPEC_SUPPORT_LAYERS];
  753. __u32 rules_create_list[IB_FLOW_SPEC_SUPPORT_LAYERS];
  754. __u8 link_layer;
  755. };
  756. static const struct default_rules default_table[] = {
  757. {
  758. .mandatory_fields = {IB_FLOW_SPEC_IPV4},
  759. .mandatory_not_fields = {IB_FLOW_SPEC_ETH},
  760. .rules_create_list = {IB_FLOW_SPEC_IB},
  761. .link_layer = IB_LINK_LAYER_INFINIBAND
  762. }
  763. };
  764. static int __mlx4_ib_default_rules_match(struct ib_qp *qp,
  765. struct ib_flow_attr *flow_attr)
  766. {
  767. int i, j, k;
  768. void *ib_flow;
  769. const struct default_rules *pdefault_rules = default_table;
  770. u8 link_layer = rdma_port_get_link_layer(qp->device, flow_attr->port);
  771. for (i = 0; i < ARRAY_SIZE(default_table); i++, pdefault_rules++) {
  772. __u32 field_types[IB_FLOW_SPEC_SUPPORT_LAYERS];
  773. memset(&field_types, 0, sizeof(field_types));
  774. if (link_layer != pdefault_rules->link_layer)
  775. continue;
  776. ib_flow = flow_attr + 1;
  777. /* we assume the specs are sorted */
  778. for (j = 0, k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS &&
  779. j < flow_attr->num_of_specs; k++) {
  780. union ib_flow_spec *current_flow =
  781. (union ib_flow_spec *)ib_flow;
  782. /* same layer but different type */
  783. if (((current_flow->type & IB_FLOW_SPEC_LAYER_MASK) ==
  784. (pdefault_rules->mandatory_fields[k] &
  785. IB_FLOW_SPEC_LAYER_MASK)) &&
  786. (current_flow->type !=
  787. pdefault_rules->mandatory_fields[k]))
  788. goto out;
  789. /* same layer, try match next one */
  790. if (current_flow->type ==
  791. pdefault_rules->mandatory_fields[k]) {
  792. j++;
  793. ib_flow +=
  794. ((union ib_flow_spec *)ib_flow)->size;
  795. }
  796. }
  797. ib_flow = flow_attr + 1;
  798. for (j = 0; j < flow_attr->num_of_specs;
  799. j++, ib_flow += ((union ib_flow_spec *)ib_flow)->size)
  800. for (k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS; k++)
  801. /* same layer and same type */
  802. if (((union ib_flow_spec *)ib_flow)->type ==
  803. pdefault_rules->mandatory_not_fields[k])
  804. goto out;
  805. return i;
  806. }
  807. out:
  808. return -1;
  809. }
  810. static int __mlx4_ib_create_default_rules(
  811. struct mlx4_ib_dev *mdev,
  812. struct ib_qp *qp,
  813. const struct default_rules *pdefault_rules,
  814. struct _rule_hw *mlx4_spec) {
  815. int size = 0;
  816. int i;
  817. for (i = 0; i < ARRAY_SIZE(pdefault_rules->rules_create_list); i++) {
  818. int ret;
  819. union ib_flow_spec ib_spec;
  820. switch (pdefault_rules->rules_create_list[i]) {
  821. case 0:
  822. /* no rule */
  823. continue;
  824. case IB_FLOW_SPEC_IB:
  825. ib_spec.type = IB_FLOW_SPEC_IB;
  826. ib_spec.size = sizeof(struct ib_flow_spec_ib);
  827. break;
  828. default:
  829. /* invalid rule */
  830. return -EINVAL;
  831. }
  832. /* We must put empty rule, qpn is being ignored */
  833. ret = parse_flow_attr(mdev->dev, 0, &ib_spec,
  834. mlx4_spec);
  835. if (ret < 0) {
  836. pr_info("invalid parsing\n");
  837. return -EINVAL;
  838. }
  839. mlx4_spec = (void *)mlx4_spec + ret;
  840. size += ret;
  841. }
  842. return size;
  843. }
  844. static int __mlx4_ib_create_flow(struct ib_qp *qp, struct ib_flow_attr *flow_attr,
  845. int domain,
  846. enum mlx4_net_trans_promisc_mode flow_type,
  847. u64 *reg_id)
  848. {
  849. int ret, i;
  850. int size = 0;
  851. void *ib_flow;
  852. struct mlx4_ib_dev *mdev = to_mdev(qp->device);
  853. struct mlx4_cmd_mailbox *mailbox;
  854. struct mlx4_net_trans_rule_hw_ctrl *ctrl;
  855. int default_flow;
  856. static const u16 __mlx4_domain[] = {
  857. [IB_FLOW_DOMAIN_USER] = MLX4_DOMAIN_UVERBS,
  858. [IB_FLOW_DOMAIN_ETHTOOL] = MLX4_DOMAIN_ETHTOOL,
  859. [IB_FLOW_DOMAIN_RFS] = MLX4_DOMAIN_RFS,
  860. [IB_FLOW_DOMAIN_NIC] = MLX4_DOMAIN_NIC,
  861. };
  862. if (flow_attr->priority > MLX4_IB_FLOW_MAX_PRIO) {
  863. pr_err("Invalid priority value %d\n", flow_attr->priority);
  864. return -EINVAL;
  865. }
  866. if (domain >= IB_FLOW_DOMAIN_NUM) {
  867. pr_err("Invalid domain value %d\n", domain);
  868. return -EINVAL;
  869. }
  870. if (mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type) < 0)
  871. return -EINVAL;
  872. mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
  873. if (IS_ERR(mailbox))
  874. return PTR_ERR(mailbox);
  875. ctrl = mailbox->buf;
  876. ctrl->prio = cpu_to_be16(__mlx4_domain[domain] |
  877. flow_attr->priority);
  878. ctrl->type = mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type);
  879. ctrl->port = flow_attr->port;
  880. ctrl->qpn = cpu_to_be32(qp->qp_num);
  881. ib_flow = flow_attr + 1;
  882. size += sizeof(struct mlx4_net_trans_rule_hw_ctrl);
  883. /* Add default flows */
  884. default_flow = __mlx4_ib_default_rules_match(qp, flow_attr);
  885. if (default_flow >= 0) {
  886. ret = __mlx4_ib_create_default_rules(
  887. mdev, qp, default_table + default_flow,
  888. mailbox->buf + size);
  889. if (ret < 0) {
  890. mlx4_free_cmd_mailbox(mdev->dev, mailbox);
  891. return -EINVAL;
  892. }
  893. size += ret;
  894. }
  895. for (i = 0; i < flow_attr->num_of_specs; i++) {
  896. ret = parse_flow_attr(mdev->dev, qp->qp_num, ib_flow,
  897. mailbox->buf + size);
  898. if (ret < 0) {
  899. mlx4_free_cmd_mailbox(mdev->dev, mailbox);
  900. return -EINVAL;
  901. }
  902. ib_flow += ((union ib_flow_spec *) ib_flow)->size;
  903. size += ret;
  904. }
  905. ret = mlx4_cmd_imm(mdev->dev, mailbox->dma, reg_id, size >> 2, 0,
  906. MLX4_QP_FLOW_STEERING_ATTACH, MLX4_CMD_TIME_CLASS_A,
  907. MLX4_CMD_NATIVE);
  908. if (ret == -ENOMEM)
  909. pr_err("mcg table is full. Fail to register network rule.\n");
  910. else if (ret == -ENXIO)
  911. pr_err("Device managed flow steering is disabled. Fail to register network rule.\n");
  912. else if (ret)
  913. pr_err("Invalid argumant. Fail to register network rule.\n");
  914. mlx4_free_cmd_mailbox(mdev->dev, mailbox);
  915. return ret;
  916. }
  917. static int __mlx4_ib_destroy_flow(struct mlx4_dev *dev, u64 reg_id)
  918. {
  919. int err;
  920. err = mlx4_cmd(dev, reg_id, 0, 0,
  921. MLX4_QP_FLOW_STEERING_DETACH, MLX4_CMD_TIME_CLASS_A,
  922. MLX4_CMD_NATIVE);
  923. if (err)
  924. pr_err("Fail to detach network rule. registration id = 0x%llx\n",
  925. reg_id);
  926. return err;
  927. }
  928. static int mlx4_ib_tunnel_steer_add(struct ib_qp *qp, struct ib_flow_attr *flow_attr,
  929. u64 *reg_id)
  930. {
  931. void *ib_flow;
  932. union ib_flow_spec *ib_spec;
  933. struct mlx4_dev *dev = to_mdev(qp->device)->dev;
  934. int err = 0;
  935. if (dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN)
  936. return 0; /* do nothing */
  937. ib_flow = flow_attr + 1;
  938. ib_spec = (union ib_flow_spec *)ib_flow;
  939. if (ib_spec->type != IB_FLOW_SPEC_ETH || flow_attr->num_of_specs != 1)
  940. return 0; /* do nothing */
  941. err = mlx4_tunnel_steer_add(to_mdev(qp->device)->dev, ib_spec->eth.val.dst_mac,
  942. flow_attr->port, qp->qp_num,
  943. MLX4_DOMAIN_UVERBS | (flow_attr->priority & 0xff),
  944. reg_id);
  945. return err;
  946. }
  947. static struct ib_flow *mlx4_ib_create_flow(struct ib_qp *qp,
  948. struct ib_flow_attr *flow_attr,
  949. int domain)
  950. {
  951. int err = 0, i = 0;
  952. struct mlx4_ib_flow *mflow;
  953. enum mlx4_net_trans_promisc_mode type[2];
  954. memset(type, 0, sizeof(type));
  955. mflow = kzalloc(sizeof(*mflow), GFP_KERNEL);
  956. if (!mflow) {
  957. err = -ENOMEM;
  958. goto err_free;
  959. }
  960. switch (flow_attr->type) {
  961. case IB_FLOW_ATTR_NORMAL:
  962. type[0] = MLX4_FS_REGULAR;
  963. break;
  964. case IB_FLOW_ATTR_ALL_DEFAULT:
  965. type[0] = MLX4_FS_ALL_DEFAULT;
  966. break;
  967. case IB_FLOW_ATTR_MC_DEFAULT:
  968. type[0] = MLX4_FS_MC_DEFAULT;
  969. break;
  970. case IB_FLOW_ATTR_SNIFFER:
  971. type[0] = MLX4_FS_UC_SNIFFER;
  972. type[1] = MLX4_FS_MC_SNIFFER;
  973. break;
  974. default:
  975. err = -EINVAL;
  976. goto err_free;
  977. }
  978. while (i < ARRAY_SIZE(type) && type[i]) {
  979. err = __mlx4_ib_create_flow(qp, flow_attr, domain, type[i],
  980. &mflow->reg_id[i]);
  981. if (err)
  982. goto err_create_flow;
  983. i++;
  984. }
  985. if (i < ARRAY_SIZE(type) && flow_attr->type == IB_FLOW_ATTR_NORMAL) {
  986. err = mlx4_ib_tunnel_steer_add(qp, flow_attr, &mflow->reg_id[i]);
  987. if (err)
  988. goto err_create_flow;
  989. i++;
  990. }
  991. return &mflow->ibflow;
  992. err_create_flow:
  993. while (i) {
  994. (void)__mlx4_ib_destroy_flow(to_mdev(qp->device)->dev, mflow->reg_id[i]);
  995. i--;
  996. }
  997. err_free:
  998. kfree(mflow);
  999. return ERR_PTR(err);
  1000. }
  1001. static int mlx4_ib_destroy_flow(struct ib_flow *flow_id)
  1002. {
  1003. int err, ret = 0;
  1004. int i = 0;
  1005. struct mlx4_ib_dev *mdev = to_mdev(flow_id->qp->device);
  1006. struct mlx4_ib_flow *mflow = to_mflow(flow_id);
  1007. while (i < ARRAY_SIZE(mflow->reg_id) && mflow->reg_id[i]) {
  1008. err = __mlx4_ib_destroy_flow(mdev->dev, mflow->reg_id[i]);
  1009. if (err)
  1010. ret = err;
  1011. i++;
  1012. }
  1013. kfree(mflow);
  1014. return ret;
  1015. }
  1016. static int mlx4_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
  1017. {
  1018. int err;
  1019. struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
  1020. struct mlx4_ib_qp *mqp = to_mqp(ibqp);
  1021. u64 reg_id;
  1022. struct mlx4_ib_steering *ib_steering = NULL;
  1023. enum mlx4_protocol prot = (gid->raw[1] == 0x0e) ?
  1024. MLX4_PROT_IB_IPV4 : MLX4_PROT_IB_IPV6;
  1025. if (mdev->dev->caps.steering_mode ==
  1026. MLX4_STEERING_MODE_DEVICE_MANAGED) {
  1027. ib_steering = kmalloc(sizeof(*ib_steering), GFP_KERNEL);
  1028. if (!ib_steering)
  1029. return -ENOMEM;
  1030. }
  1031. err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw, mqp->port,
  1032. !!(mqp->flags &
  1033. MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK),
  1034. prot, &reg_id);
  1035. if (err)
  1036. goto err_malloc;
  1037. err = add_gid_entry(ibqp, gid);
  1038. if (err)
  1039. goto err_add;
  1040. if (ib_steering) {
  1041. memcpy(ib_steering->gid.raw, gid->raw, 16);
  1042. ib_steering->reg_id = reg_id;
  1043. mutex_lock(&mqp->mutex);
  1044. list_add(&ib_steering->list, &mqp->steering_rules);
  1045. mutex_unlock(&mqp->mutex);
  1046. }
  1047. return 0;
  1048. err_add:
  1049. mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
  1050. prot, reg_id);
  1051. err_malloc:
  1052. kfree(ib_steering);
  1053. return err;
  1054. }
  1055. static struct mlx4_ib_gid_entry *find_gid_entry(struct mlx4_ib_qp *qp, u8 *raw)
  1056. {
  1057. struct mlx4_ib_gid_entry *ge;
  1058. struct mlx4_ib_gid_entry *tmp;
  1059. struct mlx4_ib_gid_entry *ret = NULL;
  1060. list_for_each_entry_safe(ge, tmp, &qp->gid_list, list) {
  1061. if (!memcmp(raw, ge->gid.raw, 16)) {
  1062. ret = ge;
  1063. break;
  1064. }
  1065. }
  1066. return ret;
  1067. }
  1068. static int mlx4_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
  1069. {
  1070. int err;
  1071. struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
  1072. struct mlx4_ib_qp *mqp = to_mqp(ibqp);
  1073. struct net_device *ndev;
  1074. struct mlx4_ib_gid_entry *ge;
  1075. u64 reg_id = 0;
  1076. enum mlx4_protocol prot = (gid->raw[1] == 0x0e) ?
  1077. MLX4_PROT_IB_IPV4 : MLX4_PROT_IB_IPV6;
  1078. if (mdev->dev->caps.steering_mode ==
  1079. MLX4_STEERING_MODE_DEVICE_MANAGED) {
  1080. struct mlx4_ib_steering *ib_steering;
  1081. mutex_lock(&mqp->mutex);
  1082. list_for_each_entry(ib_steering, &mqp->steering_rules, list) {
  1083. if (!memcmp(ib_steering->gid.raw, gid->raw, 16)) {
  1084. list_del(&ib_steering->list);
  1085. break;
  1086. }
  1087. }
  1088. mutex_unlock(&mqp->mutex);
  1089. if (&ib_steering->list == &mqp->steering_rules) {
  1090. pr_err("Couldn't find reg_id for mgid. Steering rule is left attached\n");
  1091. return -EINVAL;
  1092. }
  1093. reg_id = ib_steering->reg_id;
  1094. kfree(ib_steering);
  1095. }
  1096. err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
  1097. prot, reg_id);
  1098. if (err)
  1099. return err;
  1100. mutex_lock(&mqp->mutex);
  1101. ge = find_gid_entry(mqp, gid->raw);
  1102. if (ge) {
  1103. spin_lock_bh(&mdev->iboe.lock);
  1104. ndev = ge->added ? mdev->iboe.netdevs[ge->port - 1] : NULL;
  1105. if (ndev)
  1106. dev_hold(ndev);
  1107. spin_unlock_bh(&mdev->iboe.lock);
  1108. if (ndev)
  1109. dev_put(ndev);
  1110. list_del(&ge->list);
  1111. kfree(ge);
  1112. } else
  1113. pr_warn("could not find mgid entry\n");
  1114. mutex_unlock(&mqp->mutex);
  1115. return 0;
  1116. }
  1117. static int init_node_data(struct mlx4_ib_dev *dev)
  1118. {
  1119. struct ib_smp *in_mad = NULL;
  1120. struct ib_smp *out_mad = NULL;
  1121. int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
  1122. int err = -ENOMEM;
  1123. in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
  1124. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  1125. if (!in_mad || !out_mad)
  1126. goto out;
  1127. init_query_mad(in_mad);
  1128. in_mad->attr_id = IB_SMP_ATTR_NODE_DESC;
  1129. if (mlx4_is_master(dev->dev))
  1130. mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
  1131. err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad);
  1132. if (err)
  1133. goto out;
  1134. memcpy(dev->ib_dev.node_desc, out_mad->data, 64);
  1135. in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
  1136. err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad);
  1137. if (err)
  1138. goto out;
  1139. dev->dev->rev_id = be32_to_cpup((__be32 *) (out_mad->data + 32));
  1140. memcpy(&dev->ib_dev.node_guid, out_mad->data + 12, 8);
  1141. out:
  1142. kfree(in_mad);
  1143. kfree(out_mad);
  1144. return err;
  1145. }
  1146. static ssize_t show_hca(struct device *device, struct device_attribute *attr,
  1147. char *buf)
  1148. {
  1149. struct mlx4_ib_dev *dev =
  1150. container_of(device, struct mlx4_ib_dev, ib_dev.dev);
  1151. return sprintf(buf, "MT%d\n", dev->dev->pdev->device);
  1152. }
  1153. static ssize_t show_fw_ver(struct device *device, struct device_attribute *attr,
  1154. char *buf)
  1155. {
  1156. struct mlx4_ib_dev *dev =
  1157. container_of(device, struct mlx4_ib_dev, ib_dev.dev);
  1158. return sprintf(buf, "%d.%d.%d\n", (int) (dev->dev->caps.fw_ver >> 32),
  1159. (int) (dev->dev->caps.fw_ver >> 16) & 0xffff,
  1160. (int) dev->dev->caps.fw_ver & 0xffff);
  1161. }
  1162. static ssize_t show_rev(struct device *device, struct device_attribute *attr,
  1163. char *buf)
  1164. {
  1165. struct mlx4_ib_dev *dev =
  1166. container_of(device, struct mlx4_ib_dev, ib_dev.dev);
  1167. return sprintf(buf, "%x\n", dev->dev->rev_id);
  1168. }
  1169. static ssize_t show_board(struct device *device, struct device_attribute *attr,
  1170. char *buf)
  1171. {
  1172. struct mlx4_ib_dev *dev =
  1173. container_of(device, struct mlx4_ib_dev, ib_dev.dev);
  1174. return sprintf(buf, "%.*s\n", MLX4_BOARD_ID_LEN,
  1175. dev->dev->board_id);
  1176. }
  1177. static DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
  1178. static DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL);
  1179. static DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
  1180. static DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL);
  1181. static struct device_attribute *mlx4_class_attributes[] = {
  1182. &dev_attr_hw_rev,
  1183. &dev_attr_fw_ver,
  1184. &dev_attr_hca_type,
  1185. &dev_attr_board_id
  1186. };
  1187. static void mlx4_addrconf_ifid_eui48(u8 *eui, u16 vlan_id,
  1188. struct net_device *dev)
  1189. {
  1190. memcpy(eui, dev->dev_addr, 3);
  1191. memcpy(eui + 5, dev->dev_addr + 3, 3);
  1192. if (vlan_id < 0x1000) {
  1193. eui[3] = vlan_id >> 8;
  1194. eui[4] = vlan_id & 0xff;
  1195. } else {
  1196. eui[3] = 0xff;
  1197. eui[4] = 0xfe;
  1198. }
  1199. eui[0] ^= 2;
  1200. }
  1201. static void update_gids_task(struct work_struct *work)
  1202. {
  1203. struct update_gid_work *gw = container_of(work, struct update_gid_work, work);
  1204. struct mlx4_cmd_mailbox *mailbox;
  1205. union ib_gid *gids;
  1206. int err;
  1207. struct mlx4_dev *dev = gw->dev->dev;
  1208. if (!gw->dev->ib_active)
  1209. return;
  1210. mailbox = mlx4_alloc_cmd_mailbox(dev);
  1211. if (IS_ERR(mailbox)) {
  1212. pr_warn("update gid table failed %ld\n", PTR_ERR(mailbox));
  1213. return;
  1214. }
  1215. gids = mailbox->buf;
  1216. memcpy(gids, gw->gids, sizeof gw->gids);
  1217. err = mlx4_cmd(dev, mailbox->dma, MLX4_SET_PORT_GID_TABLE << 8 | gw->port,
  1218. 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
  1219. MLX4_CMD_WRAPPED);
  1220. if (err)
  1221. pr_warn("set port command failed\n");
  1222. else
  1223. mlx4_ib_dispatch_event(gw->dev, gw->port, IB_EVENT_GID_CHANGE);
  1224. mlx4_free_cmd_mailbox(dev, mailbox);
  1225. kfree(gw);
  1226. }
  1227. static void reset_gids_task(struct work_struct *work)
  1228. {
  1229. struct update_gid_work *gw =
  1230. container_of(work, struct update_gid_work, work);
  1231. struct mlx4_cmd_mailbox *mailbox;
  1232. union ib_gid *gids;
  1233. int err;
  1234. struct mlx4_dev *dev = gw->dev->dev;
  1235. if (!gw->dev->ib_active)
  1236. return;
  1237. mailbox = mlx4_alloc_cmd_mailbox(dev);
  1238. if (IS_ERR(mailbox)) {
  1239. pr_warn("reset gid table failed\n");
  1240. goto free;
  1241. }
  1242. gids = mailbox->buf;
  1243. memcpy(gids, gw->gids, sizeof(gw->gids));
  1244. if (mlx4_ib_port_link_layer(&gw->dev->ib_dev, gw->port) ==
  1245. IB_LINK_LAYER_ETHERNET) {
  1246. err = mlx4_cmd(dev, mailbox->dma,
  1247. MLX4_SET_PORT_GID_TABLE << 8 | gw->port,
  1248. 1, MLX4_CMD_SET_PORT,
  1249. MLX4_CMD_TIME_CLASS_B,
  1250. MLX4_CMD_WRAPPED);
  1251. if (err)
  1252. pr_warn(KERN_WARNING
  1253. "set port %d command failed\n", gw->port);
  1254. }
  1255. mlx4_free_cmd_mailbox(dev, mailbox);
  1256. free:
  1257. kfree(gw);
  1258. }
  1259. static int update_gid_table(struct mlx4_ib_dev *dev, int port,
  1260. union ib_gid *gid, int clear,
  1261. int default_gid)
  1262. {
  1263. struct update_gid_work *work;
  1264. int i;
  1265. int need_update = 0;
  1266. int free = -1;
  1267. int found = -1;
  1268. int max_gids;
  1269. if (default_gid) {
  1270. free = 0;
  1271. } else {
  1272. max_gids = dev->dev->caps.gid_table_len[port];
  1273. for (i = 1; i < max_gids; ++i) {
  1274. if (!memcmp(&dev->iboe.gid_table[port - 1][i], gid,
  1275. sizeof(*gid)))
  1276. found = i;
  1277. if (clear) {
  1278. if (found >= 0) {
  1279. need_update = 1;
  1280. dev->iboe.gid_table[port - 1][found] =
  1281. zgid;
  1282. break;
  1283. }
  1284. } else {
  1285. if (found >= 0)
  1286. break;
  1287. if (free < 0 &&
  1288. !memcmp(&dev->iboe.gid_table[port - 1][i],
  1289. &zgid, sizeof(*gid)))
  1290. free = i;
  1291. }
  1292. }
  1293. }
  1294. if (found == -1 && !clear && free >= 0) {
  1295. dev->iboe.gid_table[port - 1][free] = *gid;
  1296. need_update = 1;
  1297. }
  1298. if (!need_update)
  1299. return 0;
  1300. work = kzalloc(sizeof(*work), GFP_ATOMIC);
  1301. if (!work)
  1302. return -ENOMEM;
  1303. memcpy(work->gids, dev->iboe.gid_table[port - 1], sizeof(work->gids));
  1304. INIT_WORK(&work->work, update_gids_task);
  1305. work->port = port;
  1306. work->dev = dev;
  1307. queue_work(wq, &work->work);
  1308. return 0;
  1309. }
  1310. static void mlx4_make_default_gid(struct net_device *dev, union ib_gid *gid)
  1311. {
  1312. gid->global.subnet_prefix = cpu_to_be64(0xfe80000000000000LL);
  1313. mlx4_addrconf_ifid_eui48(&gid->raw[8], 0xffff, dev);
  1314. }
  1315. static int reset_gid_table(struct mlx4_ib_dev *dev, u8 port)
  1316. {
  1317. struct update_gid_work *work;
  1318. work = kzalloc(sizeof(*work), GFP_ATOMIC);
  1319. if (!work)
  1320. return -ENOMEM;
  1321. memset(dev->iboe.gid_table[port - 1], 0, sizeof(work->gids));
  1322. memset(work->gids, 0, sizeof(work->gids));
  1323. INIT_WORK(&work->work, reset_gids_task);
  1324. work->dev = dev;
  1325. work->port = port;
  1326. queue_work(wq, &work->work);
  1327. return 0;
  1328. }
  1329. static int mlx4_ib_addr_event(int event, struct net_device *event_netdev,
  1330. struct mlx4_ib_dev *ibdev, union ib_gid *gid)
  1331. {
  1332. struct mlx4_ib_iboe *iboe;
  1333. int port = 0;
  1334. struct net_device *real_dev = rdma_vlan_dev_real_dev(event_netdev) ?
  1335. rdma_vlan_dev_real_dev(event_netdev) :
  1336. event_netdev;
  1337. union ib_gid default_gid;
  1338. mlx4_make_default_gid(real_dev, &default_gid);
  1339. if (!memcmp(gid, &default_gid, sizeof(*gid)))
  1340. return 0;
  1341. if (event != NETDEV_DOWN && event != NETDEV_UP)
  1342. return 0;
  1343. if ((real_dev != event_netdev) &&
  1344. (event == NETDEV_DOWN) &&
  1345. rdma_link_local_addr((struct in6_addr *)gid))
  1346. return 0;
  1347. iboe = &ibdev->iboe;
  1348. spin_lock_bh(&iboe->lock);
  1349. for (port = 1; port <= ibdev->dev->caps.num_ports; ++port)
  1350. if ((netif_is_bond_master(real_dev) &&
  1351. (real_dev == iboe->masters[port - 1])) ||
  1352. (!netif_is_bond_master(real_dev) &&
  1353. (real_dev == iboe->netdevs[port - 1])))
  1354. update_gid_table(ibdev, port, gid,
  1355. event == NETDEV_DOWN, 0);
  1356. spin_unlock_bh(&iboe->lock);
  1357. return 0;
  1358. }
  1359. static u8 mlx4_ib_get_dev_port(struct net_device *dev,
  1360. struct mlx4_ib_dev *ibdev)
  1361. {
  1362. u8 port = 0;
  1363. struct mlx4_ib_iboe *iboe;
  1364. struct net_device *real_dev = rdma_vlan_dev_real_dev(dev) ?
  1365. rdma_vlan_dev_real_dev(dev) : dev;
  1366. iboe = &ibdev->iboe;
  1367. for (port = 1; port <= ibdev->dev->caps.num_ports; ++port)
  1368. if ((netif_is_bond_master(real_dev) &&
  1369. (real_dev == iboe->masters[port - 1])) ||
  1370. (!netif_is_bond_master(real_dev) &&
  1371. (real_dev == iboe->netdevs[port - 1])))
  1372. break;
  1373. if ((port == 0) || (port > ibdev->dev->caps.num_ports))
  1374. return 0;
  1375. else
  1376. return port;
  1377. }
  1378. static int mlx4_ib_inet_event(struct notifier_block *this, unsigned long event,
  1379. void *ptr)
  1380. {
  1381. struct mlx4_ib_dev *ibdev;
  1382. struct in_ifaddr *ifa = ptr;
  1383. union ib_gid gid;
  1384. struct net_device *event_netdev = ifa->ifa_dev->dev;
  1385. ipv6_addr_set_v4mapped(ifa->ifa_address, (struct in6_addr *)&gid);
  1386. ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb_inet);
  1387. mlx4_ib_addr_event(event, event_netdev, ibdev, &gid);
  1388. return NOTIFY_DONE;
  1389. }
  1390. #if IS_ENABLED(CONFIG_IPV6)
  1391. static int mlx4_ib_inet6_event(struct notifier_block *this, unsigned long event,
  1392. void *ptr)
  1393. {
  1394. struct mlx4_ib_dev *ibdev;
  1395. struct inet6_ifaddr *ifa = ptr;
  1396. union ib_gid *gid = (union ib_gid *)&ifa->addr;
  1397. struct net_device *event_netdev = ifa->idev->dev;
  1398. ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb_inet6);
  1399. mlx4_ib_addr_event(event, event_netdev, ibdev, gid);
  1400. return NOTIFY_DONE;
  1401. }
  1402. #endif
  1403. #define MLX4_IB_INVALID_MAC ((u64)-1)
  1404. static void mlx4_ib_update_qps(struct mlx4_ib_dev *ibdev,
  1405. struct net_device *dev,
  1406. int port)
  1407. {
  1408. u64 new_smac = 0;
  1409. u64 release_mac = MLX4_IB_INVALID_MAC;
  1410. struct mlx4_ib_qp *qp;
  1411. read_lock(&dev_base_lock);
  1412. new_smac = mlx4_mac_to_u64(dev->dev_addr);
  1413. read_unlock(&dev_base_lock);
  1414. atomic64_set(&ibdev->iboe.mac[port - 1], new_smac);
  1415. /* no need for update QP1 and mac registration in non-SRIOV */
  1416. if (!mlx4_is_mfunc(ibdev->dev))
  1417. return;
  1418. mutex_lock(&ibdev->qp1_proxy_lock[port - 1]);
  1419. qp = ibdev->qp1_proxy[port - 1];
  1420. if (qp) {
  1421. int new_smac_index;
  1422. u64 old_smac;
  1423. struct mlx4_update_qp_params update_params;
  1424. mutex_lock(&qp->mutex);
  1425. old_smac = qp->pri.smac;
  1426. if (new_smac == old_smac)
  1427. goto unlock;
  1428. new_smac_index = mlx4_register_mac(ibdev->dev, port, new_smac);
  1429. if (new_smac_index < 0)
  1430. goto unlock;
  1431. update_params.smac_index = new_smac_index;
  1432. if (mlx4_update_qp(ibdev->dev, qp->mqp.qpn, MLX4_UPDATE_QP_SMAC,
  1433. &update_params)) {
  1434. release_mac = new_smac;
  1435. goto unlock;
  1436. }
  1437. /* if old port was zero, no mac was yet registered for this QP */
  1438. if (qp->pri.smac_port)
  1439. release_mac = old_smac;
  1440. qp->pri.smac = new_smac;
  1441. qp->pri.smac_port = port;
  1442. qp->pri.smac_index = new_smac_index;
  1443. }
  1444. unlock:
  1445. if (release_mac != MLX4_IB_INVALID_MAC)
  1446. mlx4_unregister_mac(ibdev->dev, port, release_mac);
  1447. if (qp)
  1448. mutex_unlock(&qp->mutex);
  1449. mutex_unlock(&ibdev->qp1_proxy_lock[port - 1]);
  1450. }
  1451. static void mlx4_ib_get_dev_addr(struct net_device *dev,
  1452. struct mlx4_ib_dev *ibdev, u8 port)
  1453. {
  1454. struct in_device *in_dev;
  1455. #if IS_ENABLED(CONFIG_IPV6)
  1456. struct inet6_dev *in6_dev;
  1457. union ib_gid *pgid;
  1458. struct inet6_ifaddr *ifp;
  1459. union ib_gid default_gid;
  1460. #endif
  1461. union ib_gid gid;
  1462. if ((port == 0) || (port > ibdev->dev->caps.num_ports))
  1463. return;
  1464. /* IPv4 gids */
  1465. in_dev = in_dev_get(dev);
  1466. if (in_dev) {
  1467. for_ifa(in_dev) {
  1468. /*ifa->ifa_address;*/
  1469. ipv6_addr_set_v4mapped(ifa->ifa_address,
  1470. (struct in6_addr *)&gid);
  1471. update_gid_table(ibdev, port, &gid, 0, 0);
  1472. }
  1473. endfor_ifa(in_dev);
  1474. in_dev_put(in_dev);
  1475. }
  1476. #if IS_ENABLED(CONFIG_IPV6)
  1477. mlx4_make_default_gid(dev, &default_gid);
  1478. /* IPv6 gids */
  1479. in6_dev = in6_dev_get(dev);
  1480. if (in6_dev) {
  1481. read_lock_bh(&in6_dev->lock);
  1482. list_for_each_entry(ifp, &in6_dev->addr_list, if_list) {
  1483. pgid = (union ib_gid *)&ifp->addr;
  1484. if (!memcmp(pgid, &default_gid, sizeof(*pgid)))
  1485. continue;
  1486. update_gid_table(ibdev, port, pgid, 0, 0);
  1487. }
  1488. read_unlock_bh(&in6_dev->lock);
  1489. in6_dev_put(in6_dev);
  1490. }
  1491. #endif
  1492. }
  1493. static void mlx4_ib_set_default_gid(struct mlx4_ib_dev *ibdev,
  1494. struct net_device *dev, u8 port)
  1495. {
  1496. union ib_gid gid;
  1497. mlx4_make_default_gid(dev, &gid);
  1498. update_gid_table(ibdev, port, &gid, 0, 1);
  1499. }
  1500. static int mlx4_ib_init_gid_table(struct mlx4_ib_dev *ibdev)
  1501. {
  1502. struct net_device *dev;
  1503. struct mlx4_ib_iboe *iboe = &ibdev->iboe;
  1504. int i;
  1505. int err = 0;
  1506. for (i = 1; i <= ibdev->num_ports; ++i) {
  1507. if (rdma_port_get_link_layer(&ibdev->ib_dev, i) ==
  1508. IB_LINK_LAYER_ETHERNET) {
  1509. err = reset_gid_table(ibdev, i);
  1510. if (err)
  1511. goto out;
  1512. }
  1513. }
  1514. read_lock(&dev_base_lock);
  1515. spin_lock_bh(&iboe->lock);
  1516. for_each_netdev(&init_net, dev) {
  1517. u8 port = mlx4_ib_get_dev_port(dev, ibdev);
  1518. /* port will be non-zero only for ETH ports */
  1519. if (port) {
  1520. mlx4_ib_set_default_gid(ibdev, dev, port);
  1521. mlx4_ib_get_dev_addr(dev, ibdev, port);
  1522. }
  1523. }
  1524. spin_unlock_bh(&iboe->lock);
  1525. read_unlock(&dev_base_lock);
  1526. out:
  1527. return err;
  1528. }
  1529. static void mlx4_ib_scan_netdevs(struct mlx4_ib_dev *ibdev,
  1530. struct net_device *dev,
  1531. unsigned long event)
  1532. {
  1533. struct mlx4_ib_iboe *iboe;
  1534. int update_qps_port = -1;
  1535. int port;
  1536. iboe = &ibdev->iboe;
  1537. spin_lock_bh(&iboe->lock);
  1538. mlx4_foreach_ib_transport_port(port, ibdev->dev) {
  1539. enum ib_port_state port_state = IB_PORT_NOP;
  1540. struct net_device *old_master = iboe->masters[port - 1];
  1541. struct net_device *curr_netdev;
  1542. struct net_device *curr_master;
  1543. iboe->netdevs[port - 1] =
  1544. mlx4_get_protocol_dev(ibdev->dev, MLX4_PROT_ETH, port);
  1545. if (iboe->netdevs[port - 1])
  1546. mlx4_ib_set_default_gid(ibdev,
  1547. iboe->netdevs[port - 1], port);
  1548. curr_netdev = iboe->netdevs[port - 1];
  1549. if (iboe->netdevs[port - 1] &&
  1550. netif_is_bond_slave(iboe->netdevs[port - 1])) {
  1551. iboe->masters[port - 1] = netdev_master_upper_dev_get(
  1552. iboe->netdevs[port - 1]);
  1553. } else {
  1554. iboe->masters[port - 1] = NULL;
  1555. }
  1556. curr_master = iboe->masters[port - 1];
  1557. if (dev == iboe->netdevs[port - 1] &&
  1558. (event == NETDEV_CHANGEADDR || event == NETDEV_REGISTER ||
  1559. event == NETDEV_UP || event == NETDEV_CHANGE))
  1560. update_qps_port = port;
  1561. if (curr_netdev) {
  1562. port_state = (netif_running(curr_netdev) && netif_carrier_ok(curr_netdev)) ?
  1563. IB_PORT_ACTIVE : IB_PORT_DOWN;
  1564. mlx4_ib_set_default_gid(ibdev, curr_netdev, port);
  1565. if (curr_master) {
  1566. /* if using bonding/team and a slave port is down, we
  1567. * don't want the bond IP based gids in the table since
  1568. * flows that select port by gid may get the down port.
  1569. */
  1570. if (port_state == IB_PORT_DOWN) {
  1571. reset_gid_table(ibdev, port);
  1572. mlx4_ib_set_default_gid(ibdev,
  1573. curr_netdev,
  1574. port);
  1575. } else {
  1576. /* gids from the upper dev (bond/team)
  1577. * should appear in port's gid table
  1578. */
  1579. mlx4_ib_get_dev_addr(curr_master,
  1580. ibdev, port);
  1581. }
  1582. }
  1583. /* if bonding is used it is possible that we add it to
  1584. * masters only after IP address is assigned to the
  1585. * net bonding interface.
  1586. */
  1587. if (curr_master && (old_master != curr_master)) {
  1588. reset_gid_table(ibdev, port);
  1589. mlx4_ib_set_default_gid(ibdev,
  1590. curr_netdev, port);
  1591. mlx4_ib_get_dev_addr(curr_master, ibdev, port);
  1592. }
  1593. if (!curr_master && (old_master != curr_master)) {
  1594. reset_gid_table(ibdev, port);
  1595. mlx4_ib_set_default_gid(ibdev,
  1596. curr_netdev, port);
  1597. mlx4_ib_get_dev_addr(curr_netdev, ibdev, port);
  1598. }
  1599. } else {
  1600. reset_gid_table(ibdev, port);
  1601. }
  1602. }
  1603. spin_unlock_bh(&iboe->lock);
  1604. if (update_qps_port > 0)
  1605. mlx4_ib_update_qps(ibdev, dev, update_qps_port);
  1606. }
  1607. static int mlx4_ib_netdev_event(struct notifier_block *this,
  1608. unsigned long event, void *ptr)
  1609. {
  1610. struct net_device *dev = netdev_notifier_info_to_dev(ptr);
  1611. struct mlx4_ib_dev *ibdev;
  1612. if (!net_eq(dev_net(dev), &init_net))
  1613. return NOTIFY_DONE;
  1614. ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb);
  1615. mlx4_ib_scan_netdevs(ibdev, dev, event);
  1616. return NOTIFY_DONE;
  1617. }
  1618. static void init_pkeys(struct mlx4_ib_dev *ibdev)
  1619. {
  1620. int port;
  1621. int slave;
  1622. int i;
  1623. if (mlx4_is_master(ibdev->dev)) {
  1624. for (slave = 0; slave <= ibdev->dev->num_vfs; ++slave) {
  1625. for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) {
  1626. for (i = 0;
  1627. i < ibdev->dev->phys_caps.pkey_phys_table_len[port];
  1628. ++i) {
  1629. ibdev->pkeys.virt2phys_pkey[slave][port - 1][i] =
  1630. /* master has the identity virt2phys pkey mapping */
  1631. (slave == mlx4_master_func_num(ibdev->dev) || !i) ? i :
  1632. ibdev->dev->phys_caps.pkey_phys_table_len[port] - 1;
  1633. mlx4_sync_pkey_table(ibdev->dev, slave, port, i,
  1634. ibdev->pkeys.virt2phys_pkey[slave][port - 1][i]);
  1635. }
  1636. }
  1637. }
  1638. /* initialize pkey cache */
  1639. for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) {
  1640. for (i = 0;
  1641. i < ibdev->dev->phys_caps.pkey_phys_table_len[port];
  1642. ++i)
  1643. ibdev->pkeys.phys_pkey_cache[port-1][i] =
  1644. (i) ? 0 : 0xFFFF;
  1645. }
  1646. }
  1647. }
  1648. static void mlx4_ib_alloc_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev)
  1649. {
  1650. char name[80];
  1651. int eq_per_port = 0;
  1652. int added_eqs = 0;
  1653. int total_eqs = 0;
  1654. int i, j, eq;
  1655. /* Legacy mode or comp_pool is not large enough */
  1656. if (dev->caps.comp_pool == 0 ||
  1657. dev->caps.num_ports > dev->caps.comp_pool)
  1658. return;
  1659. eq_per_port = dev->caps.comp_pool / dev->caps.num_ports;
  1660. /* Init eq table */
  1661. added_eqs = 0;
  1662. mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
  1663. added_eqs += eq_per_port;
  1664. total_eqs = dev->caps.num_comp_vectors + added_eqs;
  1665. ibdev->eq_table = kzalloc(total_eqs * sizeof(int), GFP_KERNEL);
  1666. if (!ibdev->eq_table)
  1667. return;
  1668. ibdev->eq_added = added_eqs;
  1669. eq = 0;
  1670. mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB) {
  1671. for (j = 0; j < eq_per_port; j++) {
  1672. snprintf(name, sizeof(name), "mlx4-ib-%d-%d@%s",
  1673. i, j, dev->pdev->bus->name);
  1674. /* Set IRQ for specific name (per ring) */
  1675. if (mlx4_assign_eq(dev, name, NULL,
  1676. &ibdev->eq_table[eq])) {
  1677. /* Use legacy (same as mlx4_en driver) */
  1678. pr_warn("Can't allocate EQ %d; reverting to legacy\n", eq);
  1679. ibdev->eq_table[eq] =
  1680. (eq % dev->caps.num_comp_vectors);
  1681. }
  1682. eq++;
  1683. }
  1684. }
  1685. /* Fill the reset of the vector with legacy EQ */
  1686. for (i = 0, eq = added_eqs; i < dev->caps.num_comp_vectors; i++)
  1687. ibdev->eq_table[eq++] = i;
  1688. /* Advertise the new number of EQs to clients */
  1689. ibdev->ib_dev.num_comp_vectors = total_eqs;
  1690. }
  1691. static void mlx4_ib_free_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev)
  1692. {
  1693. int i;
  1694. /* no additional eqs were added */
  1695. if (!ibdev->eq_table)
  1696. return;
  1697. /* Reset the advertised EQ number */
  1698. ibdev->ib_dev.num_comp_vectors = dev->caps.num_comp_vectors;
  1699. /* Free only the added eqs */
  1700. for (i = 0; i < ibdev->eq_added; i++) {
  1701. /* Don't free legacy eqs if used */
  1702. if (ibdev->eq_table[i] <= dev->caps.num_comp_vectors)
  1703. continue;
  1704. mlx4_release_eq(dev, ibdev->eq_table[i]);
  1705. }
  1706. kfree(ibdev->eq_table);
  1707. }
  1708. static void *mlx4_ib_add(struct mlx4_dev *dev)
  1709. {
  1710. struct mlx4_ib_dev *ibdev;
  1711. int num_ports = 0;
  1712. int i, j;
  1713. int err;
  1714. struct mlx4_ib_iboe *iboe;
  1715. int ib_num_ports = 0;
  1716. pr_info_once("%s", mlx4_ib_version);
  1717. num_ports = 0;
  1718. mlx4_foreach_ib_transport_port(i, dev)
  1719. num_ports++;
  1720. /* No point in registering a device with no ports... */
  1721. if (num_ports == 0)
  1722. return NULL;
  1723. ibdev = (struct mlx4_ib_dev *) ib_alloc_device(sizeof *ibdev);
  1724. if (!ibdev) {
  1725. dev_err(&dev->pdev->dev, "Device struct alloc failed\n");
  1726. return NULL;
  1727. }
  1728. iboe = &ibdev->iboe;
  1729. if (mlx4_pd_alloc(dev, &ibdev->priv_pdn))
  1730. goto err_dealloc;
  1731. if (mlx4_uar_alloc(dev, &ibdev->priv_uar))
  1732. goto err_pd;
  1733. ibdev->uar_map = ioremap((phys_addr_t) ibdev->priv_uar.pfn << PAGE_SHIFT,
  1734. PAGE_SIZE);
  1735. if (!ibdev->uar_map)
  1736. goto err_uar;
  1737. MLX4_INIT_DOORBELL_LOCK(&ibdev->uar_lock);
  1738. ibdev->dev = dev;
  1739. strlcpy(ibdev->ib_dev.name, "mlx4_%d", IB_DEVICE_NAME_MAX);
  1740. ibdev->ib_dev.owner = THIS_MODULE;
  1741. ibdev->ib_dev.node_type = RDMA_NODE_IB_CA;
  1742. ibdev->ib_dev.local_dma_lkey = dev->caps.reserved_lkey;
  1743. ibdev->num_ports = num_ports;
  1744. ibdev->ib_dev.phys_port_cnt = ibdev->num_ports;
  1745. ibdev->ib_dev.num_comp_vectors = dev->caps.num_comp_vectors;
  1746. ibdev->ib_dev.dma_device = &dev->pdev->dev;
  1747. if (dev->caps.userspace_caps)
  1748. ibdev->ib_dev.uverbs_abi_ver = MLX4_IB_UVERBS_ABI_VERSION;
  1749. else
  1750. ibdev->ib_dev.uverbs_abi_ver = MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION;
  1751. ibdev->ib_dev.uverbs_cmd_mask =
  1752. (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
  1753. (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
  1754. (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
  1755. (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
  1756. (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
  1757. (1ull << IB_USER_VERBS_CMD_REG_MR) |
  1758. (1ull << IB_USER_VERBS_CMD_REREG_MR) |
  1759. (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
  1760. (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
  1761. (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
  1762. (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) |
  1763. (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
  1764. (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
  1765. (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
  1766. (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
  1767. (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
  1768. (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) |
  1769. (1ull << IB_USER_VERBS_CMD_DETACH_MCAST) |
  1770. (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) |
  1771. (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) |
  1772. (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) |
  1773. (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) |
  1774. (1ull << IB_USER_VERBS_CMD_CREATE_XSRQ) |
  1775. (1ull << IB_USER_VERBS_CMD_OPEN_QP);
  1776. ibdev->ib_dev.query_device = mlx4_ib_query_device;
  1777. ibdev->ib_dev.query_port = mlx4_ib_query_port;
  1778. ibdev->ib_dev.get_link_layer = mlx4_ib_port_link_layer;
  1779. ibdev->ib_dev.query_gid = mlx4_ib_query_gid;
  1780. ibdev->ib_dev.query_pkey = mlx4_ib_query_pkey;
  1781. ibdev->ib_dev.modify_device = mlx4_ib_modify_device;
  1782. ibdev->ib_dev.modify_port = mlx4_ib_modify_port;
  1783. ibdev->ib_dev.alloc_ucontext = mlx4_ib_alloc_ucontext;
  1784. ibdev->ib_dev.dealloc_ucontext = mlx4_ib_dealloc_ucontext;
  1785. ibdev->ib_dev.mmap = mlx4_ib_mmap;
  1786. ibdev->ib_dev.alloc_pd = mlx4_ib_alloc_pd;
  1787. ibdev->ib_dev.dealloc_pd = mlx4_ib_dealloc_pd;
  1788. ibdev->ib_dev.create_ah = mlx4_ib_create_ah;
  1789. ibdev->ib_dev.query_ah = mlx4_ib_query_ah;
  1790. ibdev->ib_dev.destroy_ah = mlx4_ib_destroy_ah;
  1791. ibdev->ib_dev.create_srq = mlx4_ib_create_srq;
  1792. ibdev->ib_dev.modify_srq = mlx4_ib_modify_srq;
  1793. ibdev->ib_dev.query_srq = mlx4_ib_query_srq;
  1794. ibdev->ib_dev.destroy_srq = mlx4_ib_destroy_srq;
  1795. ibdev->ib_dev.post_srq_recv = mlx4_ib_post_srq_recv;
  1796. ibdev->ib_dev.create_qp = mlx4_ib_create_qp;
  1797. ibdev->ib_dev.modify_qp = mlx4_ib_modify_qp;
  1798. ibdev->ib_dev.query_qp = mlx4_ib_query_qp;
  1799. ibdev->ib_dev.destroy_qp = mlx4_ib_destroy_qp;
  1800. ibdev->ib_dev.post_send = mlx4_ib_post_send;
  1801. ibdev->ib_dev.post_recv = mlx4_ib_post_recv;
  1802. ibdev->ib_dev.create_cq = mlx4_ib_create_cq;
  1803. ibdev->ib_dev.modify_cq = mlx4_ib_modify_cq;
  1804. ibdev->ib_dev.resize_cq = mlx4_ib_resize_cq;
  1805. ibdev->ib_dev.destroy_cq = mlx4_ib_destroy_cq;
  1806. ibdev->ib_dev.poll_cq = mlx4_ib_poll_cq;
  1807. ibdev->ib_dev.req_notify_cq = mlx4_ib_arm_cq;
  1808. ibdev->ib_dev.get_dma_mr = mlx4_ib_get_dma_mr;
  1809. ibdev->ib_dev.reg_user_mr = mlx4_ib_reg_user_mr;
  1810. ibdev->ib_dev.rereg_user_mr = mlx4_ib_rereg_user_mr;
  1811. ibdev->ib_dev.dereg_mr = mlx4_ib_dereg_mr;
  1812. ibdev->ib_dev.alloc_fast_reg_mr = mlx4_ib_alloc_fast_reg_mr;
  1813. ibdev->ib_dev.alloc_fast_reg_page_list = mlx4_ib_alloc_fast_reg_page_list;
  1814. ibdev->ib_dev.free_fast_reg_page_list = mlx4_ib_free_fast_reg_page_list;
  1815. ibdev->ib_dev.attach_mcast = mlx4_ib_mcg_attach;
  1816. ibdev->ib_dev.detach_mcast = mlx4_ib_mcg_detach;
  1817. ibdev->ib_dev.process_mad = mlx4_ib_process_mad;
  1818. if (!mlx4_is_slave(ibdev->dev)) {
  1819. ibdev->ib_dev.alloc_fmr = mlx4_ib_fmr_alloc;
  1820. ibdev->ib_dev.map_phys_fmr = mlx4_ib_map_phys_fmr;
  1821. ibdev->ib_dev.unmap_fmr = mlx4_ib_unmap_fmr;
  1822. ibdev->ib_dev.dealloc_fmr = mlx4_ib_fmr_dealloc;
  1823. }
  1824. if (dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW ||
  1825. dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) {
  1826. ibdev->ib_dev.alloc_mw = mlx4_ib_alloc_mw;
  1827. ibdev->ib_dev.bind_mw = mlx4_ib_bind_mw;
  1828. ibdev->ib_dev.dealloc_mw = mlx4_ib_dealloc_mw;
  1829. ibdev->ib_dev.uverbs_cmd_mask |=
  1830. (1ull << IB_USER_VERBS_CMD_ALLOC_MW) |
  1831. (1ull << IB_USER_VERBS_CMD_DEALLOC_MW);
  1832. }
  1833. if (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) {
  1834. ibdev->ib_dev.alloc_xrcd = mlx4_ib_alloc_xrcd;
  1835. ibdev->ib_dev.dealloc_xrcd = mlx4_ib_dealloc_xrcd;
  1836. ibdev->ib_dev.uverbs_cmd_mask |=
  1837. (1ull << IB_USER_VERBS_CMD_OPEN_XRCD) |
  1838. (1ull << IB_USER_VERBS_CMD_CLOSE_XRCD);
  1839. }
  1840. if (check_flow_steering_support(dev)) {
  1841. ibdev->steering_support = MLX4_STEERING_MODE_DEVICE_MANAGED;
  1842. ibdev->ib_dev.create_flow = mlx4_ib_create_flow;
  1843. ibdev->ib_dev.destroy_flow = mlx4_ib_destroy_flow;
  1844. ibdev->ib_dev.uverbs_ex_cmd_mask |=
  1845. (1ull << IB_USER_VERBS_EX_CMD_CREATE_FLOW) |
  1846. (1ull << IB_USER_VERBS_EX_CMD_DESTROY_FLOW);
  1847. }
  1848. mlx4_ib_alloc_eqs(dev, ibdev);
  1849. spin_lock_init(&iboe->lock);
  1850. if (init_node_data(ibdev))
  1851. goto err_map;
  1852. for (i = 0; i < ibdev->num_ports; ++i) {
  1853. mutex_init(&ibdev->qp1_proxy_lock[i]);
  1854. if (mlx4_ib_port_link_layer(&ibdev->ib_dev, i + 1) ==
  1855. IB_LINK_LAYER_ETHERNET) {
  1856. err = mlx4_counter_alloc(ibdev->dev, &ibdev->counters[i]);
  1857. if (err)
  1858. ibdev->counters[i] = -1;
  1859. } else {
  1860. ibdev->counters[i] = -1;
  1861. }
  1862. }
  1863. mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
  1864. ib_num_ports++;
  1865. spin_lock_init(&ibdev->sm_lock);
  1866. mutex_init(&ibdev->cap_mask_mutex);
  1867. if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED &&
  1868. ib_num_ports) {
  1869. ibdev->steer_qpn_count = MLX4_IB_UC_MAX_NUM_QPS;
  1870. err = mlx4_qp_reserve_range(dev, ibdev->steer_qpn_count,
  1871. MLX4_IB_UC_STEER_QPN_ALIGN,
  1872. &ibdev->steer_qpn_base, 0);
  1873. if (err)
  1874. goto err_counter;
  1875. ibdev->ib_uc_qpns_bitmap =
  1876. kmalloc(BITS_TO_LONGS(ibdev->steer_qpn_count) *
  1877. sizeof(long),
  1878. GFP_KERNEL);
  1879. if (!ibdev->ib_uc_qpns_bitmap) {
  1880. dev_err(&dev->pdev->dev, "bit map alloc failed\n");
  1881. goto err_steer_qp_release;
  1882. }
  1883. bitmap_zero(ibdev->ib_uc_qpns_bitmap, ibdev->steer_qpn_count);
  1884. err = mlx4_FLOW_STEERING_IB_UC_QP_RANGE(
  1885. dev, ibdev->steer_qpn_base,
  1886. ibdev->steer_qpn_base +
  1887. ibdev->steer_qpn_count - 1);
  1888. if (err)
  1889. goto err_steer_free_bitmap;
  1890. }
  1891. for (j = 1; j <= ibdev->dev->caps.num_ports; j++)
  1892. atomic64_set(&iboe->mac[j - 1], ibdev->dev->caps.def_mac[j]);
  1893. if (ib_register_device(&ibdev->ib_dev, NULL))
  1894. goto err_steer_free_bitmap;
  1895. if (mlx4_ib_mad_init(ibdev))
  1896. goto err_reg;
  1897. if (mlx4_ib_init_sriov(ibdev))
  1898. goto err_mad;
  1899. if (dev->caps.flags & MLX4_DEV_CAP_FLAG_IBOE) {
  1900. if (!iboe->nb.notifier_call) {
  1901. iboe->nb.notifier_call = mlx4_ib_netdev_event;
  1902. err = register_netdevice_notifier(&iboe->nb);
  1903. if (err) {
  1904. iboe->nb.notifier_call = NULL;
  1905. goto err_notif;
  1906. }
  1907. }
  1908. if (!iboe->nb_inet.notifier_call) {
  1909. iboe->nb_inet.notifier_call = mlx4_ib_inet_event;
  1910. err = register_inetaddr_notifier(&iboe->nb_inet);
  1911. if (err) {
  1912. iboe->nb_inet.notifier_call = NULL;
  1913. goto err_notif;
  1914. }
  1915. }
  1916. #if IS_ENABLED(CONFIG_IPV6)
  1917. if (!iboe->nb_inet6.notifier_call) {
  1918. iboe->nb_inet6.notifier_call = mlx4_ib_inet6_event;
  1919. err = register_inet6addr_notifier(&iboe->nb_inet6);
  1920. if (err) {
  1921. iboe->nb_inet6.notifier_call = NULL;
  1922. goto err_notif;
  1923. }
  1924. }
  1925. #endif
  1926. if (mlx4_ib_init_gid_table(ibdev))
  1927. goto err_notif;
  1928. }
  1929. for (j = 0; j < ARRAY_SIZE(mlx4_class_attributes); ++j) {
  1930. if (device_create_file(&ibdev->ib_dev.dev,
  1931. mlx4_class_attributes[j]))
  1932. goto err_notif;
  1933. }
  1934. ibdev->ib_active = true;
  1935. if (mlx4_is_mfunc(ibdev->dev))
  1936. init_pkeys(ibdev);
  1937. /* create paravirt contexts for any VFs which are active */
  1938. if (mlx4_is_master(ibdev->dev)) {
  1939. for (j = 0; j < MLX4_MFUNC_MAX; j++) {
  1940. if (j == mlx4_master_func_num(ibdev->dev))
  1941. continue;
  1942. if (mlx4_is_slave_active(ibdev->dev, j))
  1943. do_slave_init(ibdev, j, 1);
  1944. }
  1945. }
  1946. return ibdev;
  1947. err_notif:
  1948. if (ibdev->iboe.nb.notifier_call) {
  1949. if (unregister_netdevice_notifier(&ibdev->iboe.nb))
  1950. pr_warn("failure unregistering notifier\n");
  1951. ibdev->iboe.nb.notifier_call = NULL;
  1952. }
  1953. if (ibdev->iboe.nb_inet.notifier_call) {
  1954. if (unregister_inetaddr_notifier(&ibdev->iboe.nb_inet))
  1955. pr_warn("failure unregistering notifier\n");
  1956. ibdev->iboe.nb_inet.notifier_call = NULL;
  1957. }
  1958. #if IS_ENABLED(CONFIG_IPV6)
  1959. if (ibdev->iboe.nb_inet6.notifier_call) {
  1960. if (unregister_inet6addr_notifier(&ibdev->iboe.nb_inet6))
  1961. pr_warn("failure unregistering notifier\n");
  1962. ibdev->iboe.nb_inet6.notifier_call = NULL;
  1963. }
  1964. #endif
  1965. flush_workqueue(wq);
  1966. mlx4_ib_close_sriov(ibdev);
  1967. err_mad:
  1968. mlx4_ib_mad_cleanup(ibdev);
  1969. err_reg:
  1970. ib_unregister_device(&ibdev->ib_dev);
  1971. err_steer_free_bitmap:
  1972. kfree(ibdev->ib_uc_qpns_bitmap);
  1973. err_steer_qp_release:
  1974. if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED)
  1975. mlx4_qp_release_range(dev, ibdev->steer_qpn_base,
  1976. ibdev->steer_qpn_count);
  1977. err_counter:
  1978. for (; i; --i)
  1979. if (ibdev->counters[i - 1] != -1)
  1980. mlx4_counter_free(ibdev->dev, ibdev->counters[i - 1]);
  1981. err_map:
  1982. iounmap(ibdev->uar_map);
  1983. err_uar:
  1984. mlx4_uar_free(dev, &ibdev->priv_uar);
  1985. err_pd:
  1986. mlx4_pd_free(dev, ibdev->priv_pdn);
  1987. err_dealloc:
  1988. ib_dealloc_device(&ibdev->ib_dev);
  1989. return NULL;
  1990. }
  1991. int mlx4_ib_steer_qp_alloc(struct mlx4_ib_dev *dev, int count, int *qpn)
  1992. {
  1993. int offset;
  1994. WARN_ON(!dev->ib_uc_qpns_bitmap);
  1995. offset = bitmap_find_free_region(dev->ib_uc_qpns_bitmap,
  1996. dev->steer_qpn_count,
  1997. get_count_order(count));
  1998. if (offset < 0)
  1999. return offset;
  2000. *qpn = dev->steer_qpn_base + offset;
  2001. return 0;
  2002. }
  2003. void mlx4_ib_steer_qp_free(struct mlx4_ib_dev *dev, u32 qpn, int count)
  2004. {
  2005. if (!qpn ||
  2006. dev->steering_support != MLX4_STEERING_MODE_DEVICE_MANAGED)
  2007. return;
  2008. BUG_ON(qpn < dev->steer_qpn_base);
  2009. bitmap_release_region(dev->ib_uc_qpns_bitmap,
  2010. qpn - dev->steer_qpn_base,
  2011. get_count_order(count));
  2012. }
  2013. int mlx4_ib_steer_qp_reg(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
  2014. int is_attach)
  2015. {
  2016. int err;
  2017. size_t flow_size;
  2018. struct ib_flow_attr *flow = NULL;
  2019. struct ib_flow_spec_ib *ib_spec;
  2020. if (is_attach) {
  2021. flow_size = sizeof(struct ib_flow_attr) +
  2022. sizeof(struct ib_flow_spec_ib);
  2023. flow = kzalloc(flow_size, GFP_KERNEL);
  2024. if (!flow)
  2025. return -ENOMEM;
  2026. flow->port = mqp->port;
  2027. flow->num_of_specs = 1;
  2028. flow->size = flow_size;
  2029. ib_spec = (struct ib_flow_spec_ib *)(flow + 1);
  2030. ib_spec->type = IB_FLOW_SPEC_IB;
  2031. ib_spec->size = sizeof(struct ib_flow_spec_ib);
  2032. /* Add an empty rule for IB L2 */
  2033. memset(&ib_spec->mask, 0, sizeof(ib_spec->mask));
  2034. err = __mlx4_ib_create_flow(&mqp->ibqp, flow,
  2035. IB_FLOW_DOMAIN_NIC,
  2036. MLX4_FS_REGULAR,
  2037. &mqp->reg_id);
  2038. } else {
  2039. err = __mlx4_ib_destroy_flow(mdev->dev, mqp->reg_id);
  2040. }
  2041. kfree(flow);
  2042. return err;
  2043. }
  2044. static void mlx4_ib_remove(struct mlx4_dev *dev, void *ibdev_ptr)
  2045. {
  2046. struct mlx4_ib_dev *ibdev = ibdev_ptr;
  2047. int p;
  2048. ibdev->ib_active = false;
  2049. flush_workqueue(wq);
  2050. mlx4_ib_close_sriov(ibdev);
  2051. mlx4_ib_mad_cleanup(ibdev);
  2052. ib_unregister_device(&ibdev->ib_dev);
  2053. if (ibdev->iboe.nb.notifier_call) {
  2054. if (unregister_netdevice_notifier(&ibdev->iboe.nb))
  2055. pr_warn("failure unregistering notifier\n");
  2056. ibdev->iboe.nb.notifier_call = NULL;
  2057. }
  2058. if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED) {
  2059. mlx4_qp_release_range(dev, ibdev->steer_qpn_base,
  2060. ibdev->steer_qpn_count);
  2061. kfree(ibdev->ib_uc_qpns_bitmap);
  2062. }
  2063. if (ibdev->iboe.nb_inet.notifier_call) {
  2064. if (unregister_inetaddr_notifier(&ibdev->iboe.nb_inet))
  2065. pr_warn("failure unregistering notifier\n");
  2066. ibdev->iboe.nb_inet.notifier_call = NULL;
  2067. }
  2068. #if IS_ENABLED(CONFIG_IPV6)
  2069. if (ibdev->iboe.nb_inet6.notifier_call) {
  2070. if (unregister_inet6addr_notifier(&ibdev->iboe.nb_inet6))
  2071. pr_warn("failure unregistering notifier\n");
  2072. ibdev->iboe.nb_inet6.notifier_call = NULL;
  2073. }
  2074. #endif
  2075. iounmap(ibdev->uar_map);
  2076. for (p = 0; p < ibdev->num_ports; ++p)
  2077. if (ibdev->counters[p] != -1)
  2078. mlx4_counter_free(ibdev->dev, ibdev->counters[p]);
  2079. mlx4_foreach_port(p, dev, MLX4_PORT_TYPE_IB)
  2080. mlx4_CLOSE_PORT(dev, p);
  2081. mlx4_ib_free_eqs(dev, ibdev);
  2082. mlx4_uar_free(dev, &ibdev->priv_uar);
  2083. mlx4_pd_free(dev, ibdev->priv_pdn);
  2084. ib_dealloc_device(&ibdev->ib_dev);
  2085. }
  2086. static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init)
  2087. {
  2088. struct mlx4_ib_demux_work **dm = NULL;
  2089. struct mlx4_dev *dev = ibdev->dev;
  2090. int i;
  2091. unsigned long flags;
  2092. struct mlx4_active_ports actv_ports;
  2093. unsigned int ports;
  2094. unsigned int first_port;
  2095. if (!mlx4_is_master(dev))
  2096. return;
  2097. actv_ports = mlx4_get_active_ports(dev, slave);
  2098. ports = bitmap_weight(actv_ports.ports, dev->caps.num_ports);
  2099. first_port = find_first_bit(actv_ports.ports, dev->caps.num_ports);
  2100. dm = kcalloc(ports, sizeof(*dm), GFP_ATOMIC);
  2101. if (!dm) {
  2102. pr_err("failed to allocate memory for tunneling qp update\n");
  2103. goto out;
  2104. }
  2105. for (i = 0; i < ports; i++) {
  2106. dm[i] = kmalloc(sizeof (struct mlx4_ib_demux_work), GFP_ATOMIC);
  2107. if (!dm[i]) {
  2108. pr_err("failed to allocate memory for tunneling qp update work struct\n");
  2109. for (i = 0; i < dev->caps.num_ports; i++) {
  2110. if (dm[i])
  2111. kfree(dm[i]);
  2112. }
  2113. goto out;
  2114. }
  2115. }
  2116. /* initialize or tear down tunnel QPs for the slave */
  2117. for (i = 0; i < ports; i++) {
  2118. INIT_WORK(&dm[i]->work, mlx4_ib_tunnels_update_work);
  2119. dm[i]->port = first_port + i + 1;
  2120. dm[i]->slave = slave;
  2121. dm[i]->do_init = do_init;
  2122. dm[i]->dev = ibdev;
  2123. spin_lock_irqsave(&ibdev->sriov.going_down_lock, flags);
  2124. if (!ibdev->sriov.is_going_down)
  2125. queue_work(ibdev->sriov.demux[i].ud_wq, &dm[i]->work);
  2126. spin_unlock_irqrestore(&ibdev->sriov.going_down_lock, flags);
  2127. }
  2128. out:
  2129. kfree(dm);
  2130. return;
  2131. }
  2132. static void mlx4_ib_event(struct mlx4_dev *dev, void *ibdev_ptr,
  2133. enum mlx4_dev_event event, unsigned long param)
  2134. {
  2135. struct ib_event ibev;
  2136. struct mlx4_ib_dev *ibdev = to_mdev((struct ib_device *) ibdev_ptr);
  2137. struct mlx4_eqe *eqe = NULL;
  2138. struct ib_event_work *ew;
  2139. int p = 0;
  2140. if (event == MLX4_DEV_EVENT_PORT_MGMT_CHANGE)
  2141. eqe = (struct mlx4_eqe *)param;
  2142. else
  2143. p = (int) param;
  2144. switch (event) {
  2145. case MLX4_DEV_EVENT_PORT_UP:
  2146. if (p > ibdev->num_ports)
  2147. return;
  2148. if (mlx4_is_master(dev) &&
  2149. rdma_port_get_link_layer(&ibdev->ib_dev, p) ==
  2150. IB_LINK_LAYER_INFINIBAND) {
  2151. mlx4_ib_invalidate_all_guid_record(ibdev, p);
  2152. }
  2153. ibev.event = IB_EVENT_PORT_ACTIVE;
  2154. break;
  2155. case MLX4_DEV_EVENT_PORT_DOWN:
  2156. if (p > ibdev->num_ports)
  2157. return;
  2158. ibev.event = IB_EVENT_PORT_ERR;
  2159. break;
  2160. case MLX4_DEV_EVENT_CATASTROPHIC_ERROR:
  2161. ibdev->ib_active = false;
  2162. ibev.event = IB_EVENT_DEVICE_FATAL;
  2163. break;
  2164. case MLX4_DEV_EVENT_PORT_MGMT_CHANGE:
  2165. ew = kmalloc(sizeof *ew, GFP_ATOMIC);
  2166. if (!ew) {
  2167. pr_err("failed to allocate memory for events work\n");
  2168. break;
  2169. }
  2170. INIT_WORK(&ew->work, handle_port_mgmt_change_event);
  2171. memcpy(&ew->ib_eqe, eqe, sizeof *eqe);
  2172. ew->ib_dev = ibdev;
  2173. /* need to queue only for port owner, which uses GEN_EQE */
  2174. if (mlx4_is_master(dev))
  2175. queue_work(wq, &ew->work);
  2176. else
  2177. handle_port_mgmt_change_event(&ew->work);
  2178. return;
  2179. case MLX4_DEV_EVENT_SLAVE_INIT:
  2180. /* here, p is the slave id */
  2181. do_slave_init(ibdev, p, 1);
  2182. return;
  2183. case MLX4_DEV_EVENT_SLAVE_SHUTDOWN:
  2184. /* here, p is the slave id */
  2185. do_slave_init(ibdev, p, 0);
  2186. return;
  2187. default:
  2188. return;
  2189. }
  2190. ibev.device = ibdev_ptr;
  2191. ibev.element.port_num = (u8) p;
  2192. ib_dispatch_event(&ibev);
  2193. }
  2194. static struct mlx4_interface mlx4_ib_interface = {
  2195. .add = mlx4_ib_add,
  2196. .remove = mlx4_ib_remove,
  2197. .event = mlx4_ib_event,
  2198. .protocol = MLX4_PROT_IB_IPV6
  2199. };
  2200. static int __init mlx4_ib_init(void)
  2201. {
  2202. int err;
  2203. wq = create_singlethread_workqueue("mlx4_ib");
  2204. if (!wq)
  2205. return -ENOMEM;
  2206. err = mlx4_ib_mcg_init();
  2207. if (err)
  2208. goto clean_wq;
  2209. err = mlx4_register_interface(&mlx4_ib_interface);
  2210. if (err)
  2211. goto clean_mcg;
  2212. return 0;
  2213. clean_mcg:
  2214. mlx4_ib_mcg_destroy();
  2215. clean_wq:
  2216. destroy_workqueue(wq);
  2217. return err;
  2218. }
  2219. static void __exit mlx4_ib_cleanup(void)
  2220. {
  2221. mlx4_unregister_interface(&mlx4_ib_interface);
  2222. mlx4_ib_mcg_destroy();
  2223. destroy_workqueue(wq);
  2224. }
  2225. module_init(mlx4_ib_init);
  2226. module_exit(mlx4_ib_cleanup);