radeon_irq_kms.c 14 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515
  1. /*
  2. * Copyright 2008 Advanced Micro Devices, Inc.
  3. * Copyright 2008 Red Hat Inc.
  4. * Copyright 2009 Jerome Glisse.
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the "Software"),
  8. * to deal in the Software without restriction, including without limitation
  9. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10. * and/or sell copies of the Software, and to permit persons to whom the
  11. * Software is furnished to do so, subject to the following conditions:
  12. *
  13. * The above copyright notice and this permission notice shall be included in
  14. * all copies or substantial portions of the Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22. * OTHER DEALINGS IN THE SOFTWARE.
  23. *
  24. * Authors: Dave Airlie
  25. * Alex Deucher
  26. * Jerome Glisse
  27. */
  28. #include <drm/drmP.h>
  29. #include <drm/drm_crtc_helper.h>
  30. #include <drm/radeon_drm.h>
  31. #include "radeon_reg.h"
  32. #include "radeon.h"
  33. #include "atom.h"
  34. #include <linux/pm_runtime.h>
  35. #define RADEON_WAIT_IDLE_TIMEOUT 200
  36. /**
  37. * radeon_driver_irq_handler_kms - irq handler for KMS
  38. *
  39. * @int irq, void *arg: args
  40. *
  41. * This is the irq handler for the radeon KMS driver (all asics).
  42. * radeon_irq_process is a macro that points to the per-asic
  43. * irq handler callback.
  44. */
  45. irqreturn_t radeon_driver_irq_handler_kms(int irq, void *arg)
  46. {
  47. struct drm_device *dev = (struct drm_device *) arg;
  48. struct radeon_device *rdev = dev->dev_private;
  49. irqreturn_t ret;
  50. ret = radeon_irq_process(rdev);
  51. if (ret == IRQ_HANDLED)
  52. pm_runtime_mark_last_busy(dev->dev);
  53. return ret;
  54. }
  55. /*
  56. * Handle hotplug events outside the interrupt handler proper.
  57. */
  58. /**
  59. * radeon_hotplug_work_func - display hotplug work handler
  60. *
  61. * @work: work struct
  62. *
  63. * This is the hot plug event work handler (all asics).
  64. * The work gets scheduled from the irq handler if there
  65. * was a hot plug interrupt. It walks the connector table
  66. * and calls the hotplug handler for each one, then sends
  67. * a drm hotplug event to alert userspace.
  68. */
  69. static void radeon_hotplug_work_func(struct work_struct *work)
  70. {
  71. struct radeon_device *rdev = container_of(work, struct radeon_device,
  72. hotplug_work);
  73. struct drm_device *dev = rdev->ddev;
  74. struct drm_mode_config *mode_config = &dev->mode_config;
  75. struct drm_connector *connector;
  76. if (mode_config->num_connector) {
  77. list_for_each_entry(connector, &mode_config->connector_list, head)
  78. radeon_connector_hotplug(connector);
  79. }
  80. /* Just fire off a uevent and let userspace tell us what to do */
  81. drm_helper_hpd_irq_event(dev);
  82. }
  83. /**
  84. * radeon_driver_irq_preinstall_kms - drm irq preinstall callback
  85. *
  86. * @dev: drm dev pointer
  87. *
  88. * Gets the hw ready to enable irqs (all asics).
  89. * This function disables all interrupt sources on the GPU.
  90. */
  91. void radeon_driver_irq_preinstall_kms(struct drm_device *dev)
  92. {
  93. struct radeon_device *rdev = dev->dev_private;
  94. unsigned long irqflags;
  95. unsigned i;
  96. spin_lock_irqsave(&rdev->irq.lock, irqflags);
  97. /* Disable *all* interrupts */
  98. for (i = 0; i < RADEON_NUM_RINGS; i++)
  99. atomic_set(&rdev->irq.ring_int[i], 0);
  100. rdev->irq.dpm_thermal = false;
  101. for (i = 0; i < RADEON_MAX_HPD_PINS; i++)
  102. rdev->irq.hpd[i] = false;
  103. for (i = 0; i < RADEON_MAX_CRTCS; i++) {
  104. rdev->irq.crtc_vblank_int[i] = false;
  105. atomic_set(&rdev->irq.pflip[i], 0);
  106. rdev->irq.afmt[i] = false;
  107. }
  108. radeon_irq_set(rdev);
  109. spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
  110. /* Clear bits */
  111. radeon_irq_process(rdev);
  112. }
  113. /**
  114. * radeon_driver_irq_postinstall_kms - drm irq preinstall callback
  115. *
  116. * @dev: drm dev pointer
  117. *
  118. * Handles stuff to be done after enabling irqs (all asics).
  119. * Returns 0 on success.
  120. */
  121. int radeon_driver_irq_postinstall_kms(struct drm_device *dev)
  122. {
  123. dev->max_vblank_count = 0x001fffff;
  124. return 0;
  125. }
  126. /**
  127. * radeon_driver_irq_uninstall_kms - drm irq uninstall callback
  128. *
  129. * @dev: drm dev pointer
  130. *
  131. * This function disables all interrupt sources on the GPU (all asics).
  132. */
  133. void radeon_driver_irq_uninstall_kms(struct drm_device *dev)
  134. {
  135. struct radeon_device *rdev = dev->dev_private;
  136. unsigned long irqflags;
  137. unsigned i;
  138. if (rdev == NULL) {
  139. return;
  140. }
  141. spin_lock_irqsave(&rdev->irq.lock, irqflags);
  142. /* Disable *all* interrupts */
  143. for (i = 0; i < RADEON_NUM_RINGS; i++)
  144. atomic_set(&rdev->irq.ring_int[i], 0);
  145. rdev->irq.dpm_thermal = false;
  146. for (i = 0; i < RADEON_MAX_HPD_PINS; i++)
  147. rdev->irq.hpd[i] = false;
  148. for (i = 0; i < RADEON_MAX_CRTCS; i++) {
  149. rdev->irq.crtc_vblank_int[i] = false;
  150. atomic_set(&rdev->irq.pflip[i], 0);
  151. rdev->irq.afmt[i] = false;
  152. }
  153. radeon_irq_set(rdev);
  154. spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
  155. }
  156. /**
  157. * radeon_msi_ok - asic specific msi checks
  158. *
  159. * @rdev: radeon device pointer
  160. *
  161. * Handles asic specific MSI checks to determine if
  162. * MSIs should be enabled on a particular chip (all asics).
  163. * Returns true if MSIs should be enabled, false if MSIs
  164. * should not be enabled.
  165. */
  166. static bool radeon_msi_ok(struct radeon_device *rdev)
  167. {
  168. /* RV370/RV380 was first asic with MSI support */
  169. if (rdev->family < CHIP_RV380)
  170. return false;
  171. /* MSIs don't work on AGP */
  172. if (rdev->flags & RADEON_IS_AGP)
  173. return false;
  174. /*
  175. * Older chips have a HW limitation, they can only generate 40 bits
  176. * of address for "64-bit" MSIs which breaks on some platforms, notably
  177. * IBM POWER servers, so we limit them
  178. */
  179. if (rdev->family < CHIP_BONAIRE) {
  180. dev_info(rdev->dev, "radeon: MSI limited to 32-bit\n");
  181. rdev->pdev->no_64bit_msi = 1;
  182. }
  183. /* force MSI on */
  184. if (radeon_msi == 1)
  185. return true;
  186. else if (radeon_msi == 0)
  187. return false;
  188. /* Quirks */
  189. /* HP RS690 only seems to work with MSIs. */
  190. if ((rdev->pdev->device == 0x791f) &&
  191. (rdev->pdev->subsystem_vendor == 0x103c) &&
  192. (rdev->pdev->subsystem_device == 0x30c2))
  193. return true;
  194. /* Dell RS690 only seems to work with MSIs. */
  195. if ((rdev->pdev->device == 0x791f) &&
  196. (rdev->pdev->subsystem_vendor == 0x1028) &&
  197. (rdev->pdev->subsystem_device == 0x01fc))
  198. return true;
  199. /* Dell RS690 only seems to work with MSIs. */
  200. if ((rdev->pdev->device == 0x791f) &&
  201. (rdev->pdev->subsystem_vendor == 0x1028) &&
  202. (rdev->pdev->subsystem_device == 0x01fd))
  203. return true;
  204. /* Gateway RS690 only seems to work with MSIs. */
  205. if ((rdev->pdev->device == 0x791f) &&
  206. (rdev->pdev->subsystem_vendor == 0x107b) &&
  207. (rdev->pdev->subsystem_device == 0x0185))
  208. return true;
  209. /* try and enable MSIs by default on all RS690s */
  210. if (rdev->family == CHIP_RS690)
  211. return true;
  212. /* RV515 seems to have MSI issues where it loses
  213. * MSI rearms occasionally. This leads to lockups and freezes.
  214. * disable it by default.
  215. */
  216. if (rdev->family == CHIP_RV515)
  217. return false;
  218. if (rdev->flags & RADEON_IS_IGP) {
  219. /* APUs work fine with MSIs */
  220. if (rdev->family >= CHIP_PALM)
  221. return true;
  222. /* lots of IGPs have problems with MSIs */
  223. return false;
  224. }
  225. return true;
  226. }
  227. /**
  228. * radeon_irq_kms_init - init driver interrupt info
  229. *
  230. * @rdev: radeon device pointer
  231. *
  232. * Sets up the work irq handlers, vblank init, MSIs, etc. (all asics).
  233. * Returns 0 for success, error for failure.
  234. */
  235. int radeon_irq_kms_init(struct radeon_device *rdev)
  236. {
  237. int r = 0;
  238. spin_lock_init(&rdev->irq.lock);
  239. r = drm_vblank_init(rdev->ddev, rdev->num_crtc);
  240. if (r) {
  241. return r;
  242. }
  243. /* enable msi */
  244. rdev->msi_enabled = 0;
  245. if (radeon_msi_ok(rdev)) {
  246. int ret = pci_enable_msi(rdev->pdev);
  247. if (!ret) {
  248. rdev->msi_enabled = 1;
  249. dev_info(rdev->dev, "radeon: using MSI.\n");
  250. }
  251. }
  252. INIT_WORK(&rdev->hotplug_work, radeon_hotplug_work_func);
  253. INIT_WORK(&rdev->audio_work, r600_audio_update_hdmi);
  254. rdev->irq.installed = true;
  255. r = drm_irq_install(rdev->ddev, rdev->ddev->pdev->irq);
  256. if (r) {
  257. rdev->irq.installed = false;
  258. flush_work(&rdev->hotplug_work);
  259. return r;
  260. }
  261. DRM_INFO("radeon: irq initialized.\n");
  262. return 0;
  263. }
  264. /**
  265. * radeon_irq_kms_fini - tear down driver interrupt info
  266. *
  267. * @rdev: radeon device pointer
  268. *
  269. * Tears down the work irq handlers, vblank handlers, MSIs, etc. (all asics).
  270. */
  271. void radeon_irq_kms_fini(struct radeon_device *rdev)
  272. {
  273. drm_vblank_cleanup(rdev->ddev);
  274. if (rdev->irq.installed) {
  275. drm_irq_uninstall(rdev->ddev);
  276. rdev->irq.installed = false;
  277. if (rdev->msi_enabled)
  278. pci_disable_msi(rdev->pdev);
  279. flush_work(&rdev->hotplug_work);
  280. }
  281. }
  282. /**
  283. * radeon_irq_kms_sw_irq_get - enable software interrupt
  284. *
  285. * @rdev: radeon device pointer
  286. * @ring: ring whose interrupt you want to enable
  287. *
  288. * Enables the software interrupt for a specific ring (all asics).
  289. * The software interrupt is generally used to signal a fence on
  290. * a particular ring.
  291. */
  292. void radeon_irq_kms_sw_irq_get(struct radeon_device *rdev, int ring)
  293. {
  294. unsigned long irqflags;
  295. if (!rdev->ddev->irq_enabled)
  296. return;
  297. if (atomic_inc_return(&rdev->irq.ring_int[ring]) == 1) {
  298. spin_lock_irqsave(&rdev->irq.lock, irqflags);
  299. radeon_irq_set(rdev);
  300. spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
  301. }
  302. }
  303. /**
  304. * radeon_irq_kms_sw_irq_get_delayed - enable software interrupt
  305. *
  306. * @rdev: radeon device pointer
  307. * @ring: ring whose interrupt you want to enable
  308. *
  309. * Enables the software interrupt for a specific ring (all asics).
  310. * The software interrupt is generally used to signal a fence on
  311. * a particular ring.
  312. */
  313. bool radeon_irq_kms_sw_irq_get_delayed(struct radeon_device *rdev, int ring)
  314. {
  315. return atomic_inc_return(&rdev->irq.ring_int[ring]) == 1;
  316. }
  317. /**
  318. * radeon_irq_kms_sw_irq_put - disable software interrupt
  319. *
  320. * @rdev: radeon device pointer
  321. * @ring: ring whose interrupt you want to disable
  322. *
  323. * Disables the software interrupt for a specific ring (all asics).
  324. * The software interrupt is generally used to signal a fence on
  325. * a particular ring.
  326. */
  327. void radeon_irq_kms_sw_irq_put(struct radeon_device *rdev, int ring)
  328. {
  329. unsigned long irqflags;
  330. if (!rdev->ddev->irq_enabled)
  331. return;
  332. if (atomic_dec_and_test(&rdev->irq.ring_int[ring])) {
  333. spin_lock_irqsave(&rdev->irq.lock, irqflags);
  334. radeon_irq_set(rdev);
  335. spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
  336. }
  337. }
  338. /**
  339. * radeon_irq_kms_pflip_irq_get - enable pageflip interrupt
  340. *
  341. * @rdev: radeon device pointer
  342. * @crtc: crtc whose interrupt you want to enable
  343. *
  344. * Enables the pageflip interrupt for a specific crtc (all asics).
  345. * For pageflips we use the vblank interrupt source.
  346. */
  347. void radeon_irq_kms_pflip_irq_get(struct radeon_device *rdev, int crtc)
  348. {
  349. unsigned long irqflags;
  350. if (crtc < 0 || crtc >= rdev->num_crtc)
  351. return;
  352. if (!rdev->ddev->irq_enabled)
  353. return;
  354. if (atomic_inc_return(&rdev->irq.pflip[crtc]) == 1) {
  355. spin_lock_irqsave(&rdev->irq.lock, irqflags);
  356. radeon_irq_set(rdev);
  357. spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
  358. }
  359. }
  360. /**
  361. * radeon_irq_kms_pflip_irq_put - disable pageflip interrupt
  362. *
  363. * @rdev: radeon device pointer
  364. * @crtc: crtc whose interrupt you want to disable
  365. *
  366. * Disables the pageflip interrupt for a specific crtc (all asics).
  367. * For pageflips we use the vblank interrupt source.
  368. */
  369. void radeon_irq_kms_pflip_irq_put(struct radeon_device *rdev, int crtc)
  370. {
  371. unsigned long irqflags;
  372. if (crtc < 0 || crtc >= rdev->num_crtc)
  373. return;
  374. if (!rdev->ddev->irq_enabled)
  375. return;
  376. if (atomic_dec_and_test(&rdev->irq.pflip[crtc])) {
  377. spin_lock_irqsave(&rdev->irq.lock, irqflags);
  378. radeon_irq_set(rdev);
  379. spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
  380. }
  381. }
  382. /**
  383. * radeon_irq_kms_enable_afmt - enable audio format change interrupt
  384. *
  385. * @rdev: radeon device pointer
  386. * @block: afmt block whose interrupt you want to enable
  387. *
  388. * Enables the afmt change interrupt for a specific afmt block (all asics).
  389. */
  390. void radeon_irq_kms_enable_afmt(struct radeon_device *rdev, int block)
  391. {
  392. unsigned long irqflags;
  393. if (!rdev->ddev->irq_enabled)
  394. return;
  395. spin_lock_irqsave(&rdev->irq.lock, irqflags);
  396. rdev->irq.afmt[block] = true;
  397. radeon_irq_set(rdev);
  398. spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
  399. }
  400. /**
  401. * radeon_irq_kms_disable_afmt - disable audio format change interrupt
  402. *
  403. * @rdev: radeon device pointer
  404. * @block: afmt block whose interrupt you want to disable
  405. *
  406. * Disables the afmt change interrupt for a specific afmt block (all asics).
  407. */
  408. void radeon_irq_kms_disable_afmt(struct radeon_device *rdev, int block)
  409. {
  410. unsigned long irqflags;
  411. if (!rdev->ddev->irq_enabled)
  412. return;
  413. spin_lock_irqsave(&rdev->irq.lock, irqflags);
  414. rdev->irq.afmt[block] = false;
  415. radeon_irq_set(rdev);
  416. spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
  417. }
  418. /**
  419. * radeon_irq_kms_enable_hpd - enable hotplug detect interrupt
  420. *
  421. * @rdev: radeon device pointer
  422. * @hpd_mask: mask of hpd pins you want to enable.
  423. *
  424. * Enables the hotplug detect interrupt for a specific hpd pin (all asics).
  425. */
  426. void radeon_irq_kms_enable_hpd(struct radeon_device *rdev, unsigned hpd_mask)
  427. {
  428. unsigned long irqflags;
  429. int i;
  430. if (!rdev->ddev->irq_enabled)
  431. return;
  432. spin_lock_irqsave(&rdev->irq.lock, irqflags);
  433. for (i = 0; i < RADEON_MAX_HPD_PINS; ++i)
  434. rdev->irq.hpd[i] |= !!(hpd_mask & (1 << i));
  435. radeon_irq_set(rdev);
  436. spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
  437. }
  438. /**
  439. * radeon_irq_kms_disable_hpd - disable hotplug detect interrupt
  440. *
  441. * @rdev: radeon device pointer
  442. * @hpd_mask: mask of hpd pins you want to disable.
  443. *
  444. * Disables the hotplug detect interrupt for a specific hpd pin (all asics).
  445. */
  446. void radeon_irq_kms_disable_hpd(struct radeon_device *rdev, unsigned hpd_mask)
  447. {
  448. unsigned long irqflags;
  449. int i;
  450. if (!rdev->ddev->irq_enabled)
  451. return;
  452. spin_lock_irqsave(&rdev->irq.lock, irqflags);
  453. for (i = 0; i < RADEON_MAX_HPD_PINS; ++i)
  454. rdev->irq.hpd[i] &= !(hpd_mask & (1 << i));
  455. radeon_irq_set(rdev);
  456. spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
  457. }