aesni-intel_glue.c 44 KB

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  1. /*
  2. * Support for Intel AES-NI instructions. This file contains glue
  3. * code, the real AES implementation is in intel-aes_asm.S.
  4. *
  5. * Copyright (C) 2008, Intel Corp.
  6. * Author: Huang Ying <ying.huang@intel.com>
  7. *
  8. * Added RFC4106 AES-GCM support for 128-bit keys under the AEAD
  9. * interface for 64-bit kernels.
  10. * Authors: Adrian Hoban <adrian.hoban@intel.com>
  11. * Gabriele Paoloni <gabriele.paoloni@intel.com>
  12. * Tadeusz Struk (tadeusz.struk@intel.com)
  13. * Aidan O'Mahony (aidan.o.mahony@intel.com)
  14. * Copyright (c) 2010, Intel Corporation.
  15. *
  16. * This program is free software; you can redistribute it and/or modify
  17. * it under the terms of the GNU General Public License as published by
  18. * the Free Software Foundation; either version 2 of the License, or
  19. * (at your option) any later version.
  20. */
  21. #include <linux/hardirq.h>
  22. #include <linux/types.h>
  23. #include <linux/crypto.h>
  24. #include <linux/module.h>
  25. #include <linux/err.h>
  26. #include <crypto/algapi.h>
  27. #include <crypto/aes.h>
  28. #include <crypto/cryptd.h>
  29. #include <crypto/ctr.h>
  30. #include <crypto/b128ops.h>
  31. #include <crypto/lrw.h>
  32. #include <crypto/xts.h>
  33. #include <asm/cpu_device_id.h>
  34. #include <asm/i387.h>
  35. #include <asm/crypto/aes.h>
  36. #include <crypto/ablk_helper.h>
  37. #include <crypto/scatterwalk.h>
  38. #include <crypto/internal/aead.h>
  39. #include <linux/workqueue.h>
  40. #include <linux/spinlock.h>
  41. #ifdef CONFIG_X86_64
  42. #include <asm/crypto/glue_helper.h>
  43. #endif
  44. /* This data is stored at the end of the crypto_tfm struct.
  45. * It's a type of per "session" data storage location.
  46. * This needs to be 16 byte aligned.
  47. */
  48. struct aesni_rfc4106_gcm_ctx {
  49. u8 hash_subkey[16];
  50. struct crypto_aes_ctx aes_key_expanded;
  51. u8 nonce[4];
  52. struct cryptd_aead *cryptd_tfm;
  53. };
  54. struct aesni_gcm_set_hash_subkey_result {
  55. int err;
  56. struct completion completion;
  57. };
  58. struct aesni_hash_subkey_req_data {
  59. u8 iv[16];
  60. struct aesni_gcm_set_hash_subkey_result result;
  61. struct scatterlist sg;
  62. };
  63. #define AESNI_ALIGN (16)
  64. #define AES_BLOCK_MASK (~(AES_BLOCK_SIZE-1))
  65. #define RFC4106_HASH_SUBKEY_SIZE 16
  66. struct aesni_lrw_ctx {
  67. struct lrw_table_ctx lrw_table;
  68. u8 raw_aes_ctx[sizeof(struct crypto_aes_ctx) + AESNI_ALIGN - 1];
  69. };
  70. struct aesni_xts_ctx {
  71. u8 raw_tweak_ctx[sizeof(struct crypto_aes_ctx) + AESNI_ALIGN - 1];
  72. u8 raw_crypt_ctx[sizeof(struct crypto_aes_ctx) + AESNI_ALIGN - 1];
  73. };
  74. asmlinkage int aesni_set_key(struct crypto_aes_ctx *ctx, const u8 *in_key,
  75. unsigned int key_len);
  76. asmlinkage void aesni_enc(struct crypto_aes_ctx *ctx, u8 *out,
  77. const u8 *in);
  78. asmlinkage void aesni_dec(struct crypto_aes_ctx *ctx, u8 *out,
  79. const u8 *in);
  80. asmlinkage void aesni_ecb_enc(struct crypto_aes_ctx *ctx, u8 *out,
  81. const u8 *in, unsigned int len);
  82. asmlinkage void aesni_ecb_dec(struct crypto_aes_ctx *ctx, u8 *out,
  83. const u8 *in, unsigned int len);
  84. asmlinkage void aesni_cbc_enc(struct crypto_aes_ctx *ctx, u8 *out,
  85. const u8 *in, unsigned int len, u8 *iv);
  86. asmlinkage void aesni_cbc_dec(struct crypto_aes_ctx *ctx, u8 *out,
  87. const u8 *in, unsigned int len, u8 *iv);
  88. int crypto_fpu_init(void);
  89. void crypto_fpu_exit(void);
  90. #define AVX_GEN2_OPTSIZE 640
  91. #define AVX_GEN4_OPTSIZE 4096
  92. #ifdef CONFIG_X86_64
  93. static void (*aesni_ctr_enc_tfm)(struct crypto_aes_ctx *ctx, u8 *out,
  94. const u8 *in, unsigned int len, u8 *iv);
  95. asmlinkage void aesni_ctr_enc(struct crypto_aes_ctx *ctx, u8 *out,
  96. const u8 *in, unsigned int len, u8 *iv);
  97. asmlinkage void aesni_xts_crypt8(struct crypto_aes_ctx *ctx, u8 *out,
  98. const u8 *in, bool enc, u8 *iv);
  99. /* asmlinkage void aesni_gcm_enc()
  100. * void *ctx, AES Key schedule. Starts on a 16 byte boundary.
  101. * u8 *out, Ciphertext output. Encrypt in-place is allowed.
  102. * const u8 *in, Plaintext input
  103. * unsigned long plaintext_len, Length of data in bytes for encryption.
  104. * u8 *iv, Pre-counter block j0: 4 byte salt (from Security Association)
  105. * concatenated with 8 byte Initialisation Vector (from IPSec ESP
  106. * Payload) concatenated with 0x00000001. 16-byte aligned pointer.
  107. * u8 *hash_subkey, the Hash sub key input. Data starts on a 16-byte boundary.
  108. * const u8 *aad, Additional Authentication Data (AAD)
  109. * unsigned long aad_len, Length of AAD in bytes. With RFC4106 this
  110. * is going to be 8 or 12 bytes
  111. * u8 *auth_tag, Authenticated Tag output.
  112. * unsigned long auth_tag_len), Authenticated Tag Length in bytes.
  113. * Valid values are 16 (most likely), 12 or 8.
  114. */
  115. asmlinkage void aesni_gcm_enc(void *ctx, u8 *out,
  116. const u8 *in, unsigned long plaintext_len, u8 *iv,
  117. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  118. u8 *auth_tag, unsigned long auth_tag_len);
  119. /* asmlinkage void aesni_gcm_dec()
  120. * void *ctx, AES Key schedule. Starts on a 16 byte boundary.
  121. * u8 *out, Plaintext output. Decrypt in-place is allowed.
  122. * const u8 *in, Ciphertext input
  123. * unsigned long ciphertext_len, Length of data in bytes for decryption.
  124. * u8 *iv, Pre-counter block j0: 4 byte salt (from Security Association)
  125. * concatenated with 8 byte Initialisation Vector (from IPSec ESP
  126. * Payload) concatenated with 0x00000001. 16-byte aligned pointer.
  127. * u8 *hash_subkey, the Hash sub key input. Data starts on a 16-byte boundary.
  128. * const u8 *aad, Additional Authentication Data (AAD)
  129. * unsigned long aad_len, Length of AAD in bytes. With RFC4106 this is going
  130. * to be 8 or 12 bytes
  131. * u8 *auth_tag, Authenticated Tag output.
  132. * unsigned long auth_tag_len) Authenticated Tag Length in bytes.
  133. * Valid values are 16 (most likely), 12 or 8.
  134. */
  135. asmlinkage void aesni_gcm_dec(void *ctx, u8 *out,
  136. const u8 *in, unsigned long ciphertext_len, u8 *iv,
  137. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  138. u8 *auth_tag, unsigned long auth_tag_len);
  139. #ifdef CONFIG_AS_AVX
  140. asmlinkage void aes_ctr_enc_128_avx_by8(const u8 *in, u8 *iv,
  141. void *keys, u8 *out, unsigned int num_bytes);
  142. asmlinkage void aes_ctr_enc_192_avx_by8(const u8 *in, u8 *iv,
  143. void *keys, u8 *out, unsigned int num_bytes);
  144. asmlinkage void aes_ctr_enc_256_avx_by8(const u8 *in, u8 *iv,
  145. void *keys, u8 *out, unsigned int num_bytes);
  146. /*
  147. * asmlinkage void aesni_gcm_precomp_avx_gen2()
  148. * gcm_data *my_ctx_data, context data
  149. * u8 *hash_subkey, the Hash sub key input. Data starts on a 16-byte boundary.
  150. */
  151. asmlinkage void aesni_gcm_precomp_avx_gen2(void *my_ctx_data, u8 *hash_subkey);
  152. asmlinkage void aesni_gcm_enc_avx_gen2(void *ctx, u8 *out,
  153. const u8 *in, unsigned long plaintext_len, u8 *iv,
  154. const u8 *aad, unsigned long aad_len,
  155. u8 *auth_tag, unsigned long auth_tag_len);
  156. asmlinkage void aesni_gcm_dec_avx_gen2(void *ctx, u8 *out,
  157. const u8 *in, unsigned long ciphertext_len, u8 *iv,
  158. const u8 *aad, unsigned long aad_len,
  159. u8 *auth_tag, unsigned long auth_tag_len);
  160. static void aesni_gcm_enc_avx(void *ctx, u8 *out,
  161. const u8 *in, unsigned long plaintext_len, u8 *iv,
  162. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  163. u8 *auth_tag, unsigned long auth_tag_len)
  164. {
  165. if (plaintext_len < AVX_GEN2_OPTSIZE) {
  166. aesni_gcm_enc(ctx, out, in, plaintext_len, iv, hash_subkey, aad,
  167. aad_len, auth_tag, auth_tag_len);
  168. } else {
  169. aesni_gcm_precomp_avx_gen2(ctx, hash_subkey);
  170. aesni_gcm_enc_avx_gen2(ctx, out, in, plaintext_len, iv, aad,
  171. aad_len, auth_tag, auth_tag_len);
  172. }
  173. }
  174. static void aesni_gcm_dec_avx(void *ctx, u8 *out,
  175. const u8 *in, unsigned long ciphertext_len, u8 *iv,
  176. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  177. u8 *auth_tag, unsigned long auth_tag_len)
  178. {
  179. if (ciphertext_len < AVX_GEN2_OPTSIZE) {
  180. aesni_gcm_dec(ctx, out, in, ciphertext_len, iv, hash_subkey, aad,
  181. aad_len, auth_tag, auth_tag_len);
  182. } else {
  183. aesni_gcm_precomp_avx_gen2(ctx, hash_subkey);
  184. aesni_gcm_dec_avx_gen2(ctx, out, in, ciphertext_len, iv, aad,
  185. aad_len, auth_tag, auth_tag_len);
  186. }
  187. }
  188. #endif
  189. #ifdef CONFIG_AS_AVX2
  190. /*
  191. * asmlinkage void aesni_gcm_precomp_avx_gen4()
  192. * gcm_data *my_ctx_data, context data
  193. * u8 *hash_subkey, the Hash sub key input. Data starts on a 16-byte boundary.
  194. */
  195. asmlinkage void aesni_gcm_precomp_avx_gen4(void *my_ctx_data, u8 *hash_subkey);
  196. asmlinkage void aesni_gcm_enc_avx_gen4(void *ctx, u8 *out,
  197. const u8 *in, unsigned long plaintext_len, u8 *iv,
  198. const u8 *aad, unsigned long aad_len,
  199. u8 *auth_tag, unsigned long auth_tag_len);
  200. asmlinkage void aesni_gcm_dec_avx_gen4(void *ctx, u8 *out,
  201. const u8 *in, unsigned long ciphertext_len, u8 *iv,
  202. const u8 *aad, unsigned long aad_len,
  203. u8 *auth_tag, unsigned long auth_tag_len);
  204. static void aesni_gcm_enc_avx2(void *ctx, u8 *out,
  205. const u8 *in, unsigned long plaintext_len, u8 *iv,
  206. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  207. u8 *auth_tag, unsigned long auth_tag_len)
  208. {
  209. if (plaintext_len < AVX_GEN2_OPTSIZE) {
  210. aesni_gcm_enc(ctx, out, in, plaintext_len, iv, hash_subkey, aad,
  211. aad_len, auth_tag, auth_tag_len);
  212. } else if (plaintext_len < AVX_GEN4_OPTSIZE) {
  213. aesni_gcm_precomp_avx_gen2(ctx, hash_subkey);
  214. aesni_gcm_enc_avx_gen2(ctx, out, in, plaintext_len, iv, aad,
  215. aad_len, auth_tag, auth_tag_len);
  216. } else {
  217. aesni_gcm_precomp_avx_gen4(ctx, hash_subkey);
  218. aesni_gcm_enc_avx_gen4(ctx, out, in, plaintext_len, iv, aad,
  219. aad_len, auth_tag, auth_tag_len);
  220. }
  221. }
  222. static void aesni_gcm_dec_avx2(void *ctx, u8 *out,
  223. const u8 *in, unsigned long ciphertext_len, u8 *iv,
  224. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  225. u8 *auth_tag, unsigned long auth_tag_len)
  226. {
  227. if (ciphertext_len < AVX_GEN2_OPTSIZE) {
  228. aesni_gcm_dec(ctx, out, in, ciphertext_len, iv, hash_subkey,
  229. aad, aad_len, auth_tag, auth_tag_len);
  230. } else if (ciphertext_len < AVX_GEN4_OPTSIZE) {
  231. aesni_gcm_precomp_avx_gen2(ctx, hash_subkey);
  232. aesni_gcm_dec_avx_gen2(ctx, out, in, ciphertext_len, iv, aad,
  233. aad_len, auth_tag, auth_tag_len);
  234. } else {
  235. aesni_gcm_precomp_avx_gen4(ctx, hash_subkey);
  236. aesni_gcm_dec_avx_gen4(ctx, out, in, ciphertext_len, iv, aad,
  237. aad_len, auth_tag, auth_tag_len);
  238. }
  239. }
  240. #endif
  241. static void (*aesni_gcm_enc_tfm)(void *ctx, u8 *out,
  242. const u8 *in, unsigned long plaintext_len, u8 *iv,
  243. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  244. u8 *auth_tag, unsigned long auth_tag_len);
  245. static void (*aesni_gcm_dec_tfm)(void *ctx, u8 *out,
  246. const u8 *in, unsigned long ciphertext_len, u8 *iv,
  247. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  248. u8 *auth_tag, unsigned long auth_tag_len);
  249. static inline struct
  250. aesni_rfc4106_gcm_ctx *aesni_rfc4106_gcm_ctx_get(struct crypto_aead *tfm)
  251. {
  252. return
  253. (struct aesni_rfc4106_gcm_ctx *)
  254. PTR_ALIGN((u8 *)
  255. crypto_tfm_ctx(crypto_aead_tfm(tfm)), AESNI_ALIGN);
  256. }
  257. #endif
  258. static inline struct crypto_aes_ctx *aes_ctx(void *raw_ctx)
  259. {
  260. unsigned long addr = (unsigned long)raw_ctx;
  261. unsigned long align = AESNI_ALIGN;
  262. if (align <= crypto_tfm_ctx_alignment())
  263. align = 1;
  264. return (struct crypto_aes_ctx *)ALIGN(addr, align);
  265. }
  266. static int aes_set_key_common(struct crypto_tfm *tfm, void *raw_ctx,
  267. const u8 *in_key, unsigned int key_len)
  268. {
  269. struct crypto_aes_ctx *ctx = aes_ctx(raw_ctx);
  270. u32 *flags = &tfm->crt_flags;
  271. int err;
  272. if (key_len != AES_KEYSIZE_128 && key_len != AES_KEYSIZE_192 &&
  273. key_len != AES_KEYSIZE_256) {
  274. *flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
  275. return -EINVAL;
  276. }
  277. if (!irq_fpu_usable())
  278. err = crypto_aes_expand_key(ctx, in_key, key_len);
  279. else {
  280. kernel_fpu_begin();
  281. err = aesni_set_key(ctx, in_key, key_len);
  282. kernel_fpu_end();
  283. }
  284. return err;
  285. }
  286. static int aes_set_key(struct crypto_tfm *tfm, const u8 *in_key,
  287. unsigned int key_len)
  288. {
  289. return aes_set_key_common(tfm, crypto_tfm_ctx(tfm), in_key, key_len);
  290. }
  291. static void aes_encrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  292. {
  293. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  294. if (!irq_fpu_usable())
  295. crypto_aes_encrypt_x86(ctx, dst, src);
  296. else {
  297. kernel_fpu_begin();
  298. aesni_enc(ctx, dst, src);
  299. kernel_fpu_end();
  300. }
  301. }
  302. static void aes_decrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  303. {
  304. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  305. if (!irq_fpu_usable())
  306. crypto_aes_decrypt_x86(ctx, dst, src);
  307. else {
  308. kernel_fpu_begin();
  309. aesni_dec(ctx, dst, src);
  310. kernel_fpu_end();
  311. }
  312. }
  313. static void __aes_encrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  314. {
  315. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  316. aesni_enc(ctx, dst, src);
  317. }
  318. static void __aes_decrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  319. {
  320. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  321. aesni_dec(ctx, dst, src);
  322. }
  323. static int ecb_encrypt(struct blkcipher_desc *desc,
  324. struct scatterlist *dst, struct scatterlist *src,
  325. unsigned int nbytes)
  326. {
  327. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  328. struct blkcipher_walk walk;
  329. int err;
  330. blkcipher_walk_init(&walk, dst, src, nbytes);
  331. err = blkcipher_walk_virt(desc, &walk);
  332. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  333. kernel_fpu_begin();
  334. while ((nbytes = walk.nbytes)) {
  335. aesni_ecb_enc(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  336. nbytes & AES_BLOCK_MASK);
  337. nbytes &= AES_BLOCK_SIZE - 1;
  338. err = blkcipher_walk_done(desc, &walk, nbytes);
  339. }
  340. kernel_fpu_end();
  341. return err;
  342. }
  343. static int ecb_decrypt(struct blkcipher_desc *desc,
  344. struct scatterlist *dst, struct scatterlist *src,
  345. unsigned int nbytes)
  346. {
  347. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  348. struct blkcipher_walk walk;
  349. int err;
  350. blkcipher_walk_init(&walk, dst, src, nbytes);
  351. err = blkcipher_walk_virt(desc, &walk);
  352. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  353. kernel_fpu_begin();
  354. while ((nbytes = walk.nbytes)) {
  355. aesni_ecb_dec(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  356. nbytes & AES_BLOCK_MASK);
  357. nbytes &= AES_BLOCK_SIZE - 1;
  358. err = blkcipher_walk_done(desc, &walk, nbytes);
  359. }
  360. kernel_fpu_end();
  361. return err;
  362. }
  363. static int cbc_encrypt(struct blkcipher_desc *desc,
  364. struct scatterlist *dst, struct scatterlist *src,
  365. unsigned int nbytes)
  366. {
  367. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  368. struct blkcipher_walk walk;
  369. int err;
  370. blkcipher_walk_init(&walk, dst, src, nbytes);
  371. err = blkcipher_walk_virt(desc, &walk);
  372. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  373. kernel_fpu_begin();
  374. while ((nbytes = walk.nbytes)) {
  375. aesni_cbc_enc(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  376. nbytes & AES_BLOCK_MASK, walk.iv);
  377. nbytes &= AES_BLOCK_SIZE - 1;
  378. err = blkcipher_walk_done(desc, &walk, nbytes);
  379. }
  380. kernel_fpu_end();
  381. return err;
  382. }
  383. static int cbc_decrypt(struct blkcipher_desc *desc,
  384. struct scatterlist *dst, struct scatterlist *src,
  385. unsigned int nbytes)
  386. {
  387. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  388. struct blkcipher_walk walk;
  389. int err;
  390. blkcipher_walk_init(&walk, dst, src, nbytes);
  391. err = blkcipher_walk_virt(desc, &walk);
  392. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  393. kernel_fpu_begin();
  394. while ((nbytes = walk.nbytes)) {
  395. aesni_cbc_dec(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  396. nbytes & AES_BLOCK_MASK, walk.iv);
  397. nbytes &= AES_BLOCK_SIZE - 1;
  398. err = blkcipher_walk_done(desc, &walk, nbytes);
  399. }
  400. kernel_fpu_end();
  401. return err;
  402. }
  403. #ifdef CONFIG_X86_64
  404. static void ctr_crypt_final(struct crypto_aes_ctx *ctx,
  405. struct blkcipher_walk *walk)
  406. {
  407. u8 *ctrblk = walk->iv;
  408. u8 keystream[AES_BLOCK_SIZE];
  409. u8 *src = walk->src.virt.addr;
  410. u8 *dst = walk->dst.virt.addr;
  411. unsigned int nbytes = walk->nbytes;
  412. aesni_enc(ctx, keystream, ctrblk);
  413. crypto_xor(keystream, src, nbytes);
  414. memcpy(dst, keystream, nbytes);
  415. crypto_inc(ctrblk, AES_BLOCK_SIZE);
  416. }
  417. #ifdef CONFIG_AS_AVX
  418. static void aesni_ctr_enc_avx_tfm(struct crypto_aes_ctx *ctx, u8 *out,
  419. const u8 *in, unsigned int len, u8 *iv)
  420. {
  421. /*
  422. * based on key length, override with the by8 version
  423. * of ctr mode encryption/decryption for improved performance
  424. * aes_set_key_common() ensures that key length is one of
  425. * {128,192,256}
  426. */
  427. if (ctx->key_length == AES_KEYSIZE_128)
  428. aes_ctr_enc_128_avx_by8(in, iv, (void *)ctx, out, len);
  429. else if (ctx->key_length == AES_KEYSIZE_192)
  430. aes_ctr_enc_192_avx_by8(in, iv, (void *)ctx, out, len);
  431. else
  432. aes_ctr_enc_256_avx_by8(in, iv, (void *)ctx, out, len);
  433. }
  434. #endif
  435. static int ctr_crypt(struct blkcipher_desc *desc,
  436. struct scatterlist *dst, struct scatterlist *src,
  437. unsigned int nbytes)
  438. {
  439. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  440. struct blkcipher_walk walk;
  441. int err;
  442. blkcipher_walk_init(&walk, dst, src, nbytes);
  443. err = blkcipher_walk_virt_block(desc, &walk, AES_BLOCK_SIZE);
  444. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  445. kernel_fpu_begin();
  446. while ((nbytes = walk.nbytes) >= AES_BLOCK_SIZE) {
  447. aesni_ctr_enc_tfm(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  448. nbytes & AES_BLOCK_MASK, walk.iv);
  449. nbytes &= AES_BLOCK_SIZE - 1;
  450. err = blkcipher_walk_done(desc, &walk, nbytes);
  451. }
  452. if (walk.nbytes) {
  453. ctr_crypt_final(ctx, &walk);
  454. err = blkcipher_walk_done(desc, &walk, 0);
  455. }
  456. kernel_fpu_end();
  457. return err;
  458. }
  459. #endif
  460. static int ablk_ecb_init(struct crypto_tfm *tfm)
  461. {
  462. return ablk_init_common(tfm, "__driver-ecb-aes-aesni");
  463. }
  464. static int ablk_cbc_init(struct crypto_tfm *tfm)
  465. {
  466. return ablk_init_common(tfm, "__driver-cbc-aes-aesni");
  467. }
  468. #ifdef CONFIG_X86_64
  469. static int ablk_ctr_init(struct crypto_tfm *tfm)
  470. {
  471. return ablk_init_common(tfm, "__driver-ctr-aes-aesni");
  472. }
  473. #endif
  474. #if IS_ENABLED(CONFIG_CRYPTO_PCBC)
  475. static int ablk_pcbc_init(struct crypto_tfm *tfm)
  476. {
  477. return ablk_init_common(tfm, "fpu(pcbc(__driver-aes-aesni))");
  478. }
  479. #endif
  480. static void lrw_xts_encrypt_callback(void *ctx, u8 *blks, unsigned int nbytes)
  481. {
  482. aesni_ecb_enc(ctx, blks, blks, nbytes);
  483. }
  484. static void lrw_xts_decrypt_callback(void *ctx, u8 *blks, unsigned int nbytes)
  485. {
  486. aesni_ecb_dec(ctx, blks, blks, nbytes);
  487. }
  488. static int lrw_aesni_setkey(struct crypto_tfm *tfm, const u8 *key,
  489. unsigned int keylen)
  490. {
  491. struct aesni_lrw_ctx *ctx = crypto_tfm_ctx(tfm);
  492. int err;
  493. err = aes_set_key_common(tfm, ctx->raw_aes_ctx, key,
  494. keylen - AES_BLOCK_SIZE);
  495. if (err)
  496. return err;
  497. return lrw_init_table(&ctx->lrw_table, key + keylen - AES_BLOCK_SIZE);
  498. }
  499. static void lrw_aesni_exit_tfm(struct crypto_tfm *tfm)
  500. {
  501. struct aesni_lrw_ctx *ctx = crypto_tfm_ctx(tfm);
  502. lrw_free_table(&ctx->lrw_table);
  503. }
  504. static int lrw_encrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
  505. struct scatterlist *src, unsigned int nbytes)
  506. {
  507. struct aesni_lrw_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
  508. be128 buf[8];
  509. struct lrw_crypt_req req = {
  510. .tbuf = buf,
  511. .tbuflen = sizeof(buf),
  512. .table_ctx = &ctx->lrw_table,
  513. .crypt_ctx = aes_ctx(ctx->raw_aes_ctx),
  514. .crypt_fn = lrw_xts_encrypt_callback,
  515. };
  516. int ret;
  517. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  518. kernel_fpu_begin();
  519. ret = lrw_crypt(desc, dst, src, nbytes, &req);
  520. kernel_fpu_end();
  521. return ret;
  522. }
  523. static int lrw_decrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
  524. struct scatterlist *src, unsigned int nbytes)
  525. {
  526. struct aesni_lrw_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
  527. be128 buf[8];
  528. struct lrw_crypt_req req = {
  529. .tbuf = buf,
  530. .tbuflen = sizeof(buf),
  531. .table_ctx = &ctx->lrw_table,
  532. .crypt_ctx = aes_ctx(ctx->raw_aes_ctx),
  533. .crypt_fn = lrw_xts_decrypt_callback,
  534. };
  535. int ret;
  536. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  537. kernel_fpu_begin();
  538. ret = lrw_crypt(desc, dst, src, nbytes, &req);
  539. kernel_fpu_end();
  540. return ret;
  541. }
  542. static int xts_aesni_setkey(struct crypto_tfm *tfm, const u8 *key,
  543. unsigned int keylen)
  544. {
  545. struct aesni_xts_ctx *ctx = crypto_tfm_ctx(tfm);
  546. u32 *flags = &tfm->crt_flags;
  547. int err;
  548. /* key consists of keys of equal size concatenated, therefore
  549. * the length must be even
  550. */
  551. if (keylen % 2) {
  552. *flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
  553. return -EINVAL;
  554. }
  555. /* first half of xts-key is for crypt */
  556. err = aes_set_key_common(tfm, ctx->raw_crypt_ctx, key, keylen / 2);
  557. if (err)
  558. return err;
  559. /* second half of xts-key is for tweak */
  560. return aes_set_key_common(tfm, ctx->raw_tweak_ctx, key + keylen / 2,
  561. keylen / 2);
  562. }
  563. static void aesni_xts_tweak(void *ctx, u8 *out, const u8 *in)
  564. {
  565. aesni_enc(ctx, out, in);
  566. }
  567. #ifdef CONFIG_X86_64
  568. static void aesni_xts_enc(void *ctx, u128 *dst, const u128 *src, le128 *iv)
  569. {
  570. glue_xts_crypt_128bit_one(ctx, dst, src, iv, GLUE_FUNC_CAST(aesni_enc));
  571. }
  572. static void aesni_xts_dec(void *ctx, u128 *dst, const u128 *src, le128 *iv)
  573. {
  574. glue_xts_crypt_128bit_one(ctx, dst, src, iv, GLUE_FUNC_CAST(aesni_dec));
  575. }
  576. static void aesni_xts_enc8(void *ctx, u128 *dst, const u128 *src, le128 *iv)
  577. {
  578. aesni_xts_crypt8(ctx, (u8 *)dst, (const u8 *)src, true, (u8 *)iv);
  579. }
  580. static void aesni_xts_dec8(void *ctx, u128 *dst, const u128 *src, le128 *iv)
  581. {
  582. aesni_xts_crypt8(ctx, (u8 *)dst, (const u8 *)src, false, (u8 *)iv);
  583. }
  584. static const struct common_glue_ctx aesni_enc_xts = {
  585. .num_funcs = 2,
  586. .fpu_blocks_limit = 1,
  587. .funcs = { {
  588. .num_blocks = 8,
  589. .fn_u = { .xts = GLUE_XTS_FUNC_CAST(aesni_xts_enc8) }
  590. }, {
  591. .num_blocks = 1,
  592. .fn_u = { .xts = GLUE_XTS_FUNC_CAST(aesni_xts_enc) }
  593. } }
  594. };
  595. static const struct common_glue_ctx aesni_dec_xts = {
  596. .num_funcs = 2,
  597. .fpu_blocks_limit = 1,
  598. .funcs = { {
  599. .num_blocks = 8,
  600. .fn_u = { .xts = GLUE_XTS_FUNC_CAST(aesni_xts_dec8) }
  601. }, {
  602. .num_blocks = 1,
  603. .fn_u = { .xts = GLUE_XTS_FUNC_CAST(aesni_xts_dec) }
  604. } }
  605. };
  606. static int xts_encrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
  607. struct scatterlist *src, unsigned int nbytes)
  608. {
  609. struct aesni_xts_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
  610. return glue_xts_crypt_128bit(&aesni_enc_xts, desc, dst, src, nbytes,
  611. XTS_TWEAK_CAST(aesni_xts_tweak),
  612. aes_ctx(ctx->raw_tweak_ctx),
  613. aes_ctx(ctx->raw_crypt_ctx));
  614. }
  615. static int xts_decrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
  616. struct scatterlist *src, unsigned int nbytes)
  617. {
  618. struct aesni_xts_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
  619. return glue_xts_crypt_128bit(&aesni_dec_xts, desc, dst, src, nbytes,
  620. XTS_TWEAK_CAST(aesni_xts_tweak),
  621. aes_ctx(ctx->raw_tweak_ctx),
  622. aes_ctx(ctx->raw_crypt_ctx));
  623. }
  624. #else
  625. static int xts_encrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
  626. struct scatterlist *src, unsigned int nbytes)
  627. {
  628. struct aesni_xts_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
  629. be128 buf[8];
  630. struct xts_crypt_req req = {
  631. .tbuf = buf,
  632. .tbuflen = sizeof(buf),
  633. .tweak_ctx = aes_ctx(ctx->raw_tweak_ctx),
  634. .tweak_fn = aesni_xts_tweak,
  635. .crypt_ctx = aes_ctx(ctx->raw_crypt_ctx),
  636. .crypt_fn = lrw_xts_encrypt_callback,
  637. };
  638. int ret;
  639. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  640. kernel_fpu_begin();
  641. ret = xts_crypt(desc, dst, src, nbytes, &req);
  642. kernel_fpu_end();
  643. return ret;
  644. }
  645. static int xts_decrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
  646. struct scatterlist *src, unsigned int nbytes)
  647. {
  648. struct aesni_xts_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
  649. be128 buf[8];
  650. struct xts_crypt_req req = {
  651. .tbuf = buf,
  652. .tbuflen = sizeof(buf),
  653. .tweak_ctx = aes_ctx(ctx->raw_tweak_ctx),
  654. .tweak_fn = aesni_xts_tweak,
  655. .crypt_ctx = aes_ctx(ctx->raw_crypt_ctx),
  656. .crypt_fn = lrw_xts_decrypt_callback,
  657. };
  658. int ret;
  659. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  660. kernel_fpu_begin();
  661. ret = xts_crypt(desc, dst, src, nbytes, &req);
  662. kernel_fpu_end();
  663. return ret;
  664. }
  665. #endif
  666. #ifdef CONFIG_X86_64
  667. static int rfc4106_init(struct crypto_tfm *tfm)
  668. {
  669. struct cryptd_aead *cryptd_tfm;
  670. struct aesni_rfc4106_gcm_ctx *ctx = (struct aesni_rfc4106_gcm_ctx *)
  671. PTR_ALIGN((u8 *)crypto_tfm_ctx(tfm), AESNI_ALIGN);
  672. struct crypto_aead *cryptd_child;
  673. struct aesni_rfc4106_gcm_ctx *child_ctx;
  674. cryptd_tfm = cryptd_alloc_aead("__driver-gcm-aes-aesni", 0, 0);
  675. if (IS_ERR(cryptd_tfm))
  676. return PTR_ERR(cryptd_tfm);
  677. cryptd_child = cryptd_aead_child(cryptd_tfm);
  678. child_ctx = aesni_rfc4106_gcm_ctx_get(cryptd_child);
  679. memcpy(child_ctx, ctx, sizeof(*ctx));
  680. ctx->cryptd_tfm = cryptd_tfm;
  681. tfm->crt_aead.reqsize = sizeof(struct aead_request)
  682. + crypto_aead_reqsize(&cryptd_tfm->base);
  683. return 0;
  684. }
  685. static void rfc4106_exit(struct crypto_tfm *tfm)
  686. {
  687. struct aesni_rfc4106_gcm_ctx *ctx =
  688. (struct aesni_rfc4106_gcm_ctx *)
  689. PTR_ALIGN((u8 *)crypto_tfm_ctx(tfm), AESNI_ALIGN);
  690. if (!IS_ERR(ctx->cryptd_tfm))
  691. cryptd_free_aead(ctx->cryptd_tfm);
  692. return;
  693. }
  694. static void
  695. rfc4106_set_hash_subkey_done(struct crypto_async_request *req, int err)
  696. {
  697. struct aesni_gcm_set_hash_subkey_result *result = req->data;
  698. if (err == -EINPROGRESS)
  699. return;
  700. result->err = err;
  701. complete(&result->completion);
  702. }
  703. static int
  704. rfc4106_set_hash_subkey(u8 *hash_subkey, const u8 *key, unsigned int key_len)
  705. {
  706. struct crypto_ablkcipher *ctr_tfm;
  707. struct ablkcipher_request *req;
  708. int ret = -EINVAL;
  709. struct aesni_hash_subkey_req_data *req_data;
  710. ctr_tfm = crypto_alloc_ablkcipher("ctr(aes)", 0, 0);
  711. if (IS_ERR(ctr_tfm))
  712. return PTR_ERR(ctr_tfm);
  713. crypto_ablkcipher_clear_flags(ctr_tfm, ~0);
  714. ret = crypto_ablkcipher_setkey(ctr_tfm, key, key_len);
  715. if (ret)
  716. goto out_free_ablkcipher;
  717. ret = -ENOMEM;
  718. req = ablkcipher_request_alloc(ctr_tfm, GFP_KERNEL);
  719. if (!req)
  720. goto out_free_ablkcipher;
  721. req_data = kmalloc(sizeof(*req_data), GFP_KERNEL);
  722. if (!req_data)
  723. goto out_free_request;
  724. memset(req_data->iv, 0, sizeof(req_data->iv));
  725. /* Clear the data in the hash sub key container to zero.*/
  726. /* We want to cipher all zeros to create the hash sub key. */
  727. memset(hash_subkey, 0, RFC4106_HASH_SUBKEY_SIZE);
  728. init_completion(&req_data->result.completion);
  729. sg_init_one(&req_data->sg, hash_subkey, RFC4106_HASH_SUBKEY_SIZE);
  730. ablkcipher_request_set_tfm(req, ctr_tfm);
  731. ablkcipher_request_set_callback(req, CRYPTO_TFM_REQ_MAY_SLEEP |
  732. CRYPTO_TFM_REQ_MAY_BACKLOG,
  733. rfc4106_set_hash_subkey_done,
  734. &req_data->result);
  735. ablkcipher_request_set_crypt(req, &req_data->sg,
  736. &req_data->sg, RFC4106_HASH_SUBKEY_SIZE, req_data->iv);
  737. ret = crypto_ablkcipher_encrypt(req);
  738. if (ret == -EINPROGRESS || ret == -EBUSY) {
  739. ret = wait_for_completion_interruptible
  740. (&req_data->result.completion);
  741. if (!ret)
  742. ret = req_data->result.err;
  743. }
  744. kfree(req_data);
  745. out_free_request:
  746. ablkcipher_request_free(req);
  747. out_free_ablkcipher:
  748. crypto_free_ablkcipher(ctr_tfm);
  749. return ret;
  750. }
  751. static int rfc4106_set_key(struct crypto_aead *parent, const u8 *key,
  752. unsigned int key_len)
  753. {
  754. int ret = 0;
  755. struct crypto_tfm *tfm = crypto_aead_tfm(parent);
  756. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(parent);
  757. struct crypto_aead *cryptd_child = cryptd_aead_child(ctx->cryptd_tfm);
  758. struct aesni_rfc4106_gcm_ctx *child_ctx =
  759. aesni_rfc4106_gcm_ctx_get(cryptd_child);
  760. u8 *new_key_align, *new_key_mem = NULL;
  761. if (key_len < 4) {
  762. crypto_tfm_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN);
  763. return -EINVAL;
  764. }
  765. /*Account for 4 byte nonce at the end.*/
  766. key_len -= 4;
  767. if (key_len != AES_KEYSIZE_128) {
  768. crypto_tfm_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN);
  769. return -EINVAL;
  770. }
  771. memcpy(ctx->nonce, key + key_len, sizeof(ctx->nonce));
  772. /*This must be on a 16 byte boundary!*/
  773. if ((unsigned long)(&(ctx->aes_key_expanded.key_enc[0])) % AESNI_ALIGN)
  774. return -EINVAL;
  775. if ((unsigned long)key % AESNI_ALIGN) {
  776. /*key is not aligned: use an auxuliar aligned pointer*/
  777. new_key_mem = kmalloc(key_len+AESNI_ALIGN, GFP_KERNEL);
  778. if (!new_key_mem)
  779. return -ENOMEM;
  780. new_key_align = PTR_ALIGN(new_key_mem, AESNI_ALIGN);
  781. memcpy(new_key_align, key, key_len);
  782. key = new_key_align;
  783. }
  784. if (!irq_fpu_usable())
  785. ret = crypto_aes_expand_key(&(ctx->aes_key_expanded),
  786. key, key_len);
  787. else {
  788. kernel_fpu_begin();
  789. ret = aesni_set_key(&(ctx->aes_key_expanded), key, key_len);
  790. kernel_fpu_end();
  791. }
  792. /*This must be on a 16 byte boundary!*/
  793. if ((unsigned long)(&(ctx->hash_subkey[0])) % AESNI_ALIGN) {
  794. ret = -EINVAL;
  795. goto exit;
  796. }
  797. ret = rfc4106_set_hash_subkey(ctx->hash_subkey, key, key_len);
  798. memcpy(child_ctx, ctx, sizeof(*ctx));
  799. exit:
  800. kfree(new_key_mem);
  801. return ret;
  802. }
  803. /* This is the Integrity Check Value (aka the authentication tag length and can
  804. * be 8, 12 or 16 bytes long. */
  805. static int rfc4106_set_authsize(struct crypto_aead *parent,
  806. unsigned int authsize)
  807. {
  808. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(parent);
  809. struct crypto_aead *cryptd_child = cryptd_aead_child(ctx->cryptd_tfm);
  810. switch (authsize) {
  811. case 8:
  812. case 12:
  813. case 16:
  814. break;
  815. default:
  816. return -EINVAL;
  817. }
  818. crypto_aead_crt(parent)->authsize = authsize;
  819. crypto_aead_crt(cryptd_child)->authsize = authsize;
  820. return 0;
  821. }
  822. static int rfc4106_encrypt(struct aead_request *req)
  823. {
  824. int ret;
  825. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  826. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);
  827. if (!irq_fpu_usable()) {
  828. struct aead_request *cryptd_req =
  829. (struct aead_request *) aead_request_ctx(req);
  830. memcpy(cryptd_req, req, sizeof(*req));
  831. aead_request_set_tfm(cryptd_req, &ctx->cryptd_tfm->base);
  832. return crypto_aead_encrypt(cryptd_req);
  833. } else {
  834. struct crypto_aead *cryptd_child = cryptd_aead_child(ctx->cryptd_tfm);
  835. kernel_fpu_begin();
  836. ret = cryptd_child->base.crt_aead.encrypt(req);
  837. kernel_fpu_end();
  838. return ret;
  839. }
  840. }
  841. static int rfc4106_decrypt(struct aead_request *req)
  842. {
  843. int ret;
  844. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  845. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);
  846. if (!irq_fpu_usable()) {
  847. struct aead_request *cryptd_req =
  848. (struct aead_request *) aead_request_ctx(req);
  849. memcpy(cryptd_req, req, sizeof(*req));
  850. aead_request_set_tfm(cryptd_req, &ctx->cryptd_tfm->base);
  851. return crypto_aead_decrypt(cryptd_req);
  852. } else {
  853. struct crypto_aead *cryptd_child = cryptd_aead_child(ctx->cryptd_tfm);
  854. kernel_fpu_begin();
  855. ret = cryptd_child->base.crt_aead.decrypt(req);
  856. kernel_fpu_end();
  857. return ret;
  858. }
  859. }
  860. static int __driver_rfc4106_encrypt(struct aead_request *req)
  861. {
  862. u8 one_entry_in_sg = 0;
  863. u8 *src, *dst, *assoc;
  864. __be32 counter = cpu_to_be32(1);
  865. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  866. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);
  867. void *aes_ctx = &(ctx->aes_key_expanded);
  868. unsigned long auth_tag_len = crypto_aead_authsize(tfm);
  869. u8 iv_tab[16+AESNI_ALIGN];
  870. u8* iv = (u8 *) PTR_ALIGN((u8 *)iv_tab, AESNI_ALIGN);
  871. struct scatter_walk src_sg_walk;
  872. struct scatter_walk assoc_sg_walk;
  873. struct scatter_walk dst_sg_walk;
  874. unsigned int i;
  875. /* Assuming we are supporting rfc4106 64-bit extended */
  876. /* sequence numbers We need to have the AAD length equal */
  877. /* to 8 or 12 bytes */
  878. if (unlikely(req->assoclen != 8 && req->assoclen != 12))
  879. return -EINVAL;
  880. /* IV below built */
  881. for (i = 0; i < 4; i++)
  882. *(iv+i) = ctx->nonce[i];
  883. for (i = 0; i < 8; i++)
  884. *(iv+4+i) = req->iv[i];
  885. *((__be32 *)(iv+12)) = counter;
  886. if ((sg_is_last(req->src)) && (sg_is_last(req->assoc))) {
  887. one_entry_in_sg = 1;
  888. scatterwalk_start(&src_sg_walk, req->src);
  889. scatterwalk_start(&assoc_sg_walk, req->assoc);
  890. src = scatterwalk_map(&src_sg_walk);
  891. assoc = scatterwalk_map(&assoc_sg_walk);
  892. dst = src;
  893. if (unlikely(req->src != req->dst)) {
  894. scatterwalk_start(&dst_sg_walk, req->dst);
  895. dst = scatterwalk_map(&dst_sg_walk);
  896. }
  897. } else {
  898. /* Allocate memory for src, dst, assoc */
  899. src = kmalloc(req->cryptlen + auth_tag_len + req->assoclen,
  900. GFP_ATOMIC);
  901. if (unlikely(!src))
  902. return -ENOMEM;
  903. assoc = (src + req->cryptlen + auth_tag_len);
  904. scatterwalk_map_and_copy(src, req->src, 0, req->cryptlen, 0);
  905. scatterwalk_map_and_copy(assoc, req->assoc, 0,
  906. req->assoclen, 0);
  907. dst = src;
  908. }
  909. aesni_gcm_enc_tfm(aes_ctx, dst, src, (unsigned long)req->cryptlen, iv,
  910. ctx->hash_subkey, assoc, (unsigned long)req->assoclen, dst
  911. + ((unsigned long)req->cryptlen), auth_tag_len);
  912. /* The authTag (aka the Integrity Check Value) needs to be written
  913. * back to the packet. */
  914. if (one_entry_in_sg) {
  915. if (unlikely(req->src != req->dst)) {
  916. scatterwalk_unmap(dst);
  917. scatterwalk_done(&dst_sg_walk, 0, 0);
  918. }
  919. scatterwalk_unmap(src);
  920. scatterwalk_unmap(assoc);
  921. scatterwalk_done(&src_sg_walk, 0, 0);
  922. scatterwalk_done(&assoc_sg_walk, 0, 0);
  923. } else {
  924. scatterwalk_map_and_copy(dst, req->dst, 0,
  925. req->cryptlen + auth_tag_len, 1);
  926. kfree(src);
  927. }
  928. return 0;
  929. }
  930. static int __driver_rfc4106_decrypt(struct aead_request *req)
  931. {
  932. u8 one_entry_in_sg = 0;
  933. u8 *src, *dst, *assoc;
  934. unsigned long tempCipherLen = 0;
  935. __be32 counter = cpu_to_be32(1);
  936. int retval = 0;
  937. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  938. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);
  939. void *aes_ctx = &(ctx->aes_key_expanded);
  940. unsigned long auth_tag_len = crypto_aead_authsize(tfm);
  941. u8 iv_and_authTag[32+AESNI_ALIGN];
  942. u8 *iv = (u8 *) PTR_ALIGN((u8 *)iv_and_authTag, AESNI_ALIGN);
  943. u8 *authTag = iv + 16;
  944. struct scatter_walk src_sg_walk;
  945. struct scatter_walk assoc_sg_walk;
  946. struct scatter_walk dst_sg_walk;
  947. unsigned int i;
  948. if (unlikely((req->cryptlen < auth_tag_len) ||
  949. (req->assoclen != 8 && req->assoclen != 12)))
  950. return -EINVAL;
  951. /* Assuming we are supporting rfc4106 64-bit extended */
  952. /* sequence numbers We need to have the AAD length */
  953. /* equal to 8 or 12 bytes */
  954. tempCipherLen = (unsigned long)(req->cryptlen - auth_tag_len);
  955. /* IV below built */
  956. for (i = 0; i < 4; i++)
  957. *(iv+i) = ctx->nonce[i];
  958. for (i = 0; i < 8; i++)
  959. *(iv+4+i) = req->iv[i];
  960. *((__be32 *)(iv+12)) = counter;
  961. if ((sg_is_last(req->src)) && (sg_is_last(req->assoc))) {
  962. one_entry_in_sg = 1;
  963. scatterwalk_start(&src_sg_walk, req->src);
  964. scatterwalk_start(&assoc_sg_walk, req->assoc);
  965. src = scatterwalk_map(&src_sg_walk);
  966. assoc = scatterwalk_map(&assoc_sg_walk);
  967. dst = src;
  968. if (unlikely(req->src != req->dst)) {
  969. scatterwalk_start(&dst_sg_walk, req->dst);
  970. dst = scatterwalk_map(&dst_sg_walk);
  971. }
  972. } else {
  973. /* Allocate memory for src, dst, assoc */
  974. src = kmalloc(req->cryptlen + req->assoclen, GFP_ATOMIC);
  975. if (!src)
  976. return -ENOMEM;
  977. assoc = (src + req->cryptlen + auth_tag_len);
  978. scatterwalk_map_and_copy(src, req->src, 0, req->cryptlen, 0);
  979. scatterwalk_map_and_copy(assoc, req->assoc, 0,
  980. req->assoclen, 0);
  981. dst = src;
  982. }
  983. aesni_gcm_dec_tfm(aes_ctx, dst, src, tempCipherLen, iv,
  984. ctx->hash_subkey, assoc, (unsigned long)req->assoclen,
  985. authTag, auth_tag_len);
  986. /* Compare generated tag with passed in tag. */
  987. retval = crypto_memneq(src + tempCipherLen, authTag, auth_tag_len) ?
  988. -EBADMSG : 0;
  989. if (one_entry_in_sg) {
  990. if (unlikely(req->src != req->dst)) {
  991. scatterwalk_unmap(dst);
  992. scatterwalk_done(&dst_sg_walk, 0, 0);
  993. }
  994. scatterwalk_unmap(src);
  995. scatterwalk_unmap(assoc);
  996. scatterwalk_done(&src_sg_walk, 0, 0);
  997. scatterwalk_done(&assoc_sg_walk, 0, 0);
  998. } else {
  999. scatterwalk_map_and_copy(dst, req->dst, 0, req->cryptlen, 1);
  1000. kfree(src);
  1001. }
  1002. return retval;
  1003. }
  1004. #endif
  1005. static struct crypto_alg aesni_algs[] = { {
  1006. .cra_name = "aes",
  1007. .cra_driver_name = "aes-aesni",
  1008. .cra_priority = 300,
  1009. .cra_flags = CRYPTO_ALG_TYPE_CIPHER,
  1010. .cra_blocksize = AES_BLOCK_SIZE,
  1011. .cra_ctxsize = sizeof(struct crypto_aes_ctx) +
  1012. AESNI_ALIGN - 1,
  1013. .cra_alignmask = 0,
  1014. .cra_module = THIS_MODULE,
  1015. .cra_u = {
  1016. .cipher = {
  1017. .cia_min_keysize = AES_MIN_KEY_SIZE,
  1018. .cia_max_keysize = AES_MAX_KEY_SIZE,
  1019. .cia_setkey = aes_set_key,
  1020. .cia_encrypt = aes_encrypt,
  1021. .cia_decrypt = aes_decrypt
  1022. }
  1023. }
  1024. }, {
  1025. .cra_name = "__aes-aesni",
  1026. .cra_driver_name = "__driver-aes-aesni",
  1027. .cra_priority = 0,
  1028. .cra_flags = CRYPTO_ALG_TYPE_CIPHER,
  1029. .cra_blocksize = AES_BLOCK_SIZE,
  1030. .cra_ctxsize = sizeof(struct crypto_aes_ctx) +
  1031. AESNI_ALIGN - 1,
  1032. .cra_alignmask = 0,
  1033. .cra_module = THIS_MODULE,
  1034. .cra_u = {
  1035. .cipher = {
  1036. .cia_min_keysize = AES_MIN_KEY_SIZE,
  1037. .cia_max_keysize = AES_MAX_KEY_SIZE,
  1038. .cia_setkey = aes_set_key,
  1039. .cia_encrypt = __aes_encrypt,
  1040. .cia_decrypt = __aes_decrypt
  1041. }
  1042. }
  1043. }, {
  1044. .cra_name = "__ecb-aes-aesni",
  1045. .cra_driver_name = "__driver-ecb-aes-aesni",
  1046. .cra_priority = 0,
  1047. .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
  1048. .cra_blocksize = AES_BLOCK_SIZE,
  1049. .cra_ctxsize = sizeof(struct crypto_aes_ctx) +
  1050. AESNI_ALIGN - 1,
  1051. .cra_alignmask = 0,
  1052. .cra_type = &crypto_blkcipher_type,
  1053. .cra_module = THIS_MODULE,
  1054. .cra_u = {
  1055. .blkcipher = {
  1056. .min_keysize = AES_MIN_KEY_SIZE,
  1057. .max_keysize = AES_MAX_KEY_SIZE,
  1058. .setkey = aes_set_key,
  1059. .encrypt = ecb_encrypt,
  1060. .decrypt = ecb_decrypt,
  1061. },
  1062. },
  1063. }, {
  1064. .cra_name = "__cbc-aes-aesni",
  1065. .cra_driver_name = "__driver-cbc-aes-aesni",
  1066. .cra_priority = 0,
  1067. .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
  1068. .cra_blocksize = AES_BLOCK_SIZE,
  1069. .cra_ctxsize = sizeof(struct crypto_aes_ctx) +
  1070. AESNI_ALIGN - 1,
  1071. .cra_alignmask = 0,
  1072. .cra_type = &crypto_blkcipher_type,
  1073. .cra_module = THIS_MODULE,
  1074. .cra_u = {
  1075. .blkcipher = {
  1076. .min_keysize = AES_MIN_KEY_SIZE,
  1077. .max_keysize = AES_MAX_KEY_SIZE,
  1078. .setkey = aes_set_key,
  1079. .encrypt = cbc_encrypt,
  1080. .decrypt = cbc_decrypt,
  1081. },
  1082. },
  1083. }, {
  1084. .cra_name = "ecb(aes)",
  1085. .cra_driver_name = "ecb-aes-aesni",
  1086. .cra_priority = 400,
  1087. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  1088. .cra_blocksize = AES_BLOCK_SIZE,
  1089. .cra_ctxsize = sizeof(struct async_helper_ctx),
  1090. .cra_alignmask = 0,
  1091. .cra_type = &crypto_ablkcipher_type,
  1092. .cra_module = THIS_MODULE,
  1093. .cra_init = ablk_ecb_init,
  1094. .cra_exit = ablk_exit,
  1095. .cra_u = {
  1096. .ablkcipher = {
  1097. .min_keysize = AES_MIN_KEY_SIZE,
  1098. .max_keysize = AES_MAX_KEY_SIZE,
  1099. .setkey = ablk_set_key,
  1100. .encrypt = ablk_encrypt,
  1101. .decrypt = ablk_decrypt,
  1102. },
  1103. },
  1104. }, {
  1105. .cra_name = "cbc(aes)",
  1106. .cra_driver_name = "cbc-aes-aesni",
  1107. .cra_priority = 400,
  1108. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  1109. .cra_blocksize = AES_BLOCK_SIZE,
  1110. .cra_ctxsize = sizeof(struct async_helper_ctx),
  1111. .cra_alignmask = 0,
  1112. .cra_type = &crypto_ablkcipher_type,
  1113. .cra_module = THIS_MODULE,
  1114. .cra_init = ablk_cbc_init,
  1115. .cra_exit = ablk_exit,
  1116. .cra_u = {
  1117. .ablkcipher = {
  1118. .min_keysize = AES_MIN_KEY_SIZE,
  1119. .max_keysize = AES_MAX_KEY_SIZE,
  1120. .ivsize = AES_BLOCK_SIZE,
  1121. .setkey = ablk_set_key,
  1122. .encrypt = ablk_encrypt,
  1123. .decrypt = ablk_decrypt,
  1124. },
  1125. },
  1126. #ifdef CONFIG_X86_64
  1127. }, {
  1128. .cra_name = "__ctr-aes-aesni",
  1129. .cra_driver_name = "__driver-ctr-aes-aesni",
  1130. .cra_priority = 0,
  1131. .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
  1132. .cra_blocksize = 1,
  1133. .cra_ctxsize = sizeof(struct crypto_aes_ctx) +
  1134. AESNI_ALIGN - 1,
  1135. .cra_alignmask = 0,
  1136. .cra_type = &crypto_blkcipher_type,
  1137. .cra_module = THIS_MODULE,
  1138. .cra_u = {
  1139. .blkcipher = {
  1140. .min_keysize = AES_MIN_KEY_SIZE,
  1141. .max_keysize = AES_MAX_KEY_SIZE,
  1142. .ivsize = AES_BLOCK_SIZE,
  1143. .setkey = aes_set_key,
  1144. .encrypt = ctr_crypt,
  1145. .decrypt = ctr_crypt,
  1146. },
  1147. },
  1148. }, {
  1149. .cra_name = "ctr(aes)",
  1150. .cra_driver_name = "ctr-aes-aesni",
  1151. .cra_priority = 400,
  1152. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  1153. .cra_blocksize = 1,
  1154. .cra_ctxsize = sizeof(struct async_helper_ctx),
  1155. .cra_alignmask = 0,
  1156. .cra_type = &crypto_ablkcipher_type,
  1157. .cra_module = THIS_MODULE,
  1158. .cra_init = ablk_ctr_init,
  1159. .cra_exit = ablk_exit,
  1160. .cra_u = {
  1161. .ablkcipher = {
  1162. .min_keysize = AES_MIN_KEY_SIZE,
  1163. .max_keysize = AES_MAX_KEY_SIZE,
  1164. .ivsize = AES_BLOCK_SIZE,
  1165. .setkey = ablk_set_key,
  1166. .encrypt = ablk_encrypt,
  1167. .decrypt = ablk_encrypt,
  1168. .geniv = "chainiv",
  1169. },
  1170. },
  1171. }, {
  1172. .cra_name = "__gcm-aes-aesni",
  1173. .cra_driver_name = "__driver-gcm-aes-aesni",
  1174. .cra_priority = 0,
  1175. .cra_flags = CRYPTO_ALG_TYPE_AEAD,
  1176. .cra_blocksize = 1,
  1177. .cra_ctxsize = sizeof(struct aesni_rfc4106_gcm_ctx) +
  1178. AESNI_ALIGN,
  1179. .cra_alignmask = 0,
  1180. .cra_type = &crypto_aead_type,
  1181. .cra_module = THIS_MODULE,
  1182. .cra_u = {
  1183. .aead = {
  1184. .encrypt = __driver_rfc4106_encrypt,
  1185. .decrypt = __driver_rfc4106_decrypt,
  1186. },
  1187. },
  1188. }, {
  1189. .cra_name = "rfc4106(gcm(aes))",
  1190. .cra_driver_name = "rfc4106-gcm-aesni",
  1191. .cra_priority = 400,
  1192. .cra_flags = CRYPTO_ALG_TYPE_AEAD | CRYPTO_ALG_ASYNC,
  1193. .cra_blocksize = 1,
  1194. .cra_ctxsize = sizeof(struct aesni_rfc4106_gcm_ctx) +
  1195. AESNI_ALIGN,
  1196. .cra_alignmask = 0,
  1197. .cra_type = &crypto_nivaead_type,
  1198. .cra_module = THIS_MODULE,
  1199. .cra_init = rfc4106_init,
  1200. .cra_exit = rfc4106_exit,
  1201. .cra_u = {
  1202. .aead = {
  1203. .setkey = rfc4106_set_key,
  1204. .setauthsize = rfc4106_set_authsize,
  1205. .encrypt = rfc4106_encrypt,
  1206. .decrypt = rfc4106_decrypt,
  1207. .geniv = "seqiv",
  1208. .ivsize = 8,
  1209. .maxauthsize = 16,
  1210. },
  1211. },
  1212. #endif
  1213. #if IS_ENABLED(CONFIG_CRYPTO_PCBC)
  1214. }, {
  1215. .cra_name = "pcbc(aes)",
  1216. .cra_driver_name = "pcbc-aes-aesni",
  1217. .cra_priority = 400,
  1218. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  1219. .cra_blocksize = AES_BLOCK_SIZE,
  1220. .cra_ctxsize = sizeof(struct async_helper_ctx),
  1221. .cra_alignmask = 0,
  1222. .cra_type = &crypto_ablkcipher_type,
  1223. .cra_module = THIS_MODULE,
  1224. .cra_init = ablk_pcbc_init,
  1225. .cra_exit = ablk_exit,
  1226. .cra_u = {
  1227. .ablkcipher = {
  1228. .min_keysize = AES_MIN_KEY_SIZE,
  1229. .max_keysize = AES_MAX_KEY_SIZE,
  1230. .ivsize = AES_BLOCK_SIZE,
  1231. .setkey = ablk_set_key,
  1232. .encrypt = ablk_encrypt,
  1233. .decrypt = ablk_decrypt,
  1234. },
  1235. },
  1236. #endif
  1237. }, {
  1238. .cra_name = "__lrw-aes-aesni",
  1239. .cra_driver_name = "__driver-lrw-aes-aesni",
  1240. .cra_priority = 0,
  1241. .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
  1242. .cra_blocksize = AES_BLOCK_SIZE,
  1243. .cra_ctxsize = sizeof(struct aesni_lrw_ctx),
  1244. .cra_alignmask = 0,
  1245. .cra_type = &crypto_blkcipher_type,
  1246. .cra_module = THIS_MODULE,
  1247. .cra_exit = lrw_aesni_exit_tfm,
  1248. .cra_u = {
  1249. .blkcipher = {
  1250. .min_keysize = AES_MIN_KEY_SIZE + AES_BLOCK_SIZE,
  1251. .max_keysize = AES_MAX_KEY_SIZE + AES_BLOCK_SIZE,
  1252. .ivsize = AES_BLOCK_SIZE,
  1253. .setkey = lrw_aesni_setkey,
  1254. .encrypt = lrw_encrypt,
  1255. .decrypt = lrw_decrypt,
  1256. },
  1257. },
  1258. }, {
  1259. .cra_name = "__xts-aes-aesni",
  1260. .cra_driver_name = "__driver-xts-aes-aesni",
  1261. .cra_priority = 0,
  1262. .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
  1263. .cra_blocksize = AES_BLOCK_SIZE,
  1264. .cra_ctxsize = sizeof(struct aesni_xts_ctx),
  1265. .cra_alignmask = 0,
  1266. .cra_type = &crypto_blkcipher_type,
  1267. .cra_module = THIS_MODULE,
  1268. .cra_u = {
  1269. .blkcipher = {
  1270. .min_keysize = 2 * AES_MIN_KEY_SIZE,
  1271. .max_keysize = 2 * AES_MAX_KEY_SIZE,
  1272. .ivsize = AES_BLOCK_SIZE,
  1273. .setkey = xts_aesni_setkey,
  1274. .encrypt = xts_encrypt,
  1275. .decrypt = xts_decrypt,
  1276. },
  1277. },
  1278. }, {
  1279. .cra_name = "lrw(aes)",
  1280. .cra_driver_name = "lrw-aes-aesni",
  1281. .cra_priority = 400,
  1282. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  1283. .cra_blocksize = AES_BLOCK_SIZE,
  1284. .cra_ctxsize = sizeof(struct async_helper_ctx),
  1285. .cra_alignmask = 0,
  1286. .cra_type = &crypto_ablkcipher_type,
  1287. .cra_module = THIS_MODULE,
  1288. .cra_init = ablk_init,
  1289. .cra_exit = ablk_exit,
  1290. .cra_u = {
  1291. .ablkcipher = {
  1292. .min_keysize = AES_MIN_KEY_SIZE + AES_BLOCK_SIZE,
  1293. .max_keysize = AES_MAX_KEY_SIZE + AES_BLOCK_SIZE,
  1294. .ivsize = AES_BLOCK_SIZE,
  1295. .setkey = ablk_set_key,
  1296. .encrypt = ablk_encrypt,
  1297. .decrypt = ablk_decrypt,
  1298. },
  1299. },
  1300. }, {
  1301. .cra_name = "xts(aes)",
  1302. .cra_driver_name = "xts-aes-aesni",
  1303. .cra_priority = 400,
  1304. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  1305. .cra_blocksize = AES_BLOCK_SIZE,
  1306. .cra_ctxsize = sizeof(struct async_helper_ctx),
  1307. .cra_alignmask = 0,
  1308. .cra_type = &crypto_ablkcipher_type,
  1309. .cra_module = THIS_MODULE,
  1310. .cra_init = ablk_init,
  1311. .cra_exit = ablk_exit,
  1312. .cra_u = {
  1313. .ablkcipher = {
  1314. .min_keysize = 2 * AES_MIN_KEY_SIZE,
  1315. .max_keysize = 2 * AES_MAX_KEY_SIZE,
  1316. .ivsize = AES_BLOCK_SIZE,
  1317. .setkey = ablk_set_key,
  1318. .encrypt = ablk_encrypt,
  1319. .decrypt = ablk_decrypt,
  1320. },
  1321. },
  1322. } };
  1323. static const struct x86_cpu_id aesni_cpu_id[] = {
  1324. X86_FEATURE_MATCH(X86_FEATURE_AES),
  1325. {}
  1326. };
  1327. MODULE_DEVICE_TABLE(x86cpu, aesni_cpu_id);
  1328. static int __init aesni_init(void)
  1329. {
  1330. int err;
  1331. if (!x86_match_cpu(aesni_cpu_id))
  1332. return -ENODEV;
  1333. #ifdef CONFIG_X86_64
  1334. #ifdef CONFIG_AS_AVX2
  1335. if (boot_cpu_has(X86_FEATURE_AVX2)) {
  1336. pr_info("AVX2 version of gcm_enc/dec engaged.\n");
  1337. aesni_gcm_enc_tfm = aesni_gcm_enc_avx2;
  1338. aesni_gcm_dec_tfm = aesni_gcm_dec_avx2;
  1339. } else
  1340. #endif
  1341. #ifdef CONFIG_AS_AVX
  1342. if (boot_cpu_has(X86_FEATURE_AVX)) {
  1343. pr_info("AVX version of gcm_enc/dec engaged.\n");
  1344. aesni_gcm_enc_tfm = aesni_gcm_enc_avx;
  1345. aesni_gcm_dec_tfm = aesni_gcm_dec_avx;
  1346. } else
  1347. #endif
  1348. {
  1349. pr_info("SSE version of gcm_enc/dec engaged.\n");
  1350. aesni_gcm_enc_tfm = aesni_gcm_enc;
  1351. aesni_gcm_dec_tfm = aesni_gcm_dec;
  1352. }
  1353. aesni_ctr_enc_tfm = aesni_ctr_enc;
  1354. #ifdef CONFIG_AS_AVX
  1355. if (cpu_has_avx) {
  1356. /* optimize performance of ctr mode encryption transform */
  1357. aesni_ctr_enc_tfm = aesni_ctr_enc_avx_tfm;
  1358. pr_info("AES CTR mode by8 optimization enabled\n");
  1359. }
  1360. #endif
  1361. #endif
  1362. err = crypto_fpu_init();
  1363. if (err)
  1364. return err;
  1365. return crypto_register_algs(aesni_algs, ARRAY_SIZE(aesni_algs));
  1366. }
  1367. static void __exit aesni_exit(void)
  1368. {
  1369. crypto_unregister_algs(aesni_algs, ARRAY_SIZE(aesni_algs));
  1370. crypto_fpu_exit();
  1371. }
  1372. module_init(aesni_init);
  1373. module_exit(aesni_exit);
  1374. MODULE_DESCRIPTION("Rijndael (AES) Cipher Algorithm, Intel AES-NI instructions optimized");
  1375. MODULE_LICENSE("GPL");
  1376. MODULE_ALIAS_CRYPTO("aes");