board-lager.c 23 KB

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  1. /*
  2. * Lager board support
  3. *
  4. * Copyright (C) 2013-2014 Renesas Solutions Corp.
  5. * Copyright (C) 2013 Magnus Damm
  6. * Copyright (C) 2014 Cogent Embedded, Inc.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; version 2 of the License.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. */
  17. #include <linux/gpio.h>
  18. #include <linux/gpio_keys.h>
  19. #include <linux/i2c.h>
  20. #include <linux/input.h>
  21. #include <linux/interrupt.h>
  22. #include <linux/irq.h>
  23. #include <linux/kernel.h>
  24. #include <linux/leds.h>
  25. #include <linux/mfd/tmio.h>
  26. #include <linux/mmc/host.h>
  27. #include <linux/mmc/sh_mmcif.h>
  28. #include <linux/mmc/sh_mobile_sdhi.h>
  29. #include <linux/mtd/partitions.h>
  30. #include <linux/mtd/mtd.h>
  31. #include <linux/pinctrl/machine.h>
  32. #include <linux/platform_data/camera-rcar.h>
  33. #include <linux/platform_data/gpio-rcar.h>
  34. #include <linux/platform_data/usb-rcar-gen2-phy.h>
  35. #include <linux/platform_device.h>
  36. #include <linux/phy.h>
  37. #include <linux/regulator/driver.h>
  38. #include <linux/regulator/fixed.h>
  39. #include <linux/regulator/gpio-regulator.h>
  40. #include <linux/regulator/machine.h>
  41. #include <linux/sh_eth.h>
  42. #include <linux/spi/flash.h>
  43. #include <linux/spi/rspi.h>
  44. #include <linux/spi/spi.h>
  45. #include <linux/usb/phy.h>
  46. #include <linux/usb/renesas_usbhs.h>
  47. #include <media/soc_camera.h>
  48. #include <asm/mach-types.h>
  49. #include <asm/mach/arch.h>
  50. #include <sound/rcar_snd.h>
  51. #include <sound/simple_card.h>
  52. #include "common.h"
  53. #include "irqs.h"
  54. #include "r8a7790.h"
  55. #include "rcar-gen2.h"
  56. /*
  57. * SSI-AK4643
  58. *
  59. * SW1: 1: AK4643
  60. * 2: CN22
  61. * 3: ADV7511
  62. *
  63. * this command is required when playback.
  64. *
  65. * # amixer set "LINEOUT Mixer DACL" on
  66. */
  67. /*
  68. * SDHI0 (CN8)
  69. *
  70. * JP3: pin1
  71. * SW20: pin1
  72. * GP5_24: 1: VDD 3.3V (defult)
  73. * 0: VDD 0.0V
  74. * GP5_29: 1: VccQ 3.3V (defult)
  75. * 0: VccQ 1.8V
  76. *
  77. */
  78. /* LEDS */
  79. static struct gpio_led lager_leds[] = {
  80. {
  81. .name = "led8",
  82. .gpio = RCAR_GP_PIN(5, 17),
  83. .default_state = LEDS_GPIO_DEFSTATE_ON,
  84. }, {
  85. .name = "led7",
  86. .gpio = RCAR_GP_PIN(4, 23),
  87. .default_state = LEDS_GPIO_DEFSTATE_ON,
  88. }, {
  89. .name = "led6",
  90. .gpio = RCAR_GP_PIN(4, 22),
  91. .default_state = LEDS_GPIO_DEFSTATE_ON,
  92. },
  93. };
  94. static const struct gpio_led_platform_data lager_leds_pdata __initconst = {
  95. .leds = lager_leds,
  96. .num_leds = ARRAY_SIZE(lager_leds),
  97. };
  98. /* GPIO KEY */
  99. #define GPIO_KEY(c, g, d, ...) \
  100. { .code = c, .gpio = g, .desc = d, .active_low = 1, \
  101. .wakeup = 1, .debounce_interval = 20 }
  102. static struct gpio_keys_button gpio_buttons[] = {
  103. GPIO_KEY(KEY_4, RCAR_GP_PIN(1, 28), "SW2-pin4"),
  104. GPIO_KEY(KEY_3, RCAR_GP_PIN(1, 26), "SW2-pin3"),
  105. GPIO_KEY(KEY_2, RCAR_GP_PIN(1, 24), "SW2-pin2"),
  106. GPIO_KEY(KEY_1, RCAR_GP_PIN(1, 14), "SW2-pin1"),
  107. };
  108. static const struct gpio_keys_platform_data lager_keys_pdata __initconst = {
  109. .buttons = gpio_buttons,
  110. .nbuttons = ARRAY_SIZE(gpio_buttons),
  111. };
  112. /* Fixed 3.3V regulator to be used by MMCIF */
  113. static struct regulator_consumer_supply fixed3v3_power_consumers[] =
  114. {
  115. REGULATOR_SUPPLY("vmmc", "sh_mmcif.1"),
  116. };
  117. /*
  118. * SDHI regulator macro
  119. *
  120. ** FIXME**
  121. * Lager board vqmmc is provided via DA9063 PMIC chip,
  122. * and we should use ${LINK}/drivers/mfd/da9063-* driver for it.
  123. * but, it doesn't have regulator support at this point.
  124. * It uses gpio-regulator for vqmmc as quick-hack.
  125. */
  126. #define SDHI_REGULATOR(idx, vdd_pin, vccq_pin) \
  127. static struct regulator_consumer_supply vcc_sdhi##idx##_consumer = \
  128. REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi." #idx); \
  129. \
  130. static struct regulator_init_data vcc_sdhi##idx##_init_data = { \
  131. .constraints = { \
  132. .valid_ops_mask = REGULATOR_CHANGE_STATUS, \
  133. }, \
  134. .consumer_supplies = &vcc_sdhi##idx##_consumer, \
  135. .num_consumer_supplies = 1, \
  136. }; \
  137. \
  138. static const struct fixed_voltage_config vcc_sdhi##idx##_info __initconst = {\
  139. .supply_name = "SDHI" #idx "Vcc", \
  140. .microvolts = 3300000, \
  141. .gpio = vdd_pin, \
  142. .enable_high = 1, \
  143. .init_data = &vcc_sdhi##idx##_init_data, \
  144. }; \
  145. \
  146. static struct regulator_consumer_supply vccq_sdhi##idx##_consumer = \
  147. REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi." #idx); \
  148. \
  149. static struct regulator_init_data vccq_sdhi##idx##_init_data = { \
  150. .constraints = { \
  151. .input_uV = 3300000, \
  152. .min_uV = 1800000, \
  153. .max_uV = 3300000, \
  154. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | \
  155. REGULATOR_CHANGE_STATUS, \
  156. }, \
  157. .consumer_supplies = &vccq_sdhi##idx##_consumer, \
  158. .num_consumer_supplies = 1, \
  159. }; \
  160. \
  161. static struct gpio vccq_sdhi##idx##_gpio = \
  162. { vccq_pin, GPIOF_OUT_INIT_HIGH, "vccq-sdhi" #idx }; \
  163. \
  164. static struct gpio_regulator_state vccq_sdhi##idx##_states[] = { \
  165. { .value = 1800000, .gpios = 0 }, \
  166. { .value = 3300000, .gpios = 1 }, \
  167. }; \
  168. \
  169. static const struct gpio_regulator_config vccq_sdhi##idx##_info __initconst = {\
  170. .supply_name = "vqmmc", \
  171. .gpios = &vccq_sdhi##idx##_gpio, \
  172. .nr_gpios = 1, \
  173. .states = vccq_sdhi##idx##_states, \
  174. .nr_states = ARRAY_SIZE(vccq_sdhi##idx##_states), \
  175. .type = REGULATOR_VOLTAGE, \
  176. .init_data = &vccq_sdhi##idx##_init_data, \
  177. };
  178. SDHI_REGULATOR(0, RCAR_GP_PIN(5, 24), RCAR_GP_PIN(5, 29));
  179. SDHI_REGULATOR(2, RCAR_GP_PIN(5, 25), RCAR_GP_PIN(5, 30));
  180. /* MMCIF */
  181. static const struct sh_mmcif_plat_data mmcif1_pdata __initconst = {
  182. .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
  183. .clk_ctrl2_present = true,
  184. .ccs_unsupported = true,
  185. };
  186. static const struct resource mmcif1_resources[] __initconst = {
  187. DEFINE_RES_MEM(0xee220000, 0x80),
  188. DEFINE_RES_IRQ(gic_spi(170)),
  189. };
  190. /* Ether */
  191. static const struct sh_eth_plat_data ether_pdata __initconst = {
  192. .phy = 0x1,
  193. .phy_irq = irq_pin(0),
  194. .edmac_endian = EDMAC_LITTLE_ENDIAN,
  195. .phy_interface = PHY_INTERFACE_MODE_RMII,
  196. .ether_link_active_low = 1,
  197. };
  198. static const struct resource ether_resources[] __initconst = {
  199. DEFINE_RES_MEM(0xee700000, 0x400),
  200. DEFINE_RES_IRQ(gic_spi(162)),
  201. };
  202. static const struct platform_device_info ether_info __initconst = {
  203. .name = "r8a7790-ether",
  204. .id = -1,
  205. .res = ether_resources,
  206. .num_res = ARRAY_SIZE(ether_resources),
  207. .data = &ether_pdata,
  208. .size_data = sizeof(ether_pdata),
  209. .dma_mask = DMA_BIT_MASK(32),
  210. };
  211. /* SPI Flash memory (Spansion S25FL512SAGMFIG11 64Mb) */
  212. static struct mtd_partition spi_flash_part[] = {
  213. /* Reserved for user loader program, read-only */
  214. {
  215. .name = "loader",
  216. .offset = 0,
  217. .size = SZ_256K,
  218. .mask_flags = MTD_WRITEABLE,
  219. },
  220. /* Reserved for user program, read-only */
  221. {
  222. .name = "user",
  223. .offset = MTDPART_OFS_APPEND,
  224. .size = SZ_4M,
  225. .mask_flags = MTD_WRITEABLE,
  226. },
  227. /* All else is writable (e.g. JFFS2) */
  228. {
  229. .name = "flash",
  230. .offset = MTDPART_OFS_APPEND,
  231. .size = MTDPART_SIZ_FULL,
  232. .mask_flags = 0,
  233. },
  234. };
  235. static const struct flash_platform_data spi_flash_data = {
  236. .name = "m25p80",
  237. .parts = spi_flash_part,
  238. .nr_parts = ARRAY_SIZE(spi_flash_part),
  239. .type = "s25fl512s",
  240. };
  241. static const struct rspi_plat_data qspi_pdata __initconst = {
  242. .num_chipselect = 1,
  243. };
  244. static const struct spi_board_info spi_info[] __initconst = {
  245. {
  246. .modalias = "m25p80",
  247. .platform_data = &spi_flash_data,
  248. .mode = SPI_MODE_0 | SPI_TX_QUAD | SPI_RX_QUAD,
  249. .max_speed_hz = 30000000,
  250. .bus_num = 0,
  251. .chip_select = 0,
  252. },
  253. };
  254. /* QSPI resource */
  255. static const struct resource qspi_resources[] __initconst = {
  256. DEFINE_RES_MEM(0xe6b10000, 0x1000),
  257. DEFINE_RES_IRQ_NAMED(gic_spi(184), "mux"),
  258. };
  259. /* VIN */
  260. static const struct resource vin_resources[] __initconst = {
  261. /* VIN0 */
  262. DEFINE_RES_MEM(0xe6ef0000, 0x1000),
  263. DEFINE_RES_IRQ(gic_spi(188)),
  264. /* VIN1 */
  265. DEFINE_RES_MEM(0xe6ef1000, 0x1000),
  266. DEFINE_RES_IRQ(gic_spi(189)),
  267. };
  268. static void __init lager_add_vin_device(unsigned idx,
  269. struct rcar_vin_platform_data *pdata)
  270. {
  271. struct platform_device_info vin_info = {
  272. .name = "r8a7790-vin",
  273. .id = idx,
  274. .res = &vin_resources[idx * 2],
  275. .num_res = 2,
  276. .dma_mask = DMA_BIT_MASK(32),
  277. .data = pdata,
  278. .size_data = sizeof(*pdata),
  279. };
  280. BUG_ON(idx > 1);
  281. platform_device_register_full(&vin_info);
  282. }
  283. #define LAGER_CAMERA(idx, name, addr, pdata, flag) \
  284. static struct i2c_board_info i2c_cam##idx##_device = { \
  285. I2C_BOARD_INFO(name, addr), \
  286. }; \
  287. \
  288. static struct rcar_vin_platform_data vin##idx##_pdata = { \
  289. .flags = flag, \
  290. }; \
  291. \
  292. static struct soc_camera_link cam##idx##_link = { \
  293. .bus_id = idx, \
  294. .board_info = &i2c_cam##idx##_device, \
  295. .i2c_adapter_id = 2, \
  296. .module_name = name, \
  297. .priv = pdata, \
  298. }
  299. /* Camera 0 is not currently supported due to adv7612 support missing */
  300. LAGER_CAMERA(1, "adv7180", 0x20, NULL, RCAR_VIN_BT656);
  301. static void __init lager_add_camera1_device(void)
  302. {
  303. platform_device_register_data(NULL, "soc-camera-pdrv", 1,
  304. &cam1_link, sizeof(cam1_link));
  305. lager_add_vin_device(1, &vin1_pdata);
  306. }
  307. /* SATA1 */
  308. static const struct resource sata1_resources[] __initconst = {
  309. DEFINE_RES_MEM(0xee500000, 0x2000),
  310. DEFINE_RES_IRQ(gic_spi(106)),
  311. };
  312. static const struct platform_device_info sata1_info __initconst = {
  313. .name = "sata-r8a7790",
  314. .id = 1,
  315. .res = sata1_resources,
  316. .num_res = ARRAY_SIZE(sata1_resources),
  317. .dma_mask = DMA_BIT_MASK(32),
  318. };
  319. /* USBHS */
  320. static const struct resource usbhs_resources[] __initconst = {
  321. DEFINE_RES_MEM(0xe6590000, 0x100),
  322. DEFINE_RES_IRQ(gic_spi(107)),
  323. };
  324. struct usbhs_private {
  325. struct renesas_usbhs_platform_info info;
  326. struct usb_phy *phy;
  327. };
  328. #define usbhs_get_priv(pdev) \
  329. container_of(renesas_usbhs_get_info(pdev), struct usbhs_private, info)
  330. static int usbhs_power_ctrl(struct platform_device *pdev,
  331. void __iomem *base, int enable)
  332. {
  333. struct usbhs_private *priv = usbhs_get_priv(pdev);
  334. if (!priv->phy)
  335. return -ENODEV;
  336. if (enable) {
  337. int retval = usb_phy_init(priv->phy);
  338. if (!retval)
  339. retval = usb_phy_set_suspend(priv->phy, 0);
  340. return retval;
  341. }
  342. usb_phy_set_suspend(priv->phy, 1);
  343. usb_phy_shutdown(priv->phy);
  344. return 0;
  345. }
  346. static int usbhs_hardware_init(struct platform_device *pdev)
  347. {
  348. struct usbhs_private *priv = usbhs_get_priv(pdev);
  349. struct usb_phy *phy;
  350. int ret;
  351. /* USB0 Function - use PWEN as GPIO input to detect DIP Switch SW5
  352. * setting to avoid VBUS short circuit due to wrong cable.
  353. * PWEN should be pulled up high if USB Function is selected by SW5
  354. */
  355. gpio_request_one(RCAR_GP_PIN(5, 18), GPIOF_IN, NULL); /* USB0_PWEN */
  356. if (!gpio_get_value(RCAR_GP_PIN(5, 18))) {
  357. pr_warn("Error: USB Function not selected - check SW5 + SW6\n");
  358. ret = -ENOTSUPP;
  359. goto error;
  360. }
  361. phy = usb_get_phy_dev(&pdev->dev, 0);
  362. if (IS_ERR(phy)) {
  363. ret = PTR_ERR(phy);
  364. goto error;
  365. }
  366. priv->phy = phy;
  367. return 0;
  368. error:
  369. gpio_free(RCAR_GP_PIN(5, 18));
  370. return ret;
  371. }
  372. static int usbhs_hardware_exit(struct platform_device *pdev)
  373. {
  374. struct usbhs_private *priv = usbhs_get_priv(pdev);
  375. if (!priv->phy)
  376. return 0;
  377. usb_put_phy(priv->phy);
  378. priv->phy = NULL;
  379. gpio_free(RCAR_GP_PIN(5, 18));
  380. return 0;
  381. }
  382. static int usbhs_get_id(struct platform_device *pdev)
  383. {
  384. return USBHS_GADGET;
  385. }
  386. static u32 lager_usbhs_pipe_type[] = {
  387. USB_ENDPOINT_XFER_CONTROL,
  388. USB_ENDPOINT_XFER_ISOC,
  389. USB_ENDPOINT_XFER_ISOC,
  390. USB_ENDPOINT_XFER_BULK,
  391. USB_ENDPOINT_XFER_BULK,
  392. USB_ENDPOINT_XFER_BULK,
  393. USB_ENDPOINT_XFER_INT,
  394. USB_ENDPOINT_XFER_INT,
  395. USB_ENDPOINT_XFER_INT,
  396. USB_ENDPOINT_XFER_BULK,
  397. USB_ENDPOINT_XFER_BULK,
  398. USB_ENDPOINT_XFER_BULK,
  399. USB_ENDPOINT_XFER_BULK,
  400. USB_ENDPOINT_XFER_BULK,
  401. USB_ENDPOINT_XFER_BULK,
  402. USB_ENDPOINT_XFER_BULK,
  403. };
  404. static struct usbhs_private usbhs_priv __initdata = {
  405. .info = {
  406. .platform_callback = {
  407. .power_ctrl = usbhs_power_ctrl,
  408. .hardware_init = usbhs_hardware_init,
  409. .hardware_exit = usbhs_hardware_exit,
  410. .get_id = usbhs_get_id,
  411. },
  412. .driver_param = {
  413. .buswait_bwait = 4,
  414. .pipe_type = lager_usbhs_pipe_type,
  415. .pipe_size = ARRAY_SIZE(lager_usbhs_pipe_type),
  416. },
  417. }
  418. };
  419. static void __init lager_register_usbhs(void)
  420. {
  421. usb_bind_phy("renesas_usbhs", 0, "usb_phy_rcar_gen2");
  422. platform_device_register_resndata(NULL,
  423. "renesas_usbhs", -1,
  424. usbhs_resources,
  425. ARRAY_SIZE(usbhs_resources),
  426. &usbhs_priv.info,
  427. sizeof(usbhs_priv.info));
  428. }
  429. /* USBHS PHY */
  430. static const struct rcar_gen2_phy_platform_data usbhs_phy_pdata __initconst = {
  431. .chan0_pci = 0, /* Channel 0 is USBHS */
  432. .chan2_pci = 1, /* Channel 2 is PCI USB */
  433. };
  434. static const struct resource usbhs_phy_resources[] __initconst = {
  435. DEFINE_RES_MEM(0xe6590100, 0x100),
  436. };
  437. /* I2C */
  438. static struct i2c_board_info i2c2_devices[] = {
  439. {
  440. I2C_BOARD_INFO("ak4643", 0x12),
  441. }
  442. };
  443. /* Sound */
  444. static struct resource rsnd_resources[] __initdata = {
  445. [RSND_GEN2_SCU] = DEFINE_RES_MEM(0xec500000, 0x1000),
  446. [RSND_GEN2_ADG] = DEFINE_RES_MEM(0xec5a0000, 0x100),
  447. [RSND_GEN2_SSIU] = DEFINE_RES_MEM(0xec540000, 0x1000),
  448. [RSND_GEN2_SSI] = DEFINE_RES_MEM(0xec541000, 0x1280),
  449. };
  450. static struct rsnd_ssi_platform_info rsnd_ssi[] = {
  451. RSND_SSI(0, gic_spi(370), 0),
  452. RSND_SSI(0, gic_spi(371), RSND_SSI_CLK_PIN_SHARE),
  453. };
  454. static struct rsnd_src_platform_info rsnd_src[2] = {
  455. /* no member at this point */
  456. };
  457. static struct rsnd_dai_platform_info rsnd_dai = {
  458. .playback = { .ssi = &rsnd_ssi[0], },
  459. .capture = { .ssi = &rsnd_ssi[1], },
  460. };
  461. static struct rcar_snd_info rsnd_info = {
  462. .flags = RSND_GEN2,
  463. .ssi_info = rsnd_ssi,
  464. .ssi_info_nr = ARRAY_SIZE(rsnd_ssi),
  465. .src_info = rsnd_src,
  466. .src_info_nr = ARRAY_SIZE(rsnd_src),
  467. .dai_info = &rsnd_dai,
  468. .dai_info_nr = 1,
  469. };
  470. static struct asoc_simple_card_info rsnd_card_info = {
  471. .name = "AK4643",
  472. .card = "SSI01-AK4643",
  473. .codec = "ak4642-codec.2-0012",
  474. .platform = "rcar_sound",
  475. .daifmt = SND_SOC_DAIFMT_LEFT_J | SND_SOC_DAIFMT_CBM_CFM,
  476. .cpu_dai = {
  477. .name = "rcar_sound",
  478. },
  479. .codec_dai = {
  480. .name = "ak4642-hifi",
  481. .sysclk = 11289600,
  482. },
  483. };
  484. static void __init lager_add_rsnd_device(void)
  485. {
  486. struct platform_device_info cardinfo = {
  487. .name = "asoc-simple-card",
  488. .id = -1,
  489. .data = &rsnd_card_info,
  490. .size_data = sizeof(struct asoc_simple_card_info),
  491. .dma_mask = DMA_BIT_MASK(32),
  492. };
  493. i2c_register_board_info(2, i2c2_devices,
  494. ARRAY_SIZE(i2c2_devices));
  495. platform_device_register_resndata(
  496. NULL, "rcar_sound", -1,
  497. rsnd_resources, ARRAY_SIZE(rsnd_resources),
  498. &rsnd_info, sizeof(rsnd_info));
  499. platform_device_register_full(&cardinfo);
  500. }
  501. /* SDHI0 */
  502. static struct sh_mobile_sdhi_info sdhi0_info __initdata = {
  503. .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
  504. MMC_CAP_POWER_OFF_CARD,
  505. .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT |
  506. TMIO_MMC_WRPROTECT_DISABLE,
  507. };
  508. static struct resource sdhi0_resources[] __initdata = {
  509. DEFINE_RES_MEM(0xee100000, 0x200),
  510. DEFINE_RES_IRQ(gic_spi(165)),
  511. };
  512. /* SDHI2 */
  513. static struct sh_mobile_sdhi_info sdhi2_info __initdata = {
  514. .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
  515. MMC_CAP_POWER_OFF_CARD,
  516. .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT |
  517. TMIO_MMC_WRPROTECT_DISABLE,
  518. };
  519. static struct resource sdhi2_resources[] __initdata = {
  520. DEFINE_RES_MEM(0xee140000, 0x100),
  521. DEFINE_RES_IRQ(gic_spi(167)),
  522. };
  523. /* Internal PCI1 */
  524. static const struct resource pci1_resources[] __initconst = {
  525. DEFINE_RES_MEM(0xee0b0000, 0x10000), /* CFG */
  526. DEFINE_RES_MEM(0xee0a0000, 0x10000), /* MEM */
  527. DEFINE_RES_IRQ(gic_spi(112)),
  528. };
  529. static const struct platform_device_info pci1_info __initconst = {
  530. .name = "pci-rcar-gen2",
  531. .id = 1,
  532. .res = pci1_resources,
  533. .num_res = ARRAY_SIZE(pci1_resources),
  534. .dma_mask = DMA_BIT_MASK(32),
  535. };
  536. static void __init lager_add_usb1_device(void)
  537. {
  538. platform_device_register_full(&pci1_info);
  539. }
  540. /* Internal PCI2 */
  541. static const struct resource pci2_resources[] __initconst = {
  542. DEFINE_RES_MEM(0xee0d0000, 0x10000), /* CFG */
  543. DEFINE_RES_MEM(0xee0c0000, 0x10000), /* MEM */
  544. DEFINE_RES_IRQ(gic_spi(113)),
  545. };
  546. static const struct platform_device_info pci2_info __initconst = {
  547. .name = "pci-rcar-gen2",
  548. .id = 2,
  549. .res = pci2_resources,
  550. .num_res = ARRAY_SIZE(pci2_resources),
  551. .dma_mask = DMA_BIT_MASK(32),
  552. };
  553. static void __init lager_add_usb2_device(void)
  554. {
  555. platform_device_register_full(&pci2_info);
  556. }
  557. static const struct pinctrl_map lager_pinctrl_map[] = {
  558. /* DU (CN10: ARGB0, CN13: LVDS) */
  559. PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
  560. "du_rgb666", "du"),
  561. PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
  562. "du_sync_1", "du"),
  563. PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
  564. "du_clk_out_0", "du"),
  565. /* I2C2 */
  566. PIN_MAP_MUX_GROUP_DEFAULT("i2c-rcar.2", "pfc-r8a7790",
  567. "i2c2", "i2c2"),
  568. /* QSPI */
  569. PIN_MAP_MUX_GROUP_DEFAULT("qspi.0", "pfc-r8a7790",
  570. "qspi_ctrl", "qspi"),
  571. PIN_MAP_MUX_GROUP_DEFAULT("qspi.0", "pfc-r8a7790",
  572. "qspi_data4", "qspi"),
  573. /* SCIF0 (CN19: DEBUG SERIAL0) */
  574. PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.6", "pfc-r8a7790",
  575. "scif0_data", "scif0"),
  576. /* SCIF1 (CN20: DEBUG SERIAL1) */
  577. PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.7", "pfc-r8a7790",
  578. "scif1_data", "scif1"),
  579. /* SDHI0 */
  580. PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7790",
  581. "sdhi0_data4", "sdhi0"),
  582. PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7790",
  583. "sdhi0_ctrl", "sdhi0"),
  584. PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7790",
  585. "sdhi0_cd", "sdhi0"),
  586. /* SDHI2 */
  587. PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-r8a7790",
  588. "sdhi2_data4", "sdhi2"),
  589. PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-r8a7790",
  590. "sdhi2_ctrl", "sdhi2"),
  591. PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-r8a7790",
  592. "sdhi2_cd", "sdhi2"),
  593. /* SSI (CN17: sound) */
  594. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7790",
  595. "ssi0129_ctrl", "ssi"),
  596. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7790",
  597. "ssi0_data", "ssi"),
  598. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7790",
  599. "ssi1_data", "ssi"),
  600. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7790",
  601. "audio_clk_a", "audio_clk"),
  602. /* MMCIF1 */
  603. PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.1", "pfc-r8a7790",
  604. "mmc1_data8", "mmc1"),
  605. PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.1", "pfc-r8a7790",
  606. "mmc1_ctrl", "mmc1"),
  607. /* Ether */
  608. PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
  609. "eth_link", "eth"),
  610. PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
  611. "eth_mdio", "eth"),
  612. PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
  613. "eth_rmii", "eth"),
  614. PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
  615. "intc_irq0", "intc"),
  616. /* VIN0 */
  617. PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790",
  618. "vin0_data24", "vin0"),
  619. PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790",
  620. "vin0_sync", "vin0"),
  621. PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790",
  622. "vin0_field", "vin0"),
  623. PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790",
  624. "vin0_clkenb", "vin0"),
  625. PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790",
  626. "vin0_clk", "vin0"),
  627. /* VIN1 */
  628. PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.1", "pfc-r8a7790",
  629. "vin1_data8", "vin1"),
  630. PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.1", "pfc-r8a7790",
  631. "vin1_clk", "vin1"),
  632. /* USB0 */
  633. PIN_MAP_MUX_GROUP_DEFAULT("renesas_usbhs", "pfc-r8a7790",
  634. "usb0_ovc_vbus", "usb0"),
  635. /* USB1 */
  636. PIN_MAP_MUX_GROUP_DEFAULT("pci-rcar-gen2.1", "pfc-r8a7790",
  637. "usb1", "usb1"),
  638. /* USB2 */
  639. PIN_MAP_MUX_GROUP_DEFAULT("pci-rcar-gen2.2", "pfc-r8a7790",
  640. "usb2", "usb2"),
  641. };
  642. static void __init lager_add_standard_devices(void)
  643. {
  644. int fixed_regulator_idx = 0;
  645. int gpio_regulator_idx = 0;
  646. r8a7790_clock_init();
  647. pinctrl_register_mappings(lager_pinctrl_map,
  648. ARRAY_SIZE(lager_pinctrl_map));
  649. r8a7790_pinmux_init();
  650. r8a7790_add_standard_devices();
  651. platform_device_register_data(NULL, "leds-gpio", -1,
  652. &lager_leds_pdata,
  653. sizeof(lager_leds_pdata));
  654. platform_device_register_data(NULL, "gpio-keys", -1,
  655. &lager_keys_pdata,
  656. sizeof(lager_keys_pdata));
  657. regulator_register_always_on(fixed_regulator_idx++,
  658. "fixed-3.3V", fixed3v3_power_consumers,
  659. ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
  660. platform_device_register_resndata(NULL, "sh_mmcif", 1,
  661. mmcif1_resources, ARRAY_SIZE(mmcif1_resources),
  662. &mmcif1_pdata, sizeof(mmcif1_pdata));
  663. platform_device_register_full(&ether_info);
  664. platform_device_register_resndata(NULL, "qspi", 0,
  665. qspi_resources,
  666. ARRAY_SIZE(qspi_resources),
  667. &qspi_pdata, sizeof(qspi_pdata));
  668. spi_register_board_info(spi_info, ARRAY_SIZE(spi_info));
  669. platform_device_register_data(NULL, "reg-fixed-voltage", fixed_regulator_idx++,
  670. &vcc_sdhi0_info, sizeof(struct fixed_voltage_config));
  671. platform_device_register_data(NULL, "reg-fixed-voltage", fixed_regulator_idx++,
  672. &vcc_sdhi2_info, sizeof(struct fixed_voltage_config));
  673. platform_device_register_data(NULL, "gpio-regulator", gpio_regulator_idx++,
  674. &vccq_sdhi0_info, sizeof(struct gpio_regulator_config));
  675. platform_device_register_data(NULL, "gpio-regulator", gpio_regulator_idx++,
  676. &vccq_sdhi2_info, sizeof(struct gpio_regulator_config));
  677. lager_add_camera1_device();
  678. platform_device_register_full(&sata1_info);
  679. platform_device_register_resndata(NULL, "usb_phy_rcar_gen2",
  680. -1, usbhs_phy_resources,
  681. ARRAY_SIZE(usbhs_phy_resources),
  682. &usbhs_phy_pdata,
  683. sizeof(usbhs_phy_pdata));
  684. lager_register_usbhs();
  685. lager_add_usb1_device();
  686. lager_add_usb2_device();
  687. lager_add_rsnd_device();
  688. platform_device_register_resndata(NULL, "sh_mobile_sdhi", 0,
  689. sdhi0_resources, ARRAY_SIZE(sdhi0_resources),
  690. &sdhi0_info, sizeof(struct sh_mobile_sdhi_info));
  691. platform_device_register_resndata(NULL, "sh_mobile_sdhi", 2,
  692. sdhi2_resources, ARRAY_SIZE(sdhi2_resources),
  693. &sdhi2_info, sizeof(struct sh_mobile_sdhi_info));
  694. }
  695. /*
  696. * Ether LEDs on the Lager board are named LINK and ACTIVE which corresponds
  697. * to non-default 01 setting of the Micrel KSZ8041 PHY control register 1 bits
  698. * 14-15. We have to set them back to 01 from the default 00 value each time
  699. * the PHY is reset. It's also important because the PHY's LED0 signal is
  700. * connected to SoC's ETH_LINK signal and in the PHY's default mode it will
  701. * bounce on and off after each packet, which we apparently want to avoid.
  702. */
  703. static int lager_ksz8041_fixup(struct phy_device *phydev)
  704. {
  705. u16 phyctrl1 = phy_read(phydev, 0x1e);
  706. phyctrl1 &= ~0xc000;
  707. phyctrl1 |= 0x4000;
  708. return phy_write(phydev, 0x1e, phyctrl1);
  709. }
  710. static void __init lager_init(void)
  711. {
  712. lager_add_standard_devices();
  713. irq_set_irq_type(irq_pin(0), IRQ_TYPE_LEVEL_LOW);
  714. if (IS_ENABLED(CONFIG_PHYLIB))
  715. phy_register_fixup_for_id("r8a7790-ether-ff:01",
  716. lager_ksz8041_fixup);
  717. }
  718. static const char * const lager_boards_compat_dt[] __initconst = {
  719. "renesas,lager",
  720. NULL,
  721. };
  722. DT_MACHINE_START(LAGER_DT, "lager")
  723. .smp = smp_ops(r8a7790_smp_ops),
  724. .init_early = shmobile_init_delay,
  725. .init_time = rcar_gen2_timer_init,
  726. .init_machine = lager_init,
  727. .init_late = shmobile_init_late,
  728. .reserve = rcar_gen2_reserve,
  729. .dt_compat = lager_boards_compat_dt,
  730. MACHINE_END