perf_event_cpu.c 9.1 KB

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  1. /*
  2. * This program is free software; you can redistribute it and/or modify
  3. * it under the terms of the GNU General Public License version 2 as
  4. * published by the Free Software Foundation.
  5. *
  6. * This program is distributed in the hope that it will be useful,
  7. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  8. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  9. * GNU General Public License for more details.
  10. *
  11. * You should have received a copy of the GNU General Public License
  12. * along with this program; if not, write to the Free Software
  13. * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  14. *
  15. * Copyright (C) 2012 ARM Limited
  16. *
  17. * Author: Will Deacon <will.deacon@arm.com>
  18. */
  19. #define pr_fmt(fmt) "CPU PMU: " fmt
  20. #include <linux/bitmap.h>
  21. #include <linux/export.h>
  22. #include <linux/kernel.h>
  23. #include <linux/of.h>
  24. #include <linux/platform_device.h>
  25. #include <linux/slab.h>
  26. #include <linux/spinlock.h>
  27. #include <linux/irq.h>
  28. #include <linux/irqdesc.h>
  29. #include <asm/cputype.h>
  30. #include <asm/irq_regs.h>
  31. #include <asm/pmu.h>
  32. /* Set at runtime when we know what CPU type we are. */
  33. static struct arm_pmu *cpu_pmu;
  34. /*
  35. * Despite the names, these two functions are CPU-specific and are used
  36. * by the OProfile/perf code.
  37. */
  38. const char *perf_pmu_name(void)
  39. {
  40. if (!cpu_pmu)
  41. return NULL;
  42. return cpu_pmu->name;
  43. }
  44. EXPORT_SYMBOL_GPL(perf_pmu_name);
  45. int perf_num_counters(void)
  46. {
  47. int max_events = 0;
  48. if (cpu_pmu != NULL)
  49. max_events = cpu_pmu->num_events;
  50. return max_events;
  51. }
  52. EXPORT_SYMBOL_GPL(perf_num_counters);
  53. /* Include the PMU-specific implementations. */
  54. #include "perf_event_xscale.c"
  55. #include "perf_event_v6.c"
  56. #include "perf_event_v7.c"
  57. static void cpu_pmu_enable_percpu_irq(void *data)
  58. {
  59. int irq = *(int *)data;
  60. enable_percpu_irq(irq, IRQ_TYPE_NONE);
  61. }
  62. static void cpu_pmu_disable_percpu_irq(void *data)
  63. {
  64. int irq = *(int *)data;
  65. disable_percpu_irq(irq);
  66. }
  67. static void cpu_pmu_free_irq(struct arm_pmu *cpu_pmu)
  68. {
  69. int i, irq, irqs;
  70. struct platform_device *pmu_device = cpu_pmu->plat_device;
  71. struct pmu_hw_events __percpu *hw_events = cpu_pmu->hw_events;
  72. irqs = min(pmu_device->num_resources, num_possible_cpus());
  73. irq = platform_get_irq(pmu_device, 0);
  74. if (irq >= 0 && irq_is_percpu(irq)) {
  75. on_each_cpu(cpu_pmu_disable_percpu_irq, &irq, 1);
  76. free_percpu_irq(irq, &hw_events->percpu_pmu);
  77. } else {
  78. for (i = 0; i < irqs; ++i) {
  79. if (!cpumask_test_and_clear_cpu(i, &cpu_pmu->active_irqs))
  80. continue;
  81. irq = platform_get_irq(pmu_device, i);
  82. if (irq >= 0)
  83. free_irq(irq, per_cpu_ptr(&hw_events->percpu_pmu, i));
  84. }
  85. }
  86. }
  87. static int cpu_pmu_request_irq(struct arm_pmu *cpu_pmu, irq_handler_t handler)
  88. {
  89. int i, err, irq, irqs;
  90. struct platform_device *pmu_device = cpu_pmu->plat_device;
  91. struct pmu_hw_events __percpu *hw_events = cpu_pmu->hw_events;
  92. if (!pmu_device)
  93. return -ENODEV;
  94. irqs = min(pmu_device->num_resources, num_possible_cpus());
  95. if (irqs < 1) {
  96. pr_warn_once("perf/ARM: No irqs for PMU defined, sampling events not supported\n");
  97. return 0;
  98. }
  99. irq = platform_get_irq(pmu_device, 0);
  100. if (irq >= 0 && irq_is_percpu(irq)) {
  101. err = request_percpu_irq(irq, handler, "arm-pmu",
  102. &hw_events->percpu_pmu);
  103. if (err) {
  104. pr_err("unable to request IRQ%d for ARM PMU counters\n",
  105. irq);
  106. return err;
  107. }
  108. on_each_cpu(cpu_pmu_enable_percpu_irq, &irq, 1);
  109. } else {
  110. for (i = 0; i < irqs; ++i) {
  111. err = 0;
  112. irq = platform_get_irq(pmu_device, i);
  113. if (irq < 0)
  114. continue;
  115. /*
  116. * If we have a single PMU interrupt that we can't shift,
  117. * assume that we're running on a uniprocessor machine and
  118. * continue. Otherwise, continue without this interrupt.
  119. */
  120. if (irq_set_affinity(irq, cpumask_of(i)) && irqs > 1) {
  121. pr_warn("unable to set irq affinity (irq=%d, cpu=%u)\n",
  122. irq, i);
  123. continue;
  124. }
  125. err = request_irq(irq, handler,
  126. IRQF_NOBALANCING | IRQF_NO_THREAD, "arm-pmu",
  127. per_cpu_ptr(&hw_events->percpu_pmu, i));
  128. if (err) {
  129. pr_err("unable to request IRQ%d for ARM PMU counters\n",
  130. irq);
  131. return err;
  132. }
  133. cpumask_set_cpu(i, &cpu_pmu->active_irqs);
  134. }
  135. }
  136. return 0;
  137. }
  138. /*
  139. * PMU hardware loses all context when a CPU goes offline.
  140. * When a CPU is hotplugged back in, since some hardware registers are
  141. * UNKNOWN at reset, the PMU must be explicitly reset to avoid reading
  142. * junk values out of them.
  143. */
  144. static int cpu_pmu_notify(struct notifier_block *b, unsigned long action,
  145. void *hcpu)
  146. {
  147. struct arm_pmu *pmu = container_of(b, struct arm_pmu, hotplug_nb);
  148. if ((action & ~CPU_TASKS_FROZEN) != CPU_STARTING)
  149. return NOTIFY_DONE;
  150. if (pmu->reset)
  151. pmu->reset(pmu);
  152. else
  153. return NOTIFY_DONE;
  154. return NOTIFY_OK;
  155. }
  156. static int cpu_pmu_init(struct arm_pmu *cpu_pmu)
  157. {
  158. int err;
  159. int cpu;
  160. struct pmu_hw_events __percpu *cpu_hw_events;
  161. cpu_hw_events = alloc_percpu(struct pmu_hw_events);
  162. if (!cpu_hw_events)
  163. return -ENOMEM;
  164. cpu_pmu->hotplug_nb.notifier_call = cpu_pmu_notify;
  165. err = register_cpu_notifier(&cpu_pmu->hotplug_nb);
  166. if (err)
  167. goto out_hw_events;
  168. for_each_possible_cpu(cpu) {
  169. struct pmu_hw_events *events = per_cpu_ptr(cpu_hw_events, cpu);
  170. raw_spin_lock_init(&events->pmu_lock);
  171. events->percpu_pmu = cpu_pmu;
  172. }
  173. cpu_pmu->hw_events = cpu_hw_events;
  174. cpu_pmu->request_irq = cpu_pmu_request_irq;
  175. cpu_pmu->free_irq = cpu_pmu_free_irq;
  176. /* Ensure the PMU has sane values out of reset. */
  177. if (cpu_pmu->reset)
  178. on_each_cpu(cpu_pmu->reset, cpu_pmu, 1);
  179. /* If no interrupts available, set the corresponding capability flag */
  180. if (!platform_get_irq(cpu_pmu->plat_device, 0))
  181. cpu_pmu->pmu.capabilities |= PERF_PMU_CAP_NO_INTERRUPT;
  182. return 0;
  183. out_hw_events:
  184. free_percpu(cpu_hw_events);
  185. return err;
  186. }
  187. static void cpu_pmu_destroy(struct arm_pmu *cpu_pmu)
  188. {
  189. unregister_cpu_notifier(&cpu_pmu->hotplug_nb);
  190. free_percpu(cpu_pmu->hw_events);
  191. }
  192. /*
  193. * PMU platform driver and devicetree bindings.
  194. */
  195. static struct of_device_id cpu_pmu_of_device_ids[] = {
  196. {.compatible = "arm,cortex-a17-pmu", .data = armv7_a17_pmu_init},
  197. {.compatible = "arm,cortex-a15-pmu", .data = armv7_a15_pmu_init},
  198. {.compatible = "arm,cortex-a12-pmu", .data = armv7_a12_pmu_init},
  199. {.compatible = "arm,cortex-a9-pmu", .data = armv7_a9_pmu_init},
  200. {.compatible = "arm,cortex-a8-pmu", .data = armv7_a8_pmu_init},
  201. {.compatible = "arm,cortex-a7-pmu", .data = armv7_a7_pmu_init},
  202. {.compatible = "arm,cortex-a5-pmu", .data = armv7_a5_pmu_init},
  203. {.compatible = "arm,arm11mpcore-pmu", .data = armv6mpcore_pmu_init},
  204. {.compatible = "arm,arm1176-pmu", .data = armv6_1176_pmu_init},
  205. {.compatible = "arm,arm1136-pmu", .data = armv6_1136_pmu_init},
  206. {.compatible = "qcom,krait-pmu", .data = krait_pmu_init},
  207. {},
  208. };
  209. static struct platform_device_id cpu_pmu_plat_device_ids[] = {
  210. {.name = "arm-pmu"},
  211. {.name = "armv6-pmu"},
  212. {.name = "armv7-pmu"},
  213. {.name = "xscale-pmu"},
  214. {},
  215. };
  216. static const struct pmu_probe_info pmu_probe_table[] = {
  217. ARM_PMU_PROBE(ARM_CPU_PART_ARM1136, armv6_1136_pmu_init),
  218. ARM_PMU_PROBE(ARM_CPU_PART_ARM1156, armv6_1156_pmu_init),
  219. ARM_PMU_PROBE(ARM_CPU_PART_ARM1176, armv6_1176_pmu_init),
  220. ARM_PMU_PROBE(ARM_CPU_PART_ARM11MPCORE, armv6mpcore_pmu_init),
  221. ARM_PMU_PROBE(ARM_CPU_PART_CORTEX_A8, armv7_a8_pmu_init),
  222. ARM_PMU_PROBE(ARM_CPU_PART_CORTEX_A9, armv7_a9_pmu_init),
  223. XSCALE_PMU_PROBE(ARM_CPU_XSCALE_ARCH_V1, xscale1pmu_init),
  224. XSCALE_PMU_PROBE(ARM_CPU_XSCALE_ARCH_V2, xscale2pmu_init),
  225. { /* sentinel value */ }
  226. };
  227. /*
  228. * CPU PMU identification and probing.
  229. */
  230. static int probe_current_pmu(struct arm_pmu *pmu)
  231. {
  232. int cpu = get_cpu();
  233. unsigned int cpuid = read_cpuid_id();
  234. int ret = -ENODEV;
  235. const struct pmu_probe_info *info;
  236. pr_info("probing PMU on CPU %d\n", cpu);
  237. for (info = pmu_probe_table; info->init != NULL; info++) {
  238. if ((cpuid & info->mask) != info->cpuid)
  239. continue;
  240. ret = info->init(pmu);
  241. break;
  242. }
  243. put_cpu();
  244. return ret;
  245. }
  246. static int cpu_pmu_device_probe(struct platform_device *pdev)
  247. {
  248. const struct of_device_id *of_id;
  249. const int (*init_fn)(struct arm_pmu *);
  250. struct device_node *node = pdev->dev.of_node;
  251. struct arm_pmu *pmu;
  252. int ret = -ENODEV;
  253. if (cpu_pmu) {
  254. pr_info("attempt to register multiple PMU devices!\n");
  255. return -ENOSPC;
  256. }
  257. pmu = kzalloc(sizeof(struct arm_pmu), GFP_KERNEL);
  258. if (!pmu) {
  259. pr_info("failed to allocate PMU device!\n");
  260. return -ENOMEM;
  261. }
  262. cpu_pmu = pmu;
  263. cpu_pmu->plat_device = pdev;
  264. if (node && (of_id = of_match_node(cpu_pmu_of_device_ids, pdev->dev.of_node))) {
  265. init_fn = of_id->data;
  266. ret = init_fn(pmu);
  267. } else {
  268. ret = probe_current_pmu(pmu);
  269. }
  270. if (ret) {
  271. pr_info("failed to probe PMU!\n");
  272. goto out_free;
  273. }
  274. ret = cpu_pmu_init(cpu_pmu);
  275. if (ret)
  276. goto out_free;
  277. ret = armpmu_register(cpu_pmu, -1);
  278. if (ret)
  279. goto out_destroy;
  280. return 0;
  281. out_destroy:
  282. cpu_pmu_destroy(cpu_pmu);
  283. out_free:
  284. pr_info("failed to register PMU devices!\n");
  285. kfree(pmu);
  286. return ret;
  287. }
  288. static struct platform_driver cpu_pmu_driver = {
  289. .driver = {
  290. .name = "arm-pmu",
  291. .pm = &armpmu_dev_pm_ops,
  292. .of_match_table = cpu_pmu_of_device_ids,
  293. },
  294. .probe = cpu_pmu_device_probe,
  295. .id_table = cpu_pmu_plat_device_ids,
  296. };
  297. static int __init register_pmu_driver(void)
  298. {
  299. return platform_driver_register(&cpu_pmu_driver);
  300. }
  301. device_initcall(register_pmu_driver);