setup.c 13 KB

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  1. /*
  2. * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. */
  8. #include <linux/seq_file.h>
  9. #include <linux/fs.h>
  10. #include <linux/delay.h>
  11. #include <linux/root_dev.h>
  12. #include <linux/console.h>
  13. #include <linux/module.h>
  14. #include <linux/cpu.h>
  15. #include <linux/clk-provider.h>
  16. #include <linux/of_fdt.h>
  17. #include <linux/of_platform.h>
  18. #include <linux/cache.h>
  19. #include <asm/sections.h>
  20. #include <asm/arcregs.h>
  21. #include <asm/tlb.h>
  22. #include <asm/setup.h>
  23. #include <asm/page.h>
  24. #include <asm/irq.h>
  25. #include <asm/unwind.h>
  26. #include <asm/clk.h>
  27. #include <asm/mach_desc.h>
  28. #include <asm/smp.h>
  29. #define FIX_PTR(x) __asm__ __volatile__(";" : "+r"(x))
  30. /* Part of U-boot ABI: see head.S */
  31. int __initdata uboot_tag;
  32. char __initdata *uboot_arg;
  33. const struct machine_desc *machine_desc;
  34. struct task_struct *_current_task[NR_CPUS]; /* For stack switching */
  35. struct cpuinfo_arc cpuinfo_arc700[NR_CPUS];
  36. static void read_arc_build_cfg_regs(void)
  37. {
  38. struct bcr_perip uncached_space;
  39. struct bcr_generic bcr;
  40. struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
  41. FIX_PTR(cpu);
  42. READ_BCR(AUX_IDENTITY, cpu->core);
  43. READ_BCR(ARC_REG_ISA_CFG_BCR, cpu->isa);
  44. READ_BCR(ARC_REG_TIMERS_BCR, cpu->timers);
  45. cpu->vec_base = read_aux_reg(AUX_INTR_VEC_BASE);
  46. READ_BCR(ARC_REG_D_UNCACH_BCR, uncached_space);
  47. cpu->uncached_base = uncached_space.start << 24;
  48. READ_BCR(ARC_REG_MUL_BCR, cpu->extn_mpy);
  49. cpu->extn.norm = read_aux_reg(ARC_REG_NORM_BCR) > 1 ? 1 : 0; /* 2,3 */
  50. cpu->extn.barrel = read_aux_reg(ARC_REG_BARREL_BCR) > 1 ? 1 : 0; /* 2,3 */
  51. cpu->extn.swap = read_aux_reg(ARC_REG_SWAP_BCR) ? 1 : 0; /* 1,3 */
  52. cpu->extn.crc = read_aux_reg(ARC_REG_CRC_BCR) ? 1 : 0;
  53. cpu->extn.minmax = read_aux_reg(ARC_REG_MIXMAX_BCR) > 1 ? 1 : 0; /* 2 */
  54. /* Note that we read the CCM BCRs independent of kernel config
  55. * This is to catch the cases where user doesn't know that
  56. * CCMs are present in hardware build
  57. */
  58. {
  59. struct bcr_iccm iccm;
  60. struct bcr_dccm dccm;
  61. struct bcr_dccm_base dccm_base;
  62. unsigned int bcr_32bit_val;
  63. bcr_32bit_val = read_aux_reg(ARC_REG_ICCM_BCR);
  64. if (bcr_32bit_val) {
  65. iccm = *((struct bcr_iccm *)&bcr_32bit_val);
  66. cpu->iccm.base_addr = iccm.base << 16;
  67. cpu->iccm.sz = 0x2000 << (iccm.sz - 1);
  68. }
  69. bcr_32bit_val = read_aux_reg(ARC_REG_DCCM_BCR);
  70. if (bcr_32bit_val) {
  71. dccm = *((struct bcr_dccm *)&bcr_32bit_val);
  72. cpu->dccm.sz = 0x800 << (dccm.sz);
  73. READ_BCR(ARC_REG_DCCMBASE_BCR, dccm_base);
  74. cpu->dccm.base_addr = dccm_base.addr << 8;
  75. }
  76. }
  77. READ_BCR(ARC_REG_XY_MEM_BCR, cpu->extn_xymem);
  78. read_decode_mmu_bcr();
  79. read_decode_cache_bcr();
  80. {
  81. struct bcr_fp_arcompact sp, dp;
  82. struct bcr_bpu_arcompact bpu;
  83. READ_BCR(ARC_REG_FP_BCR, sp);
  84. READ_BCR(ARC_REG_DPFP_BCR, dp);
  85. cpu->extn.fpu_sp = sp.ver ? 1 : 0;
  86. cpu->extn.fpu_dp = dp.ver ? 1 : 0;
  87. READ_BCR(ARC_REG_BPU_BCR, bpu);
  88. cpu->bpu.ver = bpu.ver;
  89. cpu->bpu.full = bpu.fam ? 1 : 0;
  90. if (bpu.ent) {
  91. cpu->bpu.num_cache = 256 << (bpu.ent - 1);
  92. cpu->bpu.num_pred = 256 << (bpu.ent - 1);
  93. }
  94. }
  95. READ_BCR(ARC_REG_AP_BCR, bcr);
  96. cpu->extn.ap = bcr.ver ? 1 : 0;
  97. READ_BCR(ARC_REG_SMART_BCR, bcr);
  98. cpu->extn.smart = bcr.ver ? 1 : 0;
  99. cpu->extn.debug = cpu->extn.ap | cpu->extn.smart;
  100. }
  101. static const struct cpuinfo_data arc_cpu_tbl[] = {
  102. { {0x20, "ARC 600" }, 0x2F},
  103. { {0x30, "ARC 700" }, 0x33},
  104. { {0x34, "ARC 700 R4.10"}, 0x34},
  105. { {0x35, "ARC 700 R4.11"}, 0x35},
  106. { {0x00, NULL } }
  107. };
  108. #define IS_AVAIL1(v, str) ((v) ? str : "")
  109. #define IS_USED(cfg) (IS_ENABLED(cfg) ? "" : "(not used) ")
  110. #define IS_AVAIL2(v, str, cfg) IS_AVAIL1(v, str), IS_AVAIL1(v, IS_USED(cfg))
  111. static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len)
  112. {
  113. struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
  114. struct bcr_identity *core = &cpu->core;
  115. const struct cpuinfo_data *tbl;
  116. char *isa_nm;
  117. int i, be, atomic;
  118. int n = 0;
  119. FIX_PTR(cpu);
  120. {
  121. isa_nm = "ARCompact";
  122. be = IS_ENABLED(CONFIG_CPU_BIG_ENDIAN);
  123. atomic = cpu->isa.atomic1;
  124. if (!cpu->isa.ver) /* ISA BCR absent, use Kconfig info */
  125. atomic = IS_ENABLED(CONFIG_ARC_HAS_LLSC);
  126. }
  127. n += scnprintf(buf + n, len - n,
  128. "\nIDENTITY\t: ARCVER [%#02x] ARCNUM [%#02x] CHIPID [%#4x]\n",
  129. core->family, core->cpu_id, core->chip_id);
  130. for (tbl = &arc_cpu_tbl[0]; tbl->info.id != 0; tbl++) {
  131. if ((core->family >= tbl->info.id) &&
  132. (core->family <= tbl->up_range)) {
  133. n += scnprintf(buf + n, len - n,
  134. "processor [%d]\t: %s (%s ISA) %s\n",
  135. cpu_id, tbl->info.str, isa_nm,
  136. IS_AVAIL1(be, "[Big-Endian]"));
  137. break;
  138. }
  139. }
  140. if (tbl->info.id == 0)
  141. n += scnprintf(buf + n, len - n, "UNKNOWN ARC Processor\n");
  142. n += scnprintf(buf + n, len - n, "CPU speed\t: %u.%02u Mhz\n",
  143. (unsigned int)(arc_get_core_freq() / 1000000),
  144. (unsigned int)(arc_get_core_freq() / 10000) % 100);
  145. n += scnprintf(buf + n, len - n, "Timers\t\t: %s%s%s%s\nISA Extn\t: ",
  146. IS_AVAIL1(cpu->timers.t0, "Timer0 "),
  147. IS_AVAIL1(cpu->timers.t1, "Timer1 "),
  148. IS_AVAIL2(cpu->timers.rtsc, "64-bit RTSC ", CONFIG_ARC_HAS_RTSC));
  149. n += i = scnprintf(buf + n, len - n, "%s%s",
  150. IS_AVAIL2(atomic, "atomic ", CONFIG_ARC_HAS_LLSC));
  151. if (i)
  152. n += scnprintf(buf + n, len - n, "\n\t\t: ");
  153. n += scnprintf(buf + n, len - n, "%s%s%s%s%s%s%s%s\n",
  154. IS_AVAIL1(cpu->extn_mpy.ver, "mpy "),
  155. IS_AVAIL1(cpu->extn.norm, "norm "),
  156. IS_AVAIL1(cpu->extn.barrel, "barrel-shift "),
  157. IS_AVAIL1(cpu->extn.swap, "swap "),
  158. IS_AVAIL1(cpu->extn.minmax, "minmax "),
  159. IS_AVAIL1(cpu->extn.crc, "crc "),
  160. IS_AVAIL2(1, "swape", CONFIG_ARC_HAS_SWAPE));
  161. if (cpu->bpu.ver)
  162. n += scnprintf(buf + n, len - n,
  163. "BPU\t\t: %s%s match, cache:%d, Predict Table:%d\n",
  164. IS_AVAIL1(cpu->bpu.full, "full"),
  165. IS_AVAIL1(!cpu->bpu.full, "partial"),
  166. cpu->bpu.num_cache, cpu->bpu.num_pred);
  167. return buf;
  168. }
  169. static char *arc_extn_mumbojumbo(int cpu_id, char *buf, int len)
  170. {
  171. int n = 0;
  172. struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
  173. FIX_PTR(cpu);
  174. n += scnprintf(buf + n, len - n,
  175. "Vector Table\t: %#x\nUncached Base\t: %#x\n",
  176. cpu->vec_base, cpu->uncached_base);
  177. if (cpu->extn.fpu_sp || cpu->extn.fpu_dp)
  178. n += scnprintf(buf + n, len - n, "FPU\t\t: %s%s\n",
  179. IS_AVAIL1(cpu->extn.fpu_sp, "SP "),
  180. IS_AVAIL1(cpu->extn.fpu_dp, "DP "));
  181. if (cpu->extn.debug)
  182. n += scnprintf(buf + n, len - n, "DEBUG\t\t: %s%s%s\n",
  183. IS_AVAIL1(cpu->extn.ap, "ActionPoint "),
  184. IS_AVAIL1(cpu->extn.smart, "smaRT "),
  185. IS_AVAIL1(cpu->extn.rtt, "RTT "));
  186. if (cpu->dccm.sz || cpu->iccm.sz)
  187. n += scnprintf(buf + n, len - n, "Extn [CCM]\t: DCCM @ %x, %d KB / ICCM: @ %x, %d KB\n",
  188. cpu->dccm.base_addr, TO_KB(cpu->dccm.sz),
  189. cpu->iccm.base_addr, TO_KB(cpu->iccm.sz));
  190. n += scnprintf(buf + n, len - n,
  191. "OS ABI [v3]\t: no-legacy-syscalls\n");
  192. return buf;
  193. }
  194. static void arc_chk_core_config(void)
  195. {
  196. struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
  197. int fpu_enabled;
  198. if (!cpu->timers.t0)
  199. panic("Timer0 is not present!\n");
  200. if (!cpu->timers.t1)
  201. panic("Timer1 is not present!\n");
  202. if (IS_ENABLED(CONFIG_ARC_HAS_RTSC) && !cpu->timers.rtsc)
  203. panic("RTSC is not present\n");
  204. #ifdef CONFIG_ARC_HAS_DCCM
  205. /*
  206. * DCCM can be arbit placed in hardware.
  207. * Make sure it's placement/sz matches what Linux is built with
  208. */
  209. if ((unsigned int)__arc_dccm_base != cpu->dccm.base_addr)
  210. panic("Linux built with incorrect DCCM Base address\n");
  211. if (CONFIG_ARC_DCCM_SZ != cpu->dccm.sz)
  212. panic("Linux built with incorrect DCCM Size\n");
  213. #endif
  214. #ifdef CONFIG_ARC_HAS_ICCM
  215. if (CONFIG_ARC_ICCM_SZ != cpu->iccm.sz)
  216. panic("Linux built with incorrect ICCM Size\n");
  217. #endif
  218. /*
  219. * FP hardware/software config sanity
  220. * -If hardware contains DPFP, kernel needs to save/restore FPU state
  221. * -If not, it will crash trying to save/restore the non-existant regs
  222. *
  223. * (only DPDP checked since SP has no arch visible regs)
  224. */
  225. fpu_enabled = IS_ENABLED(CONFIG_ARC_FPU_SAVE_RESTORE);
  226. if (cpu->extn.fpu_dp && !fpu_enabled)
  227. pr_warn("CONFIG_ARC_FPU_SAVE_RESTORE needed for working apps\n");
  228. else if (!cpu->extn.fpu_dp && fpu_enabled)
  229. panic("FPU non-existent, disable CONFIG_ARC_FPU_SAVE_RESTORE\n");
  230. }
  231. /*
  232. * Initialize and setup the processor core
  233. * This is called by all the CPUs thus should not do special case stuff
  234. * such as only for boot CPU etc
  235. */
  236. void setup_processor(void)
  237. {
  238. char str[512];
  239. int cpu_id = smp_processor_id();
  240. read_arc_build_cfg_regs();
  241. arc_init_IRQ();
  242. printk(arc_cpu_mumbojumbo(cpu_id, str, sizeof(str)));
  243. arc_mmu_init();
  244. arc_cache_init();
  245. printk(arc_extn_mumbojumbo(cpu_id, str, sizeof(str)));
  246. printk(arc_platform_smp_cpuinfo());
  247. arc_chk_core_config();
  248. }
  249. static inline int is_kernel(unsigned long addr)
  250. {
  251. if (addr >= (unsigned long)_stext && addr <= (unsigned long)_end)
  252. return 1;
  253. return 0;
  254. }
  255. void __init setup_arch(char **cmdline_p)
  256. {
  257. /* make sure that uboot passed pointer to cmdline/dtb is valid */
  258. if (uboot_tag && is_kernel((unsigned long)uboot_arg))
  259. panic("Invalid uboot arg\n");
  260. /* See if u-boot passed an external Device Tree blob */
  261. machine_desc = setup_machine_fdt(uboot_arg); /* uboot_tag == 2 */
  262. if (!machine_desc) {
  263. /* No, so try the embedded one */
  264. machine_desc = setup_machine_fdt(__dtb_start);
  265. if (!machine_desc)
  266. panic("Embedded DT invalid\n");
  267. /*
  268. * If we are here, it is established that @uboot_arg didn't
  269. * point to DT blob. Instead if u-boot says it is cmdline,
  270. * Appent to embedded DT cmdline.
  271. * setup_machine_fdt() would have populated @boot_command_line
  272. */
  273. if (uboot_tag == 1) {
  274. /* Ensure a whitespace between the 2 cmdlines */
  275. strlcat(boot_command_line, " ", COMMAND_LINE_SIZE);
  276. strlcat(boot_command_line, uboot_arg,
  277. COMMAND_LINE_SIZE);
  278. }
  279. }
  280. /* Save unparsed command line copy for /proc/cmdline */
  281. *cmdline_p = boot_command_line;
  282. /* To force early parsing of things like mem=xxx */
  283. parse_early_param();
  284. /* Platform/board specific: e.g. early console registration */
  285. if (machine_desc->init_early)
  286. machine_desc->init_early();
  287. setup_processor();
  288. smp_init_cpus();
  289. setup_arch_memory();
  290. /* copy flat DT out of .init and then unflatten it */
  291. unflatten_and_copy_device_tree();
  292. /* Can be issue if someone passes cmd line arg "ro"
  293. * But that is unlikely so keeping it as it is
  294. */
  295. root_mountflags &= ~MS_RDONLY;
  296. #if defined(CONFIG_VT) && defined(CONFIG_DUMMY_CONSOLE)
  297. conswitchp = &dummy_con;
  298. #endif
  299. arc_unwind_init();
  300. arc_unwind_setup();
  301. }
  302. static int __init customize_machine(void)
  303. {
  304. of_clk_init(NULL);
  305. /*
  306. * Traverses flattened DeviceTree - registering platform devices
  307. * (if any) complete with their resources
  308. */
  309. of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
  310. if (machine_desc->init_machine)
  311. machine_desc->init_machine();
  312. return 0;
  313. }
  314. arch_initcall(customize_machine);
  315. static int __init init_late_machine(void)
  316. {
  317. if (machine_desc->init_late)
  318. machine_desc->init_late();
  319. return 0;
  320. }
  321. late_initcall(init_late_machine);
  322. /*
  323. * Get CPU information for use by the procfs.
  324. */
  325. #define cpu_to_ptr(c) ((void *)(0xFFFF0000 | (unsigned int)(c)))
  326. #define ptr_to_cpu(p) (~0xFFFF0000UL & (unsigned int)(p))
  327. static int show_cpuinfo(struct seq_file *m, void *v)
  328. {
  329. char *str;
  330. int cpu_id = ptr_to_cpu(v);
  331. str = (char *)__get_free_page(GFP_TEMPORARY);
  332. if (!str)
  333. goto done;
  334. seq_printf(m, arc_cpu_mumbojumbo(cpu_id, str, PAGE_SIZE));
  335. seq_printf(m, "Bogo MIPS\t: %lu.%02lu\n",
  336. loops_per_jiffy / (500000 / HZ),
  337. (loops_per_jiffy / (5000 / HZ)) % 100);
  338. seq_printf(m, arc_mmu_mumbojumbo(cpu_id, str, PAGE_SIZE));
  339. seq_printf(m, arc_cache_mumbojumbo(cpu_id, str, PAGE_SIZE));
  340. seq_printf(m, arc_extn_mumbojumbo(cpu_id, str, PAGE_SIZE));
  341. seq_printf(m, arc_platform_smp_cpuinfo());
  342. free_page((unsigned long)str);
  343. done:
  344. seq_printf(m, "\n\n");
  345. return 0;
  346. }
  347. static void *c_start(struct seq_file *m, loff_t *pos)
  348. {
  349. /*
  350. * Callback returns cpu-id to iterator for show routine, NULL to stop.
  351. * However since NULL is also a valid cpu-id (0), we use a round-about
  352. * way to pass it w/o having to kmalloc/free a 2 byte string.
  353. * Encode cpu-id as 0xFFcccc, which is decoded by show routine.
  354. */
  355. return *pos < num_possible_cpus() ? cpu_to_ptr(*pos) : NULL;
  356. }
  357. static void *c_next(struct seq_file *m, void *v, loff_t *pos)
  358. {
  359. ++*pos;
  360. return c_start(m, pos);
  361. }
  362. static void c_stop(struct seq_file *m, void *v)
  363. {
  364. }
  365. const struct seq_operations cpuinfo_op = {
  366. .start = c_start,
  367. .next = c_next,
  368. .stop = c_stop,
  369. .show = show_cpuinfo
  370. };
  371. static DEFINE_PER_CPU(struct cpu, cpu_topology);
  372. static int __init topology_init(void)
  373. {
  374. int cpu;
  375. for_each_present_cpu(cpu)
  376. register_cpu(&per_cpu(cpu_topology, cpu), cpu);
  377. return 0;
  378. }
  379. subsys_initcall(topology_init);