Commit History

Author SHA1 Message Date
  Alex Deucher 81bb773f35 drm/amdgpu/soc15: fix warnings in register macro 6 years ago
  James Zhu 03d6e3aac8 drm/amdgpu:Add DPG mode read/write macro 7 years ago
  James Zhu 52e211c1f0 drm/amdgpu:Add error message when register failed to reach expected value 7 years ago
  Rex Zhu ac06b4cfd7 drm/amdgpu: Add SOC15_WAIT_ON_RREG macro define 7 years ago
  Alex Deucher bf383fb64e drm/amdgpu: convert nbio to use callbacks (v2) 7 years ago
  Shaoyun Liu cd29253f65 drm/amdgpu: Change SOC15_REG_OFFSET to use dynamic register offset 7 years ago
  Shaoyun Liu 946a4d5b30 drm/amdgpu: Avoid use SOC15_REG_OFFSET in static const array 7 years ago
  Shaoyun Liu b466107e8b drm/amdgpu: Use dynamic IP offset for register access on SOC15 7 years ago
  Shaoyun Liu c708535e9c drm/amdgpu: Add WREG32_SOC15_NO_KIQ macro define 8 years ago
  Tom St Denis 496828e786 drm/amd/amdgpu: Add offset variant to SOC15 macros 8 years ago
  Tom St Denis b1bb8c0118 drm/amd/amdgpu: Introduce new read/write macros for SOC15 8 years ago
  Ken Wang 8e3153ba3f drm/amdgpu: add common soc15 headers 8 years ago