 Chunyan Zhang
|
1ded879e12
clk: move clock common macros out from vendor directories
|
%!s(int64=7) %!d(string=hai) anos |
 Chen-Yu Tsai
|
05d2eaac96
clk: sunxi-ng: Add sigma-delta modulation support
|
%!s(int64=8) %!d(string=hai) anos |
|
Chen-Yu Tsai
|
f6f64ed868
clk: sunxi-ng: Add interface to query or configure MMC timing modes.
|
%!s(int64=8) %!d(string=hai) anos |
|
Chen-Yu Tsai
|
02ae2bc6fe
clk: sunxi-ng: Add clk notifier to gate then ungate PLL clocks
|
%!s(int64=8) %!d(string=hai) anos |
|
Chen-Yu Tsai
|
3de64bf187
clk: sunxi-ng: Support separately grouped PLL lock status register
|
%!s(int64=8) %!d(string=hai) anos |
 Maxime Ripard
|
7c09b85896
clk: sunxi-ng: Implement global pre-divider
|
%!s(int64=8) %!d(string=hai) anos |
|
Maxime Ripard
|
1d80c14248
clk: sunxi-ng: Add common infrastructure
|
%!s(int64=9) %!d(string=hai) anos |
