Commit History

Author SHA1 Message Date
  Jerome Brunet dd601dbc01 clk: meson: clk-pll: drop hard-coded rates from pll tables 7 years ago
  Jerome Brunet 87173557d2 clk: meson: clk-pll: remove od parameters 7 years ago
  Jerome Brunet e40c7e3cda clk: meson: clk-pll: add enable bit 7 years ago
  Jerome Brunet 85ddc1a32c clk: meson: remove unused clk-audio-divider driver 7 years ago
  Jerome Brunet 47f21315a6 clk: meson: add clk-phase clock driver 7 years ago
  Jerome Brunet bae1106c37 clk: meson: mpll: add round closest support 7 years ago
  Jerome Brunet 22f65a389f clk: meson: use SPDX license identifiers consistently 7 years ago
  Jerome Brunet 0a1be867b9 clk: meson: add ROUND_CLOSEST to the pll driver 7 years ago
  Jerome Brunet 8289aafa4f clk: meson: improve pll driver results with frac 7 years ago
  Jerome Brunet c178b003bf clk: meson: remove special gp0 lock loop 7 years ago
  Jerome Brunet 03a6519e9c clk: meson: remove obsolete cpu_clk 7 years ago
  Jerome Brunet d610b54f77 clk: meson: split divider and gate part of mpll 7 years ago
  Jerome Brunet 722825dcd5 clk: meson: migrate plls clocks to clk_regmap 7 years ago
  Jerome Brunet 88a4e12836 clk: meson: migrate the audio divider clock to clk_regmap 7 years ago
  Jerome Brunet c763e61ae8 clk: meson: migrate mplls clocks to clk_regmap 7 years ago
  Jerome Brunet f510c32a6a clk: meson: add regmap helpers for parm 7 years ago
  Jerome Brunet 7f9768a540 clk: meson: migrate gates to clk_regmap 7 years ago
  Jerome Brunet 6c00e7b760 clk: meson: add axg misc bit to the mpll driver 7 years ago
  Jerome Brunet 7d3142e5d6 clk: meson: add od3 to the pll driver 7 years ago
  Yixun Lan 27aad90548 clk: meson: make the spinlock naming more specific 7 years ago
  Jerome Brunet 1f737ffa13 clk: meson: mpll: fix mpll0 fractional part ignored 8 years ago
  Jerome Brunet 59e85335dd clk: meson: add audio clock divider support 8 years ago
  Neil Armstrong 45fcbec70c clk: meson: Add support for parameters for specific PLLs 8 years ago
  Jerome Brunet 007e6e5c5f clk: meson: mpll: add rw operation 8 years ago
  Jerome Brunet 1ddfe82ed8 clk: meson: fix SET_PARM macro 8 years ago
  Alexander Müller 7ba64d82b3 gxbb: clk: Adjust MESON_GATE macro to be shared with meson8b 9 years ago
  Michael Turquette 4a47295144 clk: meson: fractional pll support 9 years ago
  Michael Turquette 1c50da4f27 clk: meson: add mpll support 9 years ago
  Michael Turquette 73de5c8bcf clk: meson: add peripheral gate macro 9 years ago
  Michael Turquette c0daa3e6f5 clk: meson8b: clean up composite clocks 9 years ago