 Jerome Brunet
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bae1106c37
clk: meson: mpll: add round closest support
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7 years ago |
|
Jerome Brunet
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22f65a389f
clk: meson: use SPDX license identifiers consistently
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7 years ago |
|
Jerome Brunet
|
d610b54f77
clk: meson: split divider and gate part of mpll
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7 years ago |
|
Jerome Brunet
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c763e61ae8
clk: meson: migrate mplls clocks to clk_regmap
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7 years ago |
|
Jerome Brunet
|
6c00e7b760
clk: meson: add axg misc bit to the mpll driver
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7 years ago |
 Martin Blumenstingl
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86aacdca66
clk: meson: mpll: use 64-bit maths in params_from_rate
|
7 years ago |
|
Jerome Brunet
|
1f737ffa13
clk: meson: mpll: fix mpll0 fractional part ignored
|
8 years ago |
|
Martin Blumenstingl
|
b609338b26
clk: meson: mpll: use 64bit math in rate_from_params
|
8 years ago |
|
Martin Blumenstingl
|
88e4ac68ea
clk: meson: mpll: fix division by zero in rate_from_params
|
8 years ago |
|
Jerome Brunet
|
b68fb7871e
clk: meson: mpll: correct N2 maximum value
|
8 years ago |
|
Jerome Brunet
|
007e6e5c5f
clk: meson: mpll: add rw operation
|
8 years ago |
 Michael Turquette
|
1c50da4f27
clk: meson: add mpll support
|
9 years ago |
