 Andrew Lunn
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59c3191628
ARM: 8350/1: proc-feroceon: Fix feroceon_proc_info macro
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%!s(int64=10) %!d(string=hai) anos |
 Ard Biesheuvel
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bf35706f3d
ARM: 8314/1: replace PROCINFO embedded branch with relative offset
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%!s(int64=10) %!d(string=hai) anos |
 Russell King
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6ebbf2ce43
ARM: convert all "mov.* pc, reg" to "bx reg" for ARMv6+
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%!s(int64=11) %!d(string=hai) anos |
 Ezequiel Garcia
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19a0519d36
ARM: 7818/1: feroceon: Add suspend/resume operation
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%!s(int64=12) %!d(string=hai) anos |
 Paul Gortmaker
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8bd26e3a7e
arm: delete __cpuinit/__CPUINIT usage from all ARM users
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%!s(int64=12) %!d(string=hai) anos |
 Lorenzo Pieralisi
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8ee777fd91
ARM: 7542/1: mm: fix cache LoUIS API for xscale and feroceon
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%!s(int64=13) %!d(string=hai) anos |
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Lorenzo Pieralisi
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031bd879f7
ARM: mm: implement LoUIS API for cache maintenance ops
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%!s(int64=13) %!d(string=hai) anos |
 Will Deacon
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c5102f5935
ARM: 7408/1: cacheflush: return error to userspace when flushing syscall fails
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%!s(int64=13) %!d(string=hai) anos |
|
Will Deacon
|
1a4baafa7d
ARM: proc-*.S: place cpu_reset functions into .idmap.text section
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%!s(int64=14) %!d(string=hai) anos |
 Dave Martin
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e43b670e24
ARM: mm: proc-feroceon: Use the new processor struct macros
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%!s(int64=14) %!d(string=hai) anos |
|
Russell King
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f6b0fa02e8
ARM: pm: add generic CPU suspend/resume support
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%!s(int64=14) %!d(string=hai) anos |
 Mika Westerberg
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c8c90860cd
ARM: 6466/1: implement flush_icache_all for the rest of the CPUs
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%!s(int64=15) %!d(string=hai) anos |
|
Russell King
|
5085f3ff45
ARM: hotplug cpu: Keep processor information, startup code & __lookup_processor_type
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%!s(int64=15) %!d(string=hai) anos |
|
Russell King
|
9ca03a21e3
ARM: Factor out common code from cpu_proc_fin()
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%!s(int64=15) %!d(string=hai) anos |
|
Russell King
|
702b94bff3
ARM: dma-mapping: remove dmac_clean_range and dmac_inv_range
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%!s(int64=16) %!d(string=hai) anos |
|
Russell King
|
a9c9147eb9
ARM: dma-mapping: provide per-cpu type map/unmap functions
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%!s(int64=16) %!d(string=hai) anos |
|
Russell King
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2c9b9c8490
ARM: add size argument to __cpuc_flush_dcache_page
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%!s(int64=16) %!d(string=hai) anos |
 Kirill A. Shutemov
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4fb2847437
ARM: 5727/1: Pass IFSR register to do_PrefetchAbort()
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%!s(int64=16) %!d(string=hai) anos |
 Russell King
|
6defd90433
Merge branch 'for-rmk' of git://git.marvell.com/orion
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%!s(int64=17) %!d(string=hai) anos |
|
Russell King
|
5ec9407dd1
[ARM] Don't include asm/elf.h in asm code
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%!s(int64=17) %!d(string=hai) anos |
|
Russell King
|
da0916539d
[ARM] Convert set_pte_ext implementions to macros
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%!s(int64=17) %!d(string=hai) anos |
 Ronen Shitrit
|
4360bb4192
[ARM] Kirkwood: add support for L2 cache WB/WT selection
|
%!s(int64=17) %!d(string=hai) anos |
 Saeed Bishara
|
188237e28d
[ARM] Feroceon: don't disable BPU on boot
|
%!s(int64=17) %!d(string=hai) anos |
 Lennert Buytenhek
|
0a17c7bc0b
[ARM] Feroceon: 88fr571-vd support
|
%!s(int64=17) %!d(string=hai) anos |
|
Lennert Buytenhek
|
9c2af6c57c
[ARM] Feroceon: 88fr131 support
|
%!s(int64=17) %!d(string=hai) anos |
|
Lennert Buytenhek
|
99c6dc117d
[ARM] Feroceon: L2 cache support
|
%!s(int64=17) %!d(string=hai) anos |
 Stanislav Samsonov
|
836a8051d5
[ARM] Feroceon: L1 cache range operation support
|
%!s(int64=17) %!d(string=hai) anos |
 Ke Wei
|
ab6d15d506
[ARM] Feroceon: allow more old Feroceon IDs
|
%!s(int64=17) %!d(string=hai) anos |
 Nicolas Pitre
|
6c386e58aa
[ARM] Feroceon: speed up flushing of the entire cache
|
%!s(int64=17) %!d(string=hai) anos |
|
Lennert Buytenhek
|
ee0dd84005
[ARM] Feroceon: annotate 88fr531-vd CPU entries
|
%!s(int64=17) %!d(string=hai) anos |
