 Daniel Vetter
|
bbd440fb81
drm/i915: Don't rely upon encoder->type for infoframe hw state readout
|
%!s(int64=10) %!d(string=hai) anos |
 Jesse Barnes
|
f061b9be74
drm/i915/ddi: set has_infoframe flag on DDI too v2
|
%!s(int64=10) %!d(string=hai) anos |
|
Jesse Barnes
|
cbc572a9a5
drm/i915/ddi: add break in DDI mode select switch
|
%!s(int64=10) %!d(string=hai) anos |
 Damien Lespiau
|
134ffa44d1
drm/i915/skl: Use the pipe config DPLL tracking to query the link clock
|
%!s(int64=10) %!d(string=hai) anos |
|
Damien Lespiau
|
5416d87113
drm/i915/skl: Set the eDP link rate on DPLL0
|
%!s(int64=10) %!d(string=hai) anos |
 Rodrigo Vivi
|
0bc12bcb1b
drm/i915: Introduce intel_psr.c
|
%!s(int64=10) %!d(string=hai) anos |
|
Damien Lespiau
|
21318cce5a
drm/i915/skl: Fix big integer constant sparse warning
|
%!s(int64=10) %!d(string=hai) anos |
 Vandana Kannan
|
23f08d8340
drm/i915/skl: Apply eDP WA only for gen < 9
|
%!s(int64=10) %!d(string=hai) anos |
 Satheeshakrishna M
|
82d3543701
drm/i915/skl: Implementation of SKL DPLL programming
|
%!s(int64=10) %!d(string=hai) anos |
|
Satheeshakrishna M
|
efa80add54
drm/i915/skl: Adjust the port PLL selection code
|
%!s(int64=10) %!d(string=hai) anos |
|
Satheeshakrishna M
|
d1a2dc7835
drm/i915/skl: Define shared DPLLs for Skylake
|
%!s(int64=10) %!d(string=hai) anos |
|
Satheeshakrishna M
|
540e732c8e
drm/i915/skl: Determine enabled PLL and its linkrate/pixel clock
|
%!s(int64=10) %!d(string=hai) anos |
|
Satheeshakrishna M
|
121643c2c9
drm/i915/skl: CD clock back calculation for SKL
|
%!s(int64=10) %!d(string=hai) anos |
 Jani Nikula
|
82910ac6d5
drm/i915: make pipe/port based audio valid accessors easier to use
|
%!s(int64=11) %!d(string=hai) anos |
 Ander Conselvan de Oliveira
|
797d025923
drm/i915: Covert HSW+ to choose DPLLS before disabling CRTCs
|
%!s(int64=11) %!d(string=hai) anos |
|
Ander Conselvan de Oliveira
|
3e369b76ce
drm/i915: Move dpll crtc_mask and hw_state fields into separate struct
|
%!s(int64=11) %!d(string=hai) anos |
|
Ander Conselvan de Oliveira
|
d0737e1d59
drm/i915: Make *_crtc_mode_set work on new_config
|
%!s(int64=11) %!d(string=hai) anos |
|
Jani Nikula
|
69bfe1a9b4
drm/i915: introduce intel_audio_codec_{enable, disable}
|
%!s(int64=11) %!d(string=hai) anos |
|
Jani Nikula
|
2aa0de39fa
drm/i915/ddi: write ELD where it's supposed to be done
|
%!s(int64=11) %!d(string=hai) anos |
|
Jani Nikula
|
33d1e7c6f4
drm/i915: pass intel_encoder to intel_write_eld
|
%!s(int64=11) %!d(string=hai) anos |
|
Damien Lespiau
|
95626e7caa
drm/i915: Use IS_HSW_ULT() in HSW CDCLK clock read-out
|
%!s(int64=11) %!d(string=hai) anos |
|
Daniel Vetter
|
f458ebbc33
drm/i915: Bikeshed rpm functions name a bit.
|
%!s(int64=11) %!d(string=hai) anos |
|
Daniel Vetter
|
955e36d0b4
Merge branch 'topic/skl-stage1' into drm-intel-next-queued
|
%!s(int64=11) %!d(string=hai) anos |
|
Rodrigo Vivi
|
6805b2a743
drm/i915: Broadwell DDI Buffer translation - more tuning
|
%!s(int64=11) %!d(string=hai) anos |
|
Rodrigo Vivi
|
17b523ba5c
drm/i915: Broadwell DDI Buffer translation changed to give better margin.
|
%!s(int64=11) %!d(string=hai) anos |
|
Damien Lespiau
|
7f88e3af20
drm/i915/skl: Program the DDI buffer translation tables
|
%!s(int64=11) %!d(string=hai) anos |
|
Damien Lespiau
|
2789339044
drm/i915: Rewrite ABS_DIFF() in a safer manner
|
%!s(int64=11) %!d(string=hai) anos |
|
Jani Nikula
|
1012205182
drm/i915/ddi: use struct for ddi buf translation tables
|
%!s(int64=11) %!d(string=hai) anos |
 Sonika Jindal
|
c5fe6a0637
drm/i915: Rename defines for selection of ddi buffer translation slot
|
%!s(int64=11) %!d(string=hai) anos |
|
Damien Lespiau
|
d6699dd3a7
drm/i915: Fix wrong number of HDMI translation entries
|
%!s(int64=11) %!d(string=hai) anos |
