 Chris Wilson
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0f46daa1a2
drm/i915: Force CPU synchronisation even if userspace requests ASYNC
|
8 years ago |
|
Chris Wilson
|
7fc92e96c3
drm/i915: Store i915_gem_object_is_coherent() as a bit next to cache-dirty
|
8 years ago |
|
Chris Wilson
|
e27ab73d17
drm/i915: Mark CPU cache as dirty on every transition for CPU writes
|
8 years ago |
|
Chris Wilson
|
9431282832
drm/i915: Mark up clflushes as belonging to an unordered timeline
|
8 years ago |
|
Chris Wilson
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d223760f38
drm/i915: Wait for all fences before installing an exclusive clflush fence
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8 years ago |
|
Chris Wilson
|
d59b21ec6f
drm/i915: Remove 'retire' parameter from intel_fb_obj_flush
|
8 years ago |
|
Chris Wilson
|
57822dc6b9
drm/i915: Perform object clflushing asynchronously
|
8 years ago |
