 Ville Syrjälä
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67956867aa
drm/i915: Don't spam dmesg with rps messages on vlv/chv
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11 years ago |
 Daniel Vetter
|
7526ed79b0
Revert "drm/i915/bdw: BDW Software Turbo"
|
11 years ago |
|
Ville Syrjälä
|
d6feb1962d
drm/i915: Limit the watermark to at least 8 entries on gen2/3
|
11 years ago |
|
Ville Syrjälä
|
773538e860
drm/i915: Reset power sequencer pipe tracking when disp2d is off
|
11 years ago |
 Chris Wilson
|
5aef600321
drm/i915: Rename global latency_ns variable
|
11 years ago |
|
Ville Syrjälä
|
1038392b4d
drm/i915: Disable trickle feed for gen2/3
|
11 years ago |
|
Ville Syrjälä
|
9d53910580
drm/i915: Fix gen2 planes B and C max watermark value
|
11 years ago |
|
Ville Syrjälä
|
00e1e623e6
drm/i915: Init some CHV workarounds via LRIs in ring->init_context()
|
11 years ago |
|
Ville Syrjälä
|
1c14762d0c
drm/i915: Warn about odd rps values on CHV
|
11 years ago |
 Daisy Sun
|
c76bb61a71
drm/i915/bdw: BDW Software Turbo
|
11 years ago |
|
Ville Syrjälä
|
2bb25c17bb
drm/i915: Populate mem_freq in init_gt_powerwave()
|
11 years ago |
 Arun Siluvery
|
86d7f23842
drm/i915/bdw: Apply workarounds in render ring init function
|
11 years ago |
 Rodrigo Vivi
|
c5ad011d7d
drm/i915: FBC flush nuke for BDW
|
11 years ago |
 Paulo Zanoni
|
47c2bd97cf
drm/i915: rename gen8_init_clock_gating to broadwell_init_clock_gating
|
11 years ago |
|
Paulo Zanoni
|
89d6b2b81f
drm/i915: call lpt_init_clock_gating on BDW too
|
11 years ago |
 Deepak S
|
98a2e5f942
drm/i915: Bring UP Power Wells before disabling RC6.
|
11 years ago |
 Damien Lespiau
|
055e393fa3
drm/i915: Use dev_priv as first argument of for_each_pipe()
|
11 years ago |
 Sonika Jindal
|
48404c1e53
drm/i915: Add 180 degree primary plane rotation support
|
11 years ago |
 Dave Airlie
|
a18b29f0c6
Merge tag 'drm-intel-next-2014-09-01' of git://anongit.freedesktop.org/drm-intel into drm-next
|
11 years ago |
|
Dave Airlie
|
d5a0f2e7be
Merge tag 'drm-intel-next-2014-08-08' of git://anongit.freedesktop.org/drm-intel into drm-next
|
11 years ago |
|
Damien Lespiau
|
1bee20175f
drm/i915: Remove set but unused 'gt_perf_status'
|
11 years ago |
 Linus Torvalds
|
889fa782bf
Merge tag 'drm-intel-fixes-2014-08-08' of git://anongit.freedesktop.org/drm-intel
|
11 years ago |
 Gajanan Bhat
|
01e184cc85
drm/i915: Add sprite watermark programming for VLV and CHV
|
11 years ago |
|
Gajanan Bhat
|
a398e9c79e
drm/i915: Round-up clock and limit drain latency
|
11 years ago |
|
Gajanan Bhat
|
0948c26514
drm/i915: Generalize drain latency computation
|
11 years ago |
|
Ville Syrjälä
|
efd814b73c
drm/i915: Polish the chv cmnlane resrt macros
|
11 years ago |
|
Ville Syrjälä
|
3dd7b97458
drm/i915: Hack to tie both common lanes together on chv
|
11 years ago |
|
Ville Syrjälä
|
3c2777fd2f
drm/i915: Add cherryview_update_wm()
|
11 years ago |
|
Gajanan Bhat
|
41aad816d7
drm/i915: Update DDL only for current CRTC
|
11 years ago |
|
Ville Syrjälä
|
1abc4dc7e2
drm/i915: Parametrize VLV_DDL registers
|
11 years ago |
