Commit History

Autor SHA1 Mensaxe Data
  Thomas Gleixner bd0b9ac405 genirq: Remove irq argument from irq flow handlers %!s(int64=10) %!d(string=hai) anos
  Thomas Gleixner badae6bc94 arc/irq: Prepare idu_cascade_isr for irq argument removal %!s(int64=10) %!d(string=hai) anos
  Joël Porquet 70d93d8941 arc:irqchip: prepare for drivers/irqchip/irqchip.h removal %!s(int64=10) %!d(string=hai) anos
  Vineet Gupta 6b12ec177c ARCv2: intc: IDU: Fix potential race in installing a chained IRQ handler %!s(int64=10) %!d(string=hai) anos
  Vineet Gupta 83ce3e6fcc ARCv2: intc: IDU: support irq affinity %!s(int64=10) %!d(string=hai) anos
  Vineet Gupta eaf0ecc33f ARCv2: SMP: intc: IDU 2nd level intc for dynamic IRQ distribution %!s(int64=10) %!d(string=hai) anos
  Vineet Gupta 72d7288061 ARCv2: SMP: clocksource: Enable Global Real Time counter %!s(int64=10) %!d(string=hai) anos
  Vineet Gupta aa6083ed50 ARCv2: SMP: ARConnect debug/robustness %!s(int64=10) %!d(string=hai) anos
  Vineet Gupta 82fea5a1bb ARCv2: SMP: Support ARConnect (MCIP) for Inter-Core-Interrupts et al %!s(int64=11) %!d(string=hai) anos