Commit History

Author SHA1 Message Date
  Andrew Bresticker 15d68e8c2e clk: tegra: Initialize UTMI PLL when enabling PLLU 9 years ago
  Thierry Reding 74d3ba0b6f clk: tegra: Micro-optimize Tegra210 clock setup 9 years ago
  Thierry Reding 2e34c2ac16 clk: tegra: Make sor_safe the parent of dpaux and dpaux1 9 years ago
  Thierry Reding e452b818db clk: tegra: Enable sor1 and sor1_src on Tegra210 9 years ago
  Thierry Reding e2f716561b clk: tegra: Disable spread spectrum on pll_d2 10 years ago
  Thierry Reding eddb65e7fd clk: tegra: Fixup post dividers on Tegra210 9 years ago
  Arnd Bergmann 287980e49f remove lots of IS_ERR_VALUE abuses 9 years ago
  Rhyland Klein 926655f929 clk: tegra: Fix pllre Tegra210 and add pll_re_out1 9 years ago
  Thierry Reding a91bb605ec clk: tegra: Add sor_safe clock 10 years ago
  Thierry Reding eede7113aa clk: tegra: dpaux and dpaux1 are fixed factor clocks 10 years ago
  Thierry Reding 98c4b3661b clk: tegra: Add dpaux1 clock 10 years ago
  Andrew Bresticker 3358d2d9f4 clk: tegra: Add interface to enable hardware control of SATA/XUSB PLLs 10 years ago
  Jon Hunter fd360e2084 clk: tegra: Fix sparse warnings for functions not declared as static 9 years ago
  Jon Hunter d9e657919a clk: tegra: Fix sparse warning for pll_m 9 years ago
  Jon Hunter 2d5b6cf84a clk: tegra: Use definition for pll_u override bit 9 years ago
  Jon Hunter 0649c3232b clk: tegra: Fix warning caused by pll_u failing to lock 9 years ago
  Jon Hunter 4f8d444030 clk: tegra: Fix clock sources for Tegra210 EMC 9 years ago
  Jon Hunter 2956994168 clk: tegra: Add the APB2APE audio clock on Tegra210 9 years ago
  Rhyland Klein 3dad5c5fa1 clk: tegra: Fix pllx dyn step calculation 9 years ago
  Rhyland Klein 474f2ba268 clk: tegra: Fix naming of MISC registers 9 years ago
  Rhyland Klein 14050118af clk: tegra: Remove improper flags for lock_enable 9 years ago
  Rhyland Klein 6b301a059e clk: tegra: Add support for Tegra210 clocks 10 years ago