Historique des commits

Auteur SHA1 Message Date
  Kevin Cernekee 18d693b359 MIPS: Allow UserLocal on MIPS_R1 processors il y a 15 ans
  Deng-Cheng Zhu 7f788d2d53 MIPS: add support for software performance events il y a 15 ans
  David Howells ca4d3e6746 MIPS: Add missing #inclusions of <linux/irq.h> il y a 15 ans
  David Daney 70dc6f045f MIPS: Clean up notify_die() usage. il y a 15 ans
  David Daney 7281cd2297 MIPS: Remove unused task_struct.trap_no field. il y a 15 ans
  David Daney c1bf207d6e MIPS: kprobe: Add support. il y a 15 ans
  Ralf Baechle 4483b15916 MIPS: Provide more elevant interface cu2_notifier for CP2 extensions. il y a 15 ans
  Jesper Nilsson 55dc9d51a8 MIPS: Return after handling coprocessor 2 exception il y a 15 ans
  Linus Torvalds 6969a43473 Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus il y a 15 ans
  Julia Lawall ed1bbdefc3 MIPS: Use set_cpus_allowed_ptr il y a 15 ans
  Jason Wessel 5dd11d5d47 mips,kgdb: kdb low level trap catch and stack trace il y a 15 ans
  Sebastian Andrzej Siewior 4f81b01a30 MIPS: Use CKSEG1ADDR for uncached handler il y a 15 ans
  Yury Polyanskiy ce384d83d0 MIPS: die() does not call die notifier chain il y a 15 ans
  David Daney f6be75d03c MIPS: Calculate proper ebase value for 64-bit kernels il y a 15 ans
  Florian Fainelli 92bbe1b988 MIPS: Deal with larger physical offsets il y a 16 ans
  Florian Fainelli 2d1b6e9551 MIPS: Annotate set_except_vector with __init il y a 16 ans
  Wu Zhangjin f4fc580bec MIPS: Fixup of the r4k timer il y a 16 ans
  David VomLehn 010c108d7a MIPS: PowerTV: Fix support for timer interrupts with > 64 external IRQs il y a 16 ans
  Ralf Baechle 137f6f3e28 MIPS: Cleanup signal code initialization il y a 16 ans
  Ralf Baechle 69f3a7de1f MIPS: Modularize COP2 handling il y a 16 ans
  Ralf Baechle f1e39a4a61 MIPS: Rewrite sysmips(MIPS_ATOMIC_SET, ...) in C with inline assembler il y a 16 ans
  David Daney 4bb1a1089e MIPS: Move Cavium CP0 hwrena impl bits to cpu-feature-overrides.h il y a 16 ans
  David Daney fbeda19f82 MIPS: Allow CPU specific overriding of CP0 hwrena impl bits. il y a 16 ans
  Ralf Baechle b72b7092f8 MIPS: Use BUG_ON() where possible. il y a 16 ans
  Chris Dearman 9fb4c2b9e0 MIPS: R2: Fix problem with code that incorrectly modifies ebase. il y a 16 ans
  David Daney 8bc6d05b48 MIPS: Read watch registers with interrupts disabled. il y a 17 ans
  Ralf Baechle 42fe7ee31f MIPS: R2: Fix broken installation of cache error handler. il y a 17 ans
  David Daney f9bb4cf37a MIPS: For Cavium OCTEON set hwrena and lazily restore CP2 state. il y a 17 ans
  Ralf Baechle ba3049ed40 MIPS: Switch FPU emulator trap to BREAK instruction. il y a 17 ans
  David Daney 566f74f6b2 MIPS: Consider value of c0_ebase when computing value of exception base. il y a 17 ans