Commit History

Author SHA1 Message Date
  Jim Bride e058c945e0 drm/i915/hsw: Fix workaround for server AUX channel clock divisor 10 years ago
  Sonika Jindal af77b97413 drm/i915: Sink rate read should be saved in deca-kHz 10 years ago
  Jani Nikula 9fcb1704d1 drm/i915/dp: there is no audio on port A 10 years ago
  Ander Conselvan de Oliveira 08d9bc920d drm/i915: Allocate connector state together with the connectors 10 years ago
  Clint Taylor af8fcb9c58 drm/i915/chv: Remove DPIO force latency causing interpair skew issue 10 years ago
  Daniel Vetter 88f933a8b0 drm/i915: Don't cancel DRRS worker synchronously for flush/invalidate 10 years ago
  Daniel Vetter 9da7d69357 drm/i915: Fix locking in DRRS flush/invalidate hooks 10 years ago
  Ander Conselvan de Oliveira 723f9aab55 drm/i915: Don't look at staged config crtc when changing DRRS state 10 years ago
  Ander Conselvan de Oliveira 84556d58ef drm/i915: Don't depend on encoder->new_crtc in intel_dp_compute_config() 10 years ago
  Ander Conselvan de Oliveira 989697255d drm/i915: Implement connector state duplication 10 years ago
  Ramalingam C c2d885c6c9 drm/i915: Removing the drrs capability enum initialization 10 years ago
  Ville Syrjälä d2d9cbbd22 drm/i915: Send out the full AUX address 10 years ago
  Jani Nikula a1ddefd8f3 drm/i915/dp: return number of bytes written for short aux/i2c writes 10 years ago
  Ville Syrjälä 94ca719ee4 drm/i915: Unconfuse DP link rate array names 10 years ago
  Ville Syrjälä 0336400ebe drm/i915: Include the sink/source/supported rates in debug output 10 years ago
  Ville Syrjälä fe51bfb95c drm/i915: Add eDP intermediate frequencies for CHV 10 years ago
  Ville Syrjälä e6bda3e4cb drm/i915: Avoid overflowing the DP link rate arrays 10 years ago
  Ville Syrjälä ed4e9c1d46 drm/i915: Fix MST link rate handling 10 years ago
  Ville Syrjälä bc27b7d3f0 drm/i915: Use DP_LINK_RATE_SET whenever possible 10 years ago
  Ville Syrjälä 50fec21a7d drm/i915: Fix max link rate in intel_dp_mode_valid() 10 years ago
  Ville Syrjälä 2ecae76ad6 drm/i915: Hide the source vs. sink rate handling from intel_dp_compute_config() 10 years ago
  Ville Syrjälä 1db10e28b2 drm/i915: Fully separate source vs. sink rates 10 years ago
  Ville Syrjälä d098a50543 drm/i915: Remove special case from intel_supported_rates() 10 years ago
  Ville Syrjälä 12f6a2e21b drm/i915: Don't copy sink rates either 10 years ago
  Ville Syrjälä 636280ba55 drm/i915: Don't copy the DP source rates arrays 10 years ago
  Ville Syrjälä ea2d8a427f drm/i915: Store the converted link rates in intel_dp->supported_rates[] 10 years ago
  Ville Syrjälä f4896f1529 drm/i915: Make the DP rates int instead of uint32_t 10 years ago
  Damien Lespiau 8749be86a8 drm/i915/skl: Implement WaDisableHBR2 10 years ago
  Sonika Jindal c3346ef688 drm/i915/skl: Program PLL for edp1.4 intermediate frequencies 10 years ago
  Sonika Jindal a8f3ef6197 drm/i915/skl: Add support for edp 1.4 intermediate frequencies 10 years ago