 Ander Conselvan de Oliveira
|
08d9bc920d
drm/i915: Allocate connector state together with the connectors
|
10 年之前 |
|
Ander Conselvan de Oliveira
|
3165c07417
drm/i915: Use atomic state in intel_ddi_crtc_get_new_encoder()
|
10 年之前 |
 Sonika Jindal
|
a8f3ef6197
drm/i915/skl: Add support for edp 1.4 intermediate frequencies
|
10 年之前 |
 Damien Lespiau
|
7ff446708b
drm/i915/skl: Only use the 800mV+2bB HDMI translation entry
|
10 年之前 |
|
Sonika Jindal
|
7ad14a29f0
drm/i915/skl: Add support for edp1.4 low vswing
|
10 年之前 |
|
Ander Conselvan de Oliveira
|
0cb09a97d8
drm/i915: Use pipe_config's cpu_transcoder for reading encoder hw state
|
10 年之前 |
 Vandana Kannan
|
c395578e98
drm/i915: Enable/disable DRRS
|
10 年之前 |
|
Ander Conselvan de Oliveira
|
6e3c9717e0
drm/i915: Make intel_crtc->config a pointer
|
10 年之前 |
|
Ander Conselvan de Oliveira
|
190f68c5e9
drm/i915: Pass new_config down do crtc_compute_clock
|
10 年之前 |
|
Ander Conselvan de Oliveira
|
2d112de7db
drm/i915: Embedded struct drm_crtc_state in intel_crtc_state
|
10 年之前 |
|
Ander Conselvan de Oliveira
|
5cec258b4f
drm/i915: Rename struct intel_crtc_config to intel_crtc_state
|
10 年之前 |
|
Damien Lespiau
|
22606a18be
drm/i915: Consolidate DDI clock reading out in a single function
|
10 年之前 |
|
Damien Lespiau
|
6c930688cb
drm/i915/skl: Update the DDI translation values for DP/eDP 1.3
|
10 年之前 |
 Daniel Vetter
|
bbd440fb81
drm/i915: Don't rely upon encoder->type for infoframe hw state readout
|
10 年之前 |
 Jesse Barnes
|
f061b9be74
drm/i915/ddi: set has_infoframe flag on DDI too v2
|
10 年之前 |
|
Jesse Barnes
|
cbc572a9a5
drm/i915/ddi: add break in DDI mode select switch
|
10 年之前 |
|
Damien Lespiau
|
134ffa44d1
drm/i915/skl: Use the pipe config DPLL tracking to query the link clock
|
10 年之前 |
|
Damien Lespiau
|
5416d87113
drm/i915/skl: Set the eDP link rate on DPLL0
|
10 年之前 |
 Rodrigo Vivi
|
0bc12bcb1b
drm/i915: Introduce intel_psr.c
|
10 年之前 |
|
Damien Lespiau
|
21318cce5a
drm/i915/skl: Fix big integer constant sparse warning
|
10 年之前 |
|
Vandana Kannan
|
23f08d8340
drm/i915/skl: Apply eDP WA only for gen < 9
|
10 年之前 |
 Satheeshakrishna M
|
82d3543701
drm/i915/skl: Implementation of SKL DPLL programming
|
10 年之前 |
|
Satheeshakrishna M
|
efa80add54
drm/i915/skl: Adjust the port PLL selection code
|
10 年之前 |
|
Satheeshakrishna M
|
d1a2dc7835
drm/i915/skl: Define shared DPLLs for Skylake
|
10 年之前 |
|
Satheeshakrishna M
|
540e732c8e
drm/i915/skl: Determine enabled PLL and its linkrate/pixel clock
|
10 年之前 |
|
Satheeshakrishna M
|
121643c2c9
drm/i915/skl: CD clock back calculation for SKL
|
10 年之前 |
 Jani Nikula
|
82910ac6d5
drm/i915: make pipe/port based audio valid accessors easier to use
|
10 年之前 |
|
Ander Conselvan de Oliveira
|
797d025923
drm/i915: Covert HSW+ to choose DPLLS before disabling CRTCs
|
10 年之前 |
|
Ander Conselvan de Oliveira
|
3e369b76ce
drm/i915: Move dpll crtc_mask and hw_state fields into separate struct
|
10 年之前 |
|
Ander Conselvan de Oliveira
|
d0737e1d59
drm/i915: Make *_crtc_mode_set work on new_config
|
10 年之前 |
