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v4.14.9-bone-rt-r12
v4.4.104-bone-rt-r21
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Gabriel Fernandez
46a57afdd7
drivers: clk: st: PLL rate change implementation for DVFS
9 years ago
Gabriel FERNANDEZ
b9b8e614b5
clk: st: Support for PLLs inside ClockGenA(s)
11 years ago