 Dinh Nguyen
|
34d5003bfb
clk: socfpga: Add a second parent option for the dbg_base_clk
|
10 years ago |
 Andy Shevchenko
|
25d4d341d3
clk: socfpga: switch to GENMASK()
|
10 years ago |
 Stephen Boyd
|
b0af24b523
clk: socfpga: Remove clk.h and clkdev.h includes
|
10 years ago |
|
Dinh Nguyen
|
5343325ff3
clk: socfpga: add a clock driver for the Arria 10 platform
|
10 years ago |
|
Dinh Nguyen
|
5611a5ba8e
clk: socfpga: update clk.h so for Arria10 platform to use
|
10 years ago |
 Dinh Nguyen
|
0691bb1b5a
clk: socfpga: add divider registers to the main pll outputs
|
11 years ago |
 Steffen Trumtrar
|
97259e99bd
clk: socfpga: split clk code
|
11 years ago |
