 Rajendra Nayak
|
081ba80206
clk: qcom: Add rcg ops to return floor value closest to the requested rate
|
%!s(int64=8) %!d(string=hai) anos |
|
Rajendra Nayak
|
400d9fda39
clk: qcom: Enable FSM mode for votable alpha PLLs
|
%!s(int64=9) %!d(string=hai) anos |
 Stephen Boyd
|
ee15faffef
clk: qcom: common: Add API to register board clocks backwards compatibly
|
%!s(int64=9) %!d(string=hai) anos |
|
Stephen Boyd
|
9bc432cb24
clk: qcom: Drop calls to qcom_cc_remove()
|
%!s(int64=10) %!d(string=hai) anos |
|
Rajendra Nayak
|
5e5cc241e9
clk: qcom: gdsc: Prepare common clk probe to register gdscs
|
%!s(int64=10) %!d(string=hai) anos |
 Georgi Djakov
|
293d2e97b3
clk: qcom: Introduce parent_map tables
|
%!s(int64=10) %!d(string=hai) anos |
|
Stephen Boyd
|
50c6a50344
clk: qcom: Consolidate frequency finding logic
|
%!s(int64=11) %!d(string=hai) anos |
|
Stephen Boyd
|
5b6b7490af
clk: qcom: Fix PLL rate configurations
|
%!s(int64=11) %!d(string=hai) anos |
|
Stephen Boyd
|
49fc825f0c
clk: qcom: Consolidate common probe code
|
%!s(int64=11) %!d(string=hai) anos |
