 Paul Burton
|
0fa24340f7
MIPS: Fix octeon FP context switch handling
|
10 years ago |
 Aleksey Makarov
|
69f7cd4724
MIPS: OCTEON: Delete unused COP2 saving code
|
10 years ago |
 Chandrakala Chavva
|
2d98cae6e3
MIPS: OCTEON: Use correct instruction to read 64-bit COP0 register
|
10 years ago |
 David Daney
|
6b3a287e63
MIPS: OCTEON: Save and restore CP2 SHA3 state
|
10 years ago |
|
David Daney
|
d6e41525e3
MIPS: OCTEON: Fix FP context save.
|
10 years ago |
|
David Daney
|
ac655fb762
MIPS: OCTEON: Save/Restore wider multiply registers in OCTEON III CPUs
|
10 years ago |
|
David Daney
|
a36d8225bc
MIPS: OCTEON: Enable use of FPU
|
11 years ago |
 James Hogan
|
8b3c569a39
MIPS: stack protector: Fix per-task canary switch
|
12 years ago |
 Gregory Fong
|
1400eb6567
MIPS: r4k,octeon,r2300: stack protector: change canary per task
|
12 years ago |
 Jayachandran C
|
2c952e06e4
MIPS: Move cop2 save/restore to switch_to()
|
12 years ago |
 Ralf Baechle
|
7034228792
MIPS: Whitespace cleanup.
|
12 years ago |
|
Ralf Baechle
|
348dd600c3
MIPS: Don't include <asm/page.h> unnecessarily.
|
12 years ago |
 Leonid Yegoshin
|
2dd17030c9
MIPS: Fix race condition with FPU thread task flag during context switch.
|
13 years ago |
 Justin P. Mattock
|
79add62773
update David Miller's old email address
|
14 years ago |
|
Ralf Baechle
|
e0e53dee69
MIPS: Nuke trailing blank lines
|
15 years ago |
|
Ralf Baechle
|
f4c6b6bc5a
MIPS: Consolidate all CONFIG_CPU_HAS_LLSC use in a single C file.
|
16 years ago |
 David Daney
|
5b3b16880f
MIPS: Add Cavium OCTEON processor support files to arch/mips/cavium-octeon.
|
16 years ago |
