Will Deacon
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05492f2fd8
arm64: lse: convert lse alternatives NOP padding to use __nops
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9 years ago |
Will Deacon
|
2efe95fe69
locking/atomic, arch/arm64: Implement atomic{,64}_fetch_{add,sub,and,andnot,or,xor}{,_relaxed,_acquire,_release}() for LSE instructions
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9 years ago |
Will Deacon
|
6822a84dd4
locking/atomic, arch/arm64: Generate LSE non-return cases using common macros
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9 years ago |
Ard Biesheuvel
|
5be8b70af1
arm64: lse: deal with clobbered IP registers after branch via PLT
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9 years ago |
Lorenzo Pieralisi
|
57a6566799
arm64: cmpxchg_dbl: fix return value type
|
9 years ago |
Will Deacon
|
305d454aaa
arm64: atomics: implement native {relaxed, acquire, release} atomics
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9 years ago |
Will Deacon
|
484c96dbb2
arm64: lse: fix lse cmpxchg code indentation
|
10 years ago |
Will Deacon
|
db26217e6f
arm64: atomic64_dec_if_positive: fix incorrect branch condition
|
10 years ago |
Will Deacon
|
6059a7b6e8
arm64: atomics: implement atomic{,64}_cmpxchg using cmpxchg
|
10 years ago |
Will Deacon
|
0bc671d3f4
arm64: cmpxchg: avoid "cc" clobber in ll/sc routines
|
10 years ago |
Will Deacon
|
e9a4b79565
arm64: cmpxchg_dbl: patch in lse instructions when supported by the CPU
|
10 years ago |
Will Deacon
|
c342f78217
arm64: cmpxchg: patch in lse instructions when supported by the CPU
|
10 years ago |
Will Deacon
|
c09d6a04d1
arm64: atomics: patch in lse instructions when supported by the CPU
|
10 years ago |
Will Deacon
|
c0385b24af
arm64: introduce CONFIG_ARM64_LSE_ATOMICS as fallback to ll/sc atomics
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10 years ago |