 Vladimir Murzin
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9a1af5f220
ARM: 8606/1: V7M: introduce cache operations
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%!s(int64=9) %!d(string=hai) anos |
 Russell King
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c848791f03
Merge branches 'misc', 'vdso' and 'fixes' into for-next
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%!s(int64=10) %!d(string=hai) anos |
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Russell King
|
6c5c2a01fc
ARM: proc-arm94*.S: fix setup function
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%!s(int64=10) %!d(string=hai) anos |
 Ard Biesheuvel
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bf35706f3d
ARM: 8314/1: replace PROCINFO embedded branch with relative offset
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%!s(int64=10) %!d(string=hai) anos |
 Kirill A. Shutemov
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b007ea798f
arm: drop L_PTE_FILE and pte_file()-related helpers
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%!s(int64=10) %!d(string=hai) anos |
 Bartlomiej Zolnierkiewicz
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f6f1ae82bd
ARM: mm: Fix ifdef around cpu_*_do_[suspend, resume] ops
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%!s(int64=11) %!d(string=hai) anos |
 Will Deacon
|
b6ccb9803e
ARM: 7954/1: mm: remove remaining domain support from ARMv6
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%!s(int64=11) %!d(string=hai) anos |
 Gregory CLEMENT
|
3e0a07f8c4
ARM: 7773/1: PJ4B: Add support for errata 4742
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%!s(int64=12) %!d(string=hai) anos |
 Ben Dooks
|
9520a5bece
ARM: 7649/1: mm: mm->context.id fix for big-endian
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%!s(int64=12) %!d(string=hai) anos |
|
Will Deacon
|
26ffd0d43b
ARM: mm: introduce present, faulting entries for PAGE_NONE
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%!s(int64=13) %!d(string=hai) anos |
 Lorenzo Pieralisi
|
031bd879f7
ARM: mm: implement LoUIS API for cache maintenance ops
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%!s(int64=13) %!d(string=hai) anos |
 Catalin Marinas
|
1b6ba46b7e
ARM: LPAE: MMU setup for the 3-level page table format
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%!s(int64=13) %!d(string=hai) anos |
|
Russell King
|
6645cb61f3
ARM: Fix build errors caused by adding generic macros
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%!s(int64=14) %!d(string=hai) anos |
 Dave Martin
|
66a625a881
ARM: mm: proc-macros: Add generic proc/cache/tlb struct definition macros
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%!s(int64=14) %!d(string=hai) anos |
 Lucas De Marchi
|
25985edced
Fix common misspellings
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%!s(int64=14) %!d(string=hai) anos |
|
Russell King
|
28cdac6690
Merge branch 'pgt' (early part) into devel
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%!s(int64=14) %!d(string=hai) anos |
|
Russell King
|
4073723acb
Merge branch 'misc' into devel
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%!s(int64=14) %!d(string=hai) anos |
|
Russell King
|
36bb94ba36
ARM: pgtable: provide RDONLY page table bit rather than WRITE bit
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%!s(int64=14) %!d(string=hai) anos |
|
Russell King
|
9522d7e4cb
ARM: pgtable: invert L_PTE_EXEC to L_PTE_XN
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%!s(int64=14) %!d(string=hai) anos |
|
Russell King
|
d30e45eeab
ARM: pgtable: switch order of Linux vs hardware page tables
|
%!s(int64=14) %!d(string=hai) anos |
|
Catalin Marinas
|
da30e0ac0f
ARM: 6528/1: Use CTR for the I-cache line size on ARMv7
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%!s(int64=14) %!d(string=hai) anos |
|
Catalin Marinas
|
f91e2c3bd4
ARM: 6527/1: Use CTR instead of CCSIDR for the D-cache line size on ARMv7
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%!s(int64=14) %!d(string=hai) anos |
|
Catalin Marinas
|
247055aa21
ARM: 6384/1: Remove the domain switching on ARMv6k/v7 CPUs
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%!s(int64=15) %!d(string=hai) anos |
 Russell King
|
ddd559b13f
Merge branch 'devel-stable' into devel
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%!s(int64=16) %!d(string=hai) anos |
|
Catalin Marinas
|
8b79d5f217
nommu: Add #ifdef CONFIG_MMU around the PTE sanity checks
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%!s(int64=16) %!d(string=hai) anos |
|
Russell King
|
f7a55fa6ec
[ARM] remove L_PTE_BUFFERABLE and L_PTE_CACHEABLE
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%!s(int64=16) %!d(string=hai) anos |
|
Russell King
|
db5b716947
[ARM] Remove MT_DEVICE_IXP2000 and associated definitions
|
%!s(int64=17) %!d(string=hai) anos |
|
Russell King
|
639b0ae7f5
[ARM] Convert ARMv6 and ARMv7 to use new memory types
|
%!s(int64=17) %!d(string=hai) anos |
|
Russell King
|
da0916539d
[ARM] Convert set_pte_ext implementions to macros
|
%!s(int64=17) %!d(string=hai) anos |
|
Catalin Marinas
|
bbe888864e
[ARM] armv7: add support for ARMv7 cores.
|
%!s(int64=18) %!d(string=hai) anos |
