 Yuriy Kolerov
|
e51d5d02f6
ARCv2: IRQ: Call entry/exit functions for chained handlers in MCIP
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%!s(int64=8) %!d(string=hai) anos |
 Vineet Gupta
|
2d7f5c48c0
ARC: move mcip.h into include/soc and adjust the includes
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%!s(int64=8) %!d(string=hai) anos |
|
Yuriy Kolerov
|
0a0a047def
ARCv2: MCIP: Use IDU_M_DISTRI_DEST mode if there is only 1 destination core
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%!s(int64=8) %!d(string=hai) anos |
|
Yuriy Kolerov
|
34e71e4cbb
ARC: IRQ: Do not use hwirq as virq and vice versa
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%!s(int64=8) %!d(string=hai) anos |
|
Vineet Gupta
|
3ce0fefc51
ARCv2: intc: untangle SMP, MCIP and IDU
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%!s(int64=8) %!d(string=hai) anos |
|
Vineet Gupta
|
88555cc584
ARC: irq: export some IRQs again
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%!s(int64=9) %!d(string=hai) anos |
|
Vineet Gupta
|
e608b53ea8
ARC: clocksource: DT based probe
|
%!s(int64=9) %!d(string=hai) anos |
 Valentin Rothberg
|
9ef2d8be55
arc: SMP: CONFIG_ARC_IPI_DBG cleanup
|
%!s(int64=9) %!d(string=hai) anos |
|
Vineet Gupta
|
d73b73f562
ARC: SMP: No need for CONFIG_ARC_IPI_DBG
|
%!s(int64=9) %!d(string=hai) anos |
|
Vineet Gupta
|
3dea30ca5b
ARCv2: Elide sending new cross core intr if receiver didn't ack prev
|
%!s(int64=9) %!d(string=hai) anos |
|
Vineet Gupta
|
9681787930
ARCv2: SMP: Push IPI_IRQ into IPI provider
|
%!s(int64=9) %!d(string=hai) anos |
|
Vineet Gupta
|
bb143f814e
ARCv2: SMP: Emulate IPI to self using software triggered interrupt
|
%!s(int64=9) %!d(string=hai) anos |
|
Vineet Gupta
|
98341f7dc9
ARCv2: boot print Low Latency Memory
|
%!s(int64=9) %!d(string=hai) anos |
|
Vineet Gupta
|
d584f0fb04
ARCv2: clocksource: Rename GRTC -> GFRC ...
|
%!s(int64=9) %!d(string=hai) anos |
 Noam Camus
|
b474a02382
ARC: rename smp operation init_irq_cpu() to init_per_cpu()
|
%!s(int64=9) %!d(string=hai) anos |
|
Vineet Gupta
|
aa0efcde45
ARCv2: smp: [plat-*]: No need to explicitly call mcip_init_smp()
|
%!s(int64=9) %!d(string=hai) anos |
|
Vineet Gupta
|
26b8f99623
ARCv2: smp: [plat-*]: No need to explicitly call mcip_init_early_smp()
|
%!s(int64=9) %!d(string=hai) anos |
|
Vineet Gupta
|
f33e9c434b
ARC: smp: Move default boot kick/wait code out of MCIP into common code
|
%!s(int64=9) %!d(string=hai) anos |
|
Vineet Gupta
|
964cf28f9d
ARC: boot log: move helper macros to header for reuse
|
%!s(int64=9) %!d(string=hai) anos |
 Thomas Gleixner
|
bd0b9ac405
genirq: Remove irq argument from irq flow handlers
|
%!s(int64=10) %!d(string=hai) anos |
|
Thomas Gleixner
|
badae6bc94
arc/irq: Prepare idu_cascade_isr for irq argument removal
|
%!s(int64=10) %!d(string=hai) anos |
 Joël Porquet
|
70d93d8941
arc:irqchip: prepare for drivers/irqchip/irqchip.h removal
|
%!s(int64=10) %!d(string=hai) anos |
|
Vineet Gupta
|
6b12ec177c
ARCv2: intc: IDU: Fix potential race in installing a chained IRQ handler
|
%!s(int64=10) %!d(string=hai) anos |
|
Vineet Gupta
|
83ce3e6fcc
ARCv2: intc: IDU: support irq affinity
|
%!s(int64=10) %!d(string=hai) anos |
|
Vineet Gupta
|
eaf0ecc33f
ARCv2: SMP: intc: IDU 2nd level intc for dynamic IRQ distribution
|
%!s(int64=10) %!d(string=hai) anos |
|
Vineet Gupta
|
72d7288061
ARCv2: SMP: clocksource: Enable Global Real Time counter
|
%!s(int64=10) %!d(string=hai) anos |
|
Vineet Gupta
|
aa6083ed50
ARCv2: SMP: ARConnect debug/robustness
|
%!s(int64=10) %!d(string=hai) anos |
|
Vineet Gupta
|
82fea5a1bb
ARCv2: SMP: Support ARConnect (MCIP) for Inter-Core-Interrupts et al
|
%!s(int64=11) %!d(string=hai) anos |
