提交歷史

作者 SHA1 備註 提交日期
  Chris Wilson e26e1b976d drm/i915: Don't ERROR for an expected intel_rcs_ctx_init() interruption 9 年之前
  Daniele Ceraolo Spurio ff3dc0875c drm/i915: check that rpm ref is held when accessing ringbuf in stolen mem 9 年之前
  Arun Siluvery 6ecf56ae1d drm/i915/gen9: Add WaOCLCoherentLineFlush 9 年之前
  Arun Siluvery a78536e73f drm/i915/skl: Enable Per context Preemption granularity control 9 年之前
  Arun Siluvery 6107497eee drm/i915/skl: Add GEN8_L3SQCREG4 to HW whitelist 9 年之前
  Arun Siluvery a786d53a2c drm/i915/bxt: Add GEN8_L3SQCREG4 to HW whitelist 9 年之前
  Arun Siluvery 2c8580e4e2 drm/i915/bxt: Add GEN9_CS_DEBUG_MODE1 to HW whitelist 9 年之前
  Arun Siluvery 3669ab6191 drm/i915/gen9: Add HDC_CHICKEN1 to HW whitelist 9 年之前
  Arun Siluvery e0f3fa096d drm/i915/gen9: Add GEN8_CS_CHICKEN1 to HW whitelist 9 年之前
  Arun Siluvery 33136b06d5 drm/i915/gen9: Add framework to whitelist specific GPU registers 9 年之前
  Chris Wilson 426960bed3 drm/i915: Seal busy-ioctl uABI and prevent leaking of internal ids 9 年之前
  Tvrtko Ursulin 0eb973d31d drm/i915: Cache ringbuffer GTT VMA 9 年之前
  Francisco Jerez 965fd602a6 drm/i915: Make sure DC writes are coherent on flush. 9 年之前
  Ville Syrjälä 9d611c033b drm/i915: Use MI_BATCH_BUFFER_START on 830/845 9 年之前
  Ville Syrjälä 7d3fdfff23 drm/i915: Cleanup phys status page too 9 年之前
  Mika Kuoppala e238659ddd drm/i915/skl: Default to noncoherent access up to F0 9 年之前
  Dave Gordon b0366a54b4 drm/i915: intel_ring_initialized() must be simple and inline 9 年之前
  Zeng Zhaoxiu a4d8a0fe45 i915: Replace "hweight8(dev_priv->info.subslice_7eu[i]) != 1" with "!is_power_of_2(dev_priv->info.subslice_7eu[i])" 9 年之前
  Daniel Vetter 92907cbbef Merge tag 'v4.4-rc2' into drm-intel-next-queued 9 年之前
  Ville Syrjälä f0f59a00a1 drm/i915: Type safe register read/write 9 年之前
  Ville Syrjälä f92a916220 drm/i915: Add functions to emit register offsets to the ring 9 年之前
  Linus Torvalds 3e82806b97 Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linux 9 年之前
  Tim Gore cbdc12a9fc drm/i915: make A0 wa's applied to A1 9 年之前
  Chris Wilson 608c1a526c drm/i915: Recover all available ringbuffer space following reset 10 年之前
  Jani Nikula e87a005d90 drm/i915: add helpers for platform specific revision id range checks 9 年之前
  Jani Nikula fffda3f4fb drm/i915/bxt: add revision id for A1 stepping and use it 9 年之前
  Chris Wilson def0c5f6b0 drm/i915: Map the ringbuffer using WB on LLC machines 10 年之前
  Mika Kuoppala 9c4cbf8212 drm/i915: Move skl/bxt gt specific workarounds to ring init 9 年之前
  Chris Wilson 40a24488f5 drm/i915: Flush pipecontrol post-sync writes 10 年之前
  Francisco Jerez 4f91fc6d2c drm/i915: Hook up ring workaround writes at context creation time on Gen6-7. 10 年之前