 Maarten Lankhorst
|
90c702b88e
drm/i915: Calculate ironlake intermediate watermarks correctly, v2.
|
8 years ago |
 Oscar Mateo
|
930a784d02
drm/i915: Use a mask when applying WaProgramL3SqcReg1Default
|
8 years ago |
 Rodrigo Vivi
|
e4ffc83d3f
drm/i915/cnl: WaRsUseTimeoutMode
|
8 years ago |
 Sagar Arun Kamble
|
37d933fc17
drm/i915: Introduce separate status variable for RC6 and LLC ring frequency setup
|
8 years ago |
|
Sagar Arun Kamble
|
fc77426a8d
drm/i915: Create generic functions to control RC6, RPS
|
8 years ago |
|
Sagar Arun Kamble
|
0870a2a4a3
drm/i915: Create generic function to setup LLC ring frequency table
|
8 years ago |
|
Sagar Arun Kamble
|
771decb0b4
drm/i915: Rename intel_enable_rc6 to intel_rc6_enabled
|
8 years ago |
|
Sagar Arun Kamble
|
562d9bae08
drm/i915: Name structure in dev_priv that contains RPS/RC6 state as "gt_pm"
|
8 years ago |
|
Sagar Arun Kamble
|
9f817501bd
drm/i915: Move rps.hw_lock to dev_priv and s/hw_lock/pcu_lock
|
8 years ago |
|
Sagar Arun Kamble
|
ad1443f0f3
drm/i915: Name i915_runtime_pm structure in dev_priv as "runtime_pm"
|
8 years ago |
|
Sagar Arun Kamble
|
d46b00dc38
drm/i915: Separate RPS and RC6 handling for CHV
|
8 years ago |
|
Sagar Arun Kamble
|
0d6fc92a73
drm/i915: Separate RPS and RC6 handling for VLV
|
8 years ago |
|
Sagar Arun Kamble
|
3a85392c0e
drm/i915: Separate RPS and RC6 handling for BDW
|
8 years ago |
|
Sagar Arun Kamble
|
415544d5a8
drm/i915: Remove superfluous IS_BDW checks and non-BDW changes from gen8_enable_rps
|
8 years ago |
|
Sagar Arun Kamble
|
960e54652c
drm/i915: Separate RPS and RC6 handling for gen6+
|
8 years ago |
 Mika Kahola
|
2b68504be6
drm/i915: Remove I915_MAX_PIPES dependency for DDB allocation
|
8 years ago |
 Matthew Auld
|
8cb0983678
drm/i915: disable GTT cache for 2M pages
|
8 years ago |
|
Rodrigo Vivi
|
4d6ef0da41
drm/i915/skl: Fix has_ipc on skl and document WaDisableIPC.
|
8 years ago |
 Michal Wajdeczko
|
4f044a88a8
drm/i915: Rename global i915 to i915_modparams
|
8 years ago |
|
Rodrigo Vivi
|
4cc6feb715
drm/i915/cnp: Don't touch other PCH clock gating bits.
|
8 years ago |
 Ville Syrjälä
|
93564044fb
drm/i915: Switch over to the LLC/eLLC hotspot avoidance hash mode for CCS
|
8 years ago |
 Kumar, Mahesh
|
2503a0fef2
drm/i915/bxt+: Enable IPC support
|
8 years ago |
|
Kumar, Mahesh
|
d86ba628ce
drm/i915/cnl: Extend WM workaround with IPC for CNL
|
8 years ago |
|
Kumar, Mahesh
|
446e850c38
drm/i915/glk: IPC linetime watermark workaround for GLK
|
8 years ago |
|
Kumar, Mahesh
|
ca47667f52
drm/i915/gen10: Calculate and enable transition WM
|
8 years ago |
|
Kumar, Mahesh
|
7e452fdbfc
drm/i915/skl+: Optimize WM calculation
|
8 years ago |
|
Rodrigo Vivi
|
8f067837c4
drm/i915: Display WA #1133 WaFbcSkipSegments:cnl, glk
|
8 years ago |
|
Rodrigo Vivi
|
0a46ddd57c
drm/i915/cnp: Wa 1181: Fix Backlight issue
|
8 years ago |
|
Ville Syrjälä
|
7b510451c8
drm/i915: Eliminate obj->state usage in g4x/vlv/chv wm computation
|
8 years ago |
|
Rodrigo Vivi
|
91200c09d3
drm/i915: Stop using long platform names on clock gating functions.
|
8 years ago |
