 Jiang Liu
|
b4b55cda58
x86/PCI: Refine the way to release PCI IRQ resources
|
10 years ago |
|
Jiang Liu
|
cffe0a2b5a
x86, irq: Keep balance of IOAPIC pin reference count
|
11 years ago |
|
Jiang Liu
|
9eabc99a63
x86, irq, PCI: Keep IRQ assignment for runtime power management
|
11 years ago |
|
Jiang Liu
|
3eec595235
x86, irq, PCI: Keep IRQ assignment for PCI devices during suspend/hibernation
|
11 years ago |
|
Jiang Liu
|
8a3e533df1
x86, irq, SFI: Release IOAPIC pin when PCI device is disabled
|
11 years ago |
|
Jiang Liu
|
ecc527d560
x86, irq, SFI: Use common irqdomain map interface to program IOAPIC pins
|
11 years ago |
|
Jiang Liu
|
1b5d3e00d4
x86, SFI, irq: Provide basic irqdomain support
|
11 years ago |
 David Cohen
|
bc20aa48bb
x86, intel-mid: Add Merrifield platform support
|
11 years ago |
 Kuppuswamy Sathyanarayanan
|
712b6aa873
intel_mid: Renamed *mrst* to *intel_mid*
|
12 years ago |
 Fengguang Wu
|
6c21b176a9
pci: intel_mid: Return true/false in function returning bool
|
12 years ago |
|
Kuppuswamy Sathyanarayanan
|
05454c26eb
intel_mid: Renamed *mrst* to *intel_mid*
|
12 years ago |
